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Lucile Quirion9ee16892015-06-30 17:17:47 -04001/*
2 * Copyright (C) 2015, Savoir-faire Linux Inc.
3 *
4 * Derived from MX51EVK code by
5 * Guennadi Liakhovetski <lg@denx.de>
6 * Freescale Semiconductor, Inc.
7 *
8 * Configuration settings for the TS4800 Board
9 *
10 * SPDX-License-Identifier: GPL-2.0+
11 */
12
13#ifndef __CONFIG_H
14#define __CONFIG_H
15
16/* High Level Configuration Options */
17#define CONFIG_MX51
18
Lucile Quirion9ee16892015-06-30 17:17:47 -040019#define CONFIG_SYS_NO_FLASH /* No NOR Flash */
Bin Menga1875592016-02-05 19:30:11 -080020#define CONFIG_SKIP_LOWLEVEL_INIT /* U-Boot is a 2nd stage bootloader */
Lucile Quirion9ee16892015-06-30 17:17:47 -040021
22#define CONFIG_HW_WATCHDOG
23
24#define CONFIG_MACH_TYPE MACH_TYPE_TS48XX
25
26/* text base address used when linking */
27#define CONFIG_SYS_TEXT_BASE 0x90008000
28
29#include <asm/arch/imx-regs.h>
30
31/* enable passing of ATAGs */
32#define CONFIG_CMDLINE_TAG
33#define CONFIG_SETUP_MEMORY_TAGS
34#define CONFIG_INITRD_TAG
35#define CONFIG_REVISION_TAG
36
Lucile Quirion9ee16892015-06-30 17:17:47 -040037/*
38 * Size of malloc() pool
39 */
40#define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
41
42/*
43 * Hardware drivers
44 */
45
46#define CONFIG_MXC_UART
47#define CONFIG_MXC_UART_BASE UART1_BASE
48#define CONFIG_MXC_GPIO
49
50/*
51 * SPI Configs
52 * */
53#define CONFIG_HARD_SPI /* puts SPI: ready */
54#define CONFIG_MXC_SPI /* driver for the SPI controllers*/
Lucile Quirion9ee16892015-06-30 17:17:47 -040055
56/*
57 * MMC Configs
58 * */
59#define CONFIG_FSL_ESDHC
60#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR
61
Sebastien Bourdeline96b6ee2016-04-21 13:37:04 -040062#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
63
Lucile Quirion9ee16892015-06-30 17:17:47 -040064#define CONFIG_GENERIC_MMC
Lucile Quirion9ee16892015-06-30 17:17:47 -040065#define CONFIG_DOS_PARTITION
66
Damien Riegelf3488bb2015-06-30 17:17:48 -040067/*
68 * Eth Configs
69 */
70#define CONFIG_MII
71#define CONFIG_PHYLIB
72#define CONFIG_PHY_SMSC
73
74#define CONFIG_FEC_MXC
75#define IMX_FEC_BASE FEC_BASE_ADDR
76#define CONFIG_ETHPRIME "FEC"
77#define CONFIG_FEC_MXC_PHYADDR 0
78
Lucile Quirion9ee16892015-06-30 17:17:47 -040079/* allow to overwrite serial and ethaddr */
80#define CONFIG_ENV_OVERWRITE /* disable vendor parameters protection (serial#, ethaddr) */
81#define CONFIG_CONS_INDEX 1 /* use UART0 : used by serial driver */
82#define CONFIG_BAUDRATE 115200
83
84/***********************************************************
85 * Command definition
86 ***********************************************************/
87
Lucile Quirion9ee16892015-06-30 17:17:47 -040088/* Environment variables */
89
Lucile Quirion9ee16892015-06-30 17:17:47 -040090
91#define CONFIG_LOADADDR 0x91000000 /* loadaddr env var */
92
93#define CONFIG_EXTRA_ENV_SETTINGS \
94 "script=boot.scr\0" \
Damien Riegele4537942016-04-21 17:34:02 -040095 "image=zImage\0" \
96 "fdt_file=imx51-ts4800.dtb\0" \
97 "fdt_addr=0x90fe0000\0" \
Lucile Quirion9ee16892015-06-30 17:17:47 -040098 "mmcdev=0\0" \
Damien Riegele4537942016-04-21 17:34:02 -040099 "mmcpart=2\0" \
100 "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
101 "mmcargs=setenv bootargs root=${mmcroot}\0" \
Lucile Quirion9ee16892015-06-30 17:17:47 -0400102 "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
103 "loadbootscript=" \
104 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
105 "bootscript=echo Running bootscript from mmc ...; " \
106 "source\0" \
107 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
Damien Riegele4537942016-04-21 17:34:02 -0400108 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
Lucile Quirion9ee16892015-06-30 17:17:47 -0400109 "mmcboot=echo Booting from mmc ...; " \
110 "run mmcargs addtty; " \
Damien Riegele4537942016-04-21 17:34:02 -0400111 "if run loadfdt; then " \
112 "bootz ${loadaddr} - ${fdt_addr}; " \
113 "else " \
114 "echo ERR: cannot load FDT; " \
115 "fi; "
116
Lucile Quirion9ee16892015-06-30 17:17:47 -0400117
118#define CONFIG_BOOTCOMMAND \
119 "mmc dev ${mmcdev}; if mmc rescan; then " \
120 "if run loadbootscript; then " \
121 "run bootscript; " \
122 "else " \
123 "if run loadimage; then " \
124 "run mmcboot; " \
125 "fi; " \
126 "fi; " \
127 "fi; "
128
129/*
130 * Miscellaneous configurable options
131 */
132#define CONFIG_SYS_LONGHELP /* undef to save memory */
Lucile Quirion9ee16892015-06-30 17:17:47 -0400133#define CONFIG_AUTO_COMPLETE
134#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
135/* Print Buffer Size */
136#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
137#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
138#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
139
140#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
141
142#define CONFIG_CMDLINE_EDITING
143
144/*-----------------------------------------------------------------------
145 * Physical Memory Map
146 */
147#define CONFIG_NR_DRAM_BANKS 1
148#define PHYS_SDRAM_1 CSD0_BASE_ADDR
149#define PHYS_SDRAM_1_SIZE (256 * 1024 * 1024)
150
151#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
152#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
153#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
154
155#define CONFIG_BOARD_EARLY_INIT_F
156
157#define CONFIG_SYS_INIT_SP_OFFSET \
158 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
159#define CONFIG_SYS_INIT_SP_ADDR \
160 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
161
162/* Low level init */
163#define CONFIG_SYS_DDR_CLKSEL 0
164#define CONFIG_SYS_CLKTL_CBCDR 0x59E35100
165#define CONFIG_SYS_MAIN_PWR_ON
166
167/*-----------------------------------------------------------------------
168 * Environment organization
169 */
170
171#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
172#define CONFIG_ENV_SIZE (8 * 1024)
173#define CONFIG_ENV_IS_IN_MMC
174#define CONFIG_SYS_MMC_ENV_DEV 0
175
176#endif