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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
HeungJun, Kim89f95492012-01-16 21:13:05 +00002/*
3 * Copyright (C) 2011 Samsung Electronics
4 * Heungjun Kim <riverful.kim@samsung.com>
5 *
6 * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
HeungJun, Kim89f95492012-01-16 21:13:05 +00007 */
8
Piotr Wilczekfe601642014-03-07 14:59:48 +01009#ifndef __CONFIG_TRATS_H
10#define __CONFIG_TRATS_H
HeungJun, Kim89f95492012-01-16 21:13:05 +000011
Simon Glass4c7bb1d2014-10-07 22:01:44 -060012#include <configs/exynos4-common.h>
HeungJun, Kim89f95492012-01-16 21:13:05 +000013
Piotr Wilczekfe601642014-03-07 14:59:48 +010014#define CONFIG_TRATS
15
Piotr Wilczekfe601642014-03-07 14:59:48 +010016#define CONFIG_TIZEN /* TIZEN lib */
HeungJun, Kim89f95492012-01-16 21:13:05 +000017
Łukasz Majewskic4e96db2014-01-14 08:02:26 +010018#define CONFIG_SYS_L2CACHE_OFF
Łukasz Majewskid0460b02012-08-07 05:42:14 +000019#ifndef CONFIG_SYS_L2CACHE_OFF
20#define CONFIG_SYS_L2_PL310
21#define CONFIG_SYS_PL310_BASE 0x10502000
22#endif
HeungJun, Kim89f95492012-01-16 21:13:05 +000023
Piotr Wilczekfe601642014-03-07 14:59:48 +010024/* TRATS has 4 banks of DRAM */
25#define CONFIG_NR_DRAM_BANKS 4
HeungJun, Kim89f95492012-01-16 21:13:05 +000026#define CONFIG_SYS_SDRAM_BASE 0x40000000
Piotr Wilczekfe601642014-03-07 14:59:48 +010027#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
Piotr Wilczekfe601642014-03-07 14:59:48 +010028#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
HeungJun, Kim89f95492012-01-16 21:13:05 +000029
Piotr Wilczekfe601642014-03-07 14:59:48 +010030/* memtest works on */
31#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
32#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
33#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
HeungJun, Kim89f95492012-01-16 21:13:05 +000034
HeungJun, Kim89f95492012-01-16 21:13:05 +000035/* select serial console configuration */
Piotr Wilczekfe601642014-03-07 14:59:48 +010036#define CONFIG_SERIAL2
HeungJun, Kim89f95492012-01-16 21:13:05 +000037
Piotr Wilczekfe601642014-03-07 14:59:48 +010038#define CONFIG_MACH_TYPE MACH_TYPE_TRATS
HeungJun, Kim89f95492012-01-16 21:13:05 +000039
Łukasz Majewski0a1387b2015-04-01 12:34:29 +020040#define CONFIG_BOOTCOMMAND "run autoboot"
Dongjin Kim232ed3c2017-10-28 00:22:27 -040041#define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
HeungJun, Kim89f95492012-01-16 21:13:05 +000042
Piotr Wilczekfe601642014-03-07 14:59:48 +010043#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
44 - GENERATED_GBL_DATA_SIZE)
45
46#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
47
48#define CONFIG_SYS_MONITOR_BASE 0x00000000
49
HeungJun, Kim89f95492012-01-16 21:13:05 +000050#define CONFIG_BOOTBLOCK "10"
51#define CONFIG_ENV_COMMON_BOOT "${console} ${meminfo}"
52
Piotr Wilczekfe601642014-03-07 14:59:48 +010053#define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
54#define CONFIG_ENV_SIZE 4096
55#define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
56
57#define CONFIG_ENV_OVERWRITE
58
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010059/* Tizen - partitions definitions */
60#define PARTS_CSA "csa-mmc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010061#define PARTS_BOOT "boot"
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010062#define PARTS_QBOOT "qboot"
63#define PARTS_CSC "csc"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010064#define PARTS_ROOT "platform"
65#define PARTS_DATA "data"
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010066#define PARTS_UMS "ums"
67
68#define PARTS_DEFAULT \
69 "uuid_disk=${uuid_gpt_disk};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010070 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
71 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
72 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010073 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010074 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
75 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +010076 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
77
Lukasz Majewski93a1ab52012-08-06 14:41:11 +020078#define CONFIG_DFU_ALT \
Mateusz Zalegab7d42592014-04-28 21:13:25 +020079 "u-boot raw 0x80 0x400;" \
Łukasz Majewskidcb7eb62014-07-22 10:17:06 +020080 "/uImage ext4 0 2;" \
81 "/modem.bin ext4 0 2;" \
82 "/exynos4210-trats.dtb ext4 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010083 ""PARTS_CSA" part 0 1;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010084 ""PARTS_BOOT" part 0 2;" \
Przemyslaw Marczak18f3e0e2014-02-28 18:53:36 +010085 ""PARTS_QBOOT" part 0 3;" \
86 ""PARTS_CSC" part 0 4;" \
Łukasz Majewskicdd15bc2014-01-14 08:02:24 +010087 ""PARTS_ROOT" part 0 5;" \
88 ""PARTS_DATA" part 0 6;" \
Przemyslaw Marczaka0afc6f2014-01-22 12:02:47 +010089 ""PARTS_UMS" part 0 7;" \
Łukasz Majewski0a1387b2015-04-01 12:34:29 +020090 "params.bin raw 0x38 0x8;" \
91 "/Image.itb ext4 0 2\0"
Lukasz Majewski93a1ab52012-08-06 14:41:11 +020092
HeungJun, Kim89f95492012-01-16 21:13:05 +000093#define CONFIG_EXTRA_ENV_SETTINGS \
94 "bootk=" \
Piotr Wilczek425e26d2014-01-22 15:54:37 +010095 "run loaduimage;" \
96 "if run loaddtb; then " \
97 "bootm 0x40007FC0 - ${fdtaddr};" \
98 "fi;" \
99 "bootm 0x40007FC0;\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000100 "updatebackup=" \
Jaehoon Chung188c42b2014-04-30 09:09:15 +0900101 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
102 "mmc dev 0 0\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000103 "updatebootb=" \
104 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
105 "lpj=lpj=3981312\0" \
106 "nfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000107 "setenv bootargs root=/dev/nfs rw " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000108 "nfsroot=${nfsroot},nolock,tcp " \
109 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
110 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
111 "; run bootk\0" \
112 "ramfsboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000113 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000114 "${console} ${meminfo} " \
115 "initrd=0x43000000,8M ramdisk=8192\0" \
116 "mmcboot=" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000117 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000118 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
Piotr Wilczek425e26d2014-01-22 15:54:37 +0100119 "run bootk\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000120 "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000121 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
122 "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
123 "verify=n\0" \
124 "rootfstype=ext4\0" \
Dongjin Kim232ed3c2017-10-28 00:22:27 -0400125 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000126 "meminfo=crashkernel=32M@0x50000000\0" \
127 "nfsroot=/nfsroot/arm\0" \
128 "bootblock=" CONFIG_BOOTBLOCK "\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000129 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
Łukasz Majewski4ef400b2013-07-18 13:14:22 +0200130 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200131 "${fdtfile}\0" \
HeungJun, Kim89f95492012-01-16 21:13:05 +0000132 "mmcdev=0\0" \
133 "mmcbootpart=2\0" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000134 "mmcrootpart=5\0" \
Lukasz Majewski93a1ab52012-08-06 14:41:11 +0200135 "opts=always_resume=1\0" \
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100136 "partitions=" PARTS_DEFAULT \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000137 "dfu_alt_info=" CONFIG_DFU_ALT \
138 "spladdr=0x40000100\0" \
139 "splsize=0x200\0" \
140 "splfile=falcon.bin\0" \
141 "spl_export=" \
142 "setexpr spl_imgsize ${splsize} + 8 ;" \
Przemyslaw Marczakdc993a62013-03-12 03:41:49 +0000143 "setenv spl_imgsize 0x${spl_imgsize};" \
Łukasz Majewski35777e22013-01-02 06:06:02 +0000144 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
145 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
146 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
147 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
148 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
149 "spl export atags 0x40007FC0;" \
150 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
151 "mw.l ${spl_addr_tmp} ${splsize};" \
152 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
153 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
154 "setenv spl_imgsize;" \
155 "setenv spl_imgaddr;" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200156 "setenv spl_addr_tmp;\0" \
Łukasz Majewski0a1387b2015-04-01 12:34:29 +0200157 CONFIG_EXTRA_ENV_ITB \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200158 "fdtaddr=40800000\0" \
Arkadiusz Wlodarczykba223bb2013-04-02 15:10:16 +0200159
Łukasz Majewski35777e22013-01-02 06:06:02 +0000160/* Falcon mode definitions */
Piotr Wilczekfe601642014-03-07 14:59:48 +0100161#define CONFIG_SYS_SPL_ARGS_ADDR CONFIG_SYS_SDRAM_BASE + 0x100
HeungJun, Kim89f95492012-01-16 21:13:05 +0000162
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100163/* GPT */
Lukasz Majewski9960d9a2012-12-11 11:09:48 +0100164
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100165/* Security subsystem - enable hw_rand() */
166#define CONFIG_EXYNOS_ACE_SHA
Przemyslaw Marczake0021702014-03-25 10:58:22 +0100167
Przemyslaw Marczak679549d2014-01-22 11:24:12 +0100168/* Common misc for Samsung */
169#define CONFIG_MISC_COMMON
170
171#define CONFIG_MISC_INIT_R
172
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100173/* Download menu - Samsung common */
174#define CONFIG_LCD_MENU
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100175
176/* Download menu - definitions for check keys */
177#ifndef __ASSEMBLY__
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100178
179#define KEY_PWR_PMIC_NAME "MAX8997_PMIC"
180#define KEY_PWR_STATUS_REG MAX8997_REG_STATUS1
181#define KEY_PWR_STATUS_MASK (1 << 0)
182#define KEY_PWR_INTERRUPT_REG MAX8997_REG_INT1
183#define KEY_PWR_INTERRUPT_MASK (1 << 0)
184
Akshay Saraswat9b97b722014-05-13 10:30:15 +0530185#define KEY_VOL_UP_GPIO EXYNOS4_GPIO_X20
186#define KEY_VOL_DOWN_GPIO EXYNOS4_GPIO_X21
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100187#endif /* __ASSEMBLY__ */
188
189/* LCD console */
190#define LCD_BPP LCD_COLOR16
Przemyslaw Marczak00e64ab2014-01-22 11:24:18 +0100191
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000192/* LCD */
Przemyslaw Marczak2df21cb2014-01-22 11:24:16 +0100193#define CONFIG_BMP_16BPP
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000194#define CONFIG_FB_ADDR 0x52504000
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000195#define CONFIG_EXYNOS_MIPI_DSIM
Donghwa Lee90464972012-05-09 19:23:46 +0000196#define CONFIG_VIDEO_BMP_GZIP
Przemyslaw Marczak903afe12013-11-29 18:30:43 +0100197#define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
Donghwa Lee51b1cd62012-04-05 19:36:27 +0000198
HeungJun, Kim89f95492012-01-16 21:13:05 +0000199#endif /* __CONFIG_H */