Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2004-2006 Atmel Corporation |
| 3 | * |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 4 | * Modified to support C structur SoC access by |
| 5 | * Andreas Bießmann <biessmann@corscience.de> |
| 6 | * |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 7 | * This program is free software; you can redistribute it and/or modify |
| 8 | * it under the terms of the GNU General Public License as published by |
| 9 | * the Free Software Foundation; either version 2 of the License, or |
| 10 | * (at your option) any later version. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 20 | */ |
| 21 | #include <common.h> |
Jean-Christophe PLAGNIOL-VILLARD | 843a265 | 2009-03-27 23:26:42 +0100 | [diff] [blame] | 22 | #include <watchdog.h> |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 23 | |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 24 | #include <asm/io.h> |
Haavard Skinnemoen | df548d3 | 2006-11-19 18:06:53 +0100 | [diff] [blame] | 25 | #include <asm/arch/clk.h> |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 26 | #include <asm/arch/hardware.h> |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 27 | |
| 28 | #include "atmel_usart.h" |
| 29 | |
| 30 | DECLARE_GLOBAL_DATA_PTR; |
| 31 | |
| 32 | void serial_setbrg(void) |
| 33 | { |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 34 | atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 35 | unsigned long divisor; |
| 36 | unsigned long usart_hz; |
| 37 | |
| 38 | /* |
| 39 | * Master Clock |
| 40 | * Baud Rate = -------------- |
| 41 | * 16 * CD |
| 42 | */ |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 43 | usart_hz = get_usart_clk_rate(CONFIG_USART_ID); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 44 | divisor = (usart_hz / 16 + gd->baudrate / 2) / gd->baudrate; |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 45 | writel(USART3_BF(CD, divisor), &usart->brgr); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 46 | } |
| 47 | |
| 48 | int serial_init(void) |
| 49 | { |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 50 | atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 51 | |
| 52 | writel(USART3_BIT(RSTRX) | USART3_BIT(RSTTX), &usart->cr); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 53 | |
| 54 | serial_setbrg(); |
| 55 | |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 56 | writel(USART3_BIT(RXEN) | USART3_BIT(TXEN), &usart->cr); |
| 57 | writel((USART3_BF(USART_MODE, USART3_USART_MODE_NORMAL) |
Haavard Skinnemoen | df548d3 | 2006-11-19 18:06:53 +0100 | [diff] [blame] | 58 | | USART3_BF(USCLKS, USART3_USCLKS_MCK) |
| 59 | | USART3_BF(CHRL, USART3_CHRL_8) |
| 60 | | USART3_BF(PAR, USART3_PAR_NONE) |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 61 | | USART3_BF(NBSTOP, USART3_NBSTOP_1)), |
| 62 | &usart->mr); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 63 | |
| 64 | return 0; |
| 65 | } |
| 66 | |
| 67 | void serial_putc(char c) |
| 68 | { |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 69 | atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 70 | |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 71 | if (c == '\n') |
| 72 | serial_putc('\r'); |
| 73 | |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 74 | while (!(readl(&usart->csr) & USART3_BIT(TXRDY))); |
| 75 | writel(c, &usart->thr); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 76 | } |
| 77 | |
| 78 | void serial_puts(const char *s) |
| 79 | { |
| 80 | while (*s) |
| 81 | serial_putc(*s++); |
| 82 | } |
| 83 | |
| 84 | int serial_getc(void) |
| 85 | { |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 86 | atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 87 | |
| 88 | while (!(readl(&usart->csr) & USART3_BIT(RXRDY))) |
Jean-Christophe PLAGNIOL-VILLARD | 843a265 | 2009-03-27 23:26:42 +0100 | [diff] [blame] | 89 | WATCHDOG_RESET(); |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 90 | return readl(&usart->rhr); |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 91 | } |
| 92 | |
| 93 | int serial_tstc(void) |
| 94 | { |
Reinhard Meyer | 329f0f5 | 2010-11-03 16:32:56 +0100 | [diff] [blame] | 95 | atmel_usart3_t *usart = (atmel_usart3_t *)CONFIG_USART_BASE; |
Andreas Bießmann | 125637c | 2010-09-03 10:28:05 +0200 | [diff] [blame] | 96 | return (readl(&usart->csr) & USART3_BIT(RXRDY)) != 0; |
Wolfgang Denk | f93ae78 | 2006-10-24 14:31:24 +0200 | [diff] [blame] | 97 | } |