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Mugunthan V Ndadf3132015-12-24 16:08:07 +05301/*
2 * TI OMAP timer driver
3 *
4 * Copyright (C) 2015, Texas Instruments, Incorporated
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9#include <common.h>
10#include <dm.h>
11#include <errno.h>
12#include <timer.h>
13#include <asm/io.h>
14#include <asm/arch/clock.h>
15
Mugunthan V Ndadf3132015-12-24 16:08:07 +053016/* Timer register bits */
17#define TCLR_START BIT(0) /* Start=1 */
18#define TCLR_AUTO_RELOAD BIT(1) /* Auto reload */
19#define TCLR_PRE_EN BIT(5) /* Pre-scaler enable */
20#define TCLR_PTV_SHIFT (2) /* Pre-scaler shift value */
21
22#define TIMER_CLOCK (V_SCLK / (2 << CONFIG_SYS_PTV))
23
24struct omap_gptimer_regs {
25 unsigned int tidr; /* offset 0x00 */
26 unsigned char res1[12];
27 unsigned int tiocp_cfg; /* offset 0x10 */
28 unsigned char res2[12];
29 unsigned int tier; /* offset 0x20 */
30 unsigned int tistatr; /* offset 0x24 */
31 unsigned int tistat; /* offset 0x28 */
32 unsigned int tisr; /* offset 0x2c */
33 unsigned int tcicr; /* offset 0x30 */
34 unsigned int twer; /* offset 0x34 */
35 unsigned int tclr; /* offset 0x38 */
36 unsigned int tcrr; /* offset 0x3c */
37 unsigned int tldr; /* offset 0x40 */
38 unsigned int ttgr; /* offset 0x44 */
39 unsigned int twpc; /* offset 0x48 */
40 unsigned int tmar; /* offset 0x4c */
41 unsigned int tcar1; /* offset 0x50 */
42 unsigned int tscir; /* offset 0x54 */
43 unsigned int tcar2; /* offset 0x58 */
44};
45
46/* Omap Timer Priv */
47struct omap_timer_priv {
48 struct omap_gptimer_regs *regs;
49};
50
51static int omap_timer_get_count(struct udevice *dev, u64 *count)
52{
53 struct omap_timer_priv *priv = dev_get_priv(dev);
54
55 *count = readl(&priv->regs->tcrr);
56
57 return 0;
58}
59
60static int omap_timer_probe(struct udevice *dev)
61{
62 struct timer_dev_priv *uc_priv = dev_get_uclass_priv(dev);
63 struct omap_timer_priv *priv = dev_get_priv(dev);
64
65 uc_priv->clock_rate = TIMER_CLOCK;
66
67 /* start the counter ticking up, reload value on overflow */
68 writel(0, &priv->regs->tldr);
69 /* enable timer */
70 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE_EN | TCLR_AUTO_RELOAD |
71 TCLR_START, &priv->regs->tclr);
72
73 return 0;
74}
75
76static int omap_timer_ofdata_to_platdata(struct udevice *dev)
77{
78 struct omap_timer_priv *priv = dev_get_priv(dev);
79
Simon Glassa821c4a2017-05-17 17:18:05 -060080 priv->regs = map_physmem(devfdt_get_addr(dev),
Lokesh Vutla871ca262016-03-05 16:40:32 +053081 sizeof(struct omap_gptimer_regs), MAP_NOCACHE);
Mugunthan V Ndadf3132015-12-24 16:08:07 +053082
83 return 0;
84}
85
86
87static const struct timer_ops omap_timer_ops = {
88 .get_count = omap_timer_get_count,
89};
90
91static const struct udevice_id omap_timer_ids[] = {
92 { .compatible = "ti,am335x-timer" },
93 { .compatible = "ti,am4372-timer" },
94 { .compatible = "ti,omap5430-timer" },
95 {}
96};
97
98U_BOOT_DRIVER(omap_timer) = {
99 .name = "omap_timer",
100 .id = UCLASS_TIMER,
101 .of_match = omap_timer_ids,
102 .ofdata_to_platdata = omap_timer_ofdata_to_platdata,
103 .priv_auto_alloc_size = sizeof(struct omap_timer_priv),
104 .probe = omap_timer_probe,
105 .ops = &omap_timer_ops,
106 .flags = DM_FLAG_PRE_RELOC,
107};