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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Stefan Roese2bae75a2015-04-25 06:29:56 +02002/*
3 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
Stefan Roese2bae75a2015-04-25 06:29:56 +02004 */
5
6#ifndef _CONFIG_DB_88F6820_GP_H
7#define _CONFIG_DB_88F6820_GP_H
8
9/*
10 * High Level Configuration Options (easy to change)
11 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020012
Stefan Roese2bae75a2015-04-25 06:29:56 +020013#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
14
Stefan Roese2bae75a2015-04-25 06:29:56 +020015/* I2C */
16#define CONFIG_SYS_I2C
17#define CONFIG_SYS_I2C_MVTWSI
18#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
19#define CONFIG_SYS_I2C_SLAVE 0x0
20#define CONFIG_SYS_I2C_SPEED 100000
21
Konstantin Porotchkind3c72c52018-08-29 16:34:53 +030022/*
Stefan Roese7cbaff92015-06-29 14:58:14 +020023 * SATA/SCSI/AHCI configuration
24 */
Stefan Roese7cbaff92015-06-29 14:58:14 +020025#define CONFIG_SCSI_AHCI_PLAT
26#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
27#define CONFIG_SYS_SCSI_MAX_LUN 1
28#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
29 CONFIG_SYS_SCSI_MAX_LUN)
30
Stefan Roese59565732015-06-29 14:58:16 +020031/* USB/EHCI configuration */
Stefan Roese59565732015-06-29 14:58:16 +020032#define CONFIG_EHCI_IS_TDI
33
Stefan Roese2bae75a2015-04-25 06:29:56 +020034/* Environment in SPI NOR flash */
Stefan Roese2bae75a2015-04-25 06:29:56 +020035
Stefan Roese2bae75a2015-04-25 06:29:56 +020036#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
37
Stefan Roesece2cb1d2015-08-11 12:50:58 +020038/* PCIe support */
Stefan Roese64512232015-11-25 07:37:00 +010039#ifndef CONFIG_SPL_BUILD
Stefan Roesece2cb1d2015-08-11 12:50:58 +020040#define CONFIG_PCI_SCAN_SHOW
Stefan Roese64512232015-11-25 07:37:00 +010041#endif
Stefan Roesece2cb1d2015-08-11 12:50:58 +020042
Kevin Smith3fd38af2015-05-18 16:09:46 +000043/* Keep device tree and initrd in lower memory so the kernel can access them */
44#define CONFIG_EXTRA_ENV_SETTINGS \
45 "fdt_high=0x10000000\0" \
46 "initrd_high=0x10000000\0"
47
Stefan Roese9e30b312015-03-25 13:35:15 +010048/* SPL */
Stefan Roese7853c502015-07-20 11:20:40 +020049/*
50 * Select the boot device here
51 *
52 * Currently supported are:
53 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
54 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
55 */
56#define SPL_BOOT_SPI_NOR_FLASH 1
57#define SPL_BOOT_SDIO_MMC_CARD 2
58#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
59
Stefan Roese9e30b312015-03-25 13:35:15 +010060/* Defines for SPL */
Stefan Roese9e30b312015-03-25 13:35:15 +010061#define CONFIG_SPL_SIZE (140 << 10)
Stefan Roese9e30b312015-03-25 13:35:15 +010062#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
63
64#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
65#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
66
Stefan Roese64512232015-11-25 07:37:00 +010067#ifdef CONFIG_SPL_BUILD
68#define CONFIG_SYS_MALLOC_SIMPLE
69#endif
Stefan Roese9e30b312015-03-25 13:35:15 +010070
71#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
72#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
73
Stefan Roese7853c502015-07-20 11:20:40 +020074#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese9e30b312015-03-25 13:35:15 +010075/* SPL related SPI defines */
Stefan Roese7853c502015-07-20 11:20:40 +020076#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
77#endif
78
79#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
80/* SPL related MMC defines */
Stefan Roese7853c502015-07-20 11:20:40 +020081#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
82#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese7853c502015-07-20 11:20:40 +020083#ifdef CONFIG_SPL_BUILD
84#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
85#endif
86#endif
Stefan Roese9e30b312015-03-25 13:35:15 +010087
Stefan Roese2bae75a2015-04-25 06:29:56 +020088/*
89 * mv-common.h should be defined after CMD configs since it used them
90 * to enable certain macros
91 */
92#include "mv-common.h"
93
94#endif /* _CONFIG_DB_88F6820_GP_H */