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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Aneesh V16dc7022011-09-08 11:05:49 -04002/*
3 * (C) Copyright 2010
4 * Texas Instruments Incorporated.
5 * Aneesh V <aneesh@ti.com>
6 * Steve Sakoman <steve@sakoman.com>
7 *
8 * TI OMAP4 common configuration settings
Aneesh V16dc7022011-09-08 11:05:49 -04009 */
10
Enric Balletbò i Serra6c0a0322013-12-06 21:30:18 +010011#ifndef __CONFIG_TI_OMAP4_COMMON_H
12#define __CONFIG_TI_OMAP4_COMMON_H
Aneesh V16dc7022011-09-08 11:05:49 -040013
Lokesh Vutla1d7b2892013-09-03 19:47:18 +053014#ifndef CONFIG_SYS_L2CACHE_OFF
15#define CONFIG_SYS_L2_PL310 1
16#define CONFIG_SYS_PL310_BASE 0x48242000
17#endif
Aneesh V16dc7022011-09-08 11:05:49 -040018
19/* Get CPU defs */
20#include <asm/arch/cpu.h>
Sricharan508a58f2011-11-15 09:49:55 -050021#include <asm/arch/omap.h>
Aneesh V16dc7022011-09-08 11:05:49 -040022
Lokesh Vutla1d7b2892013-09-03 19:47:18 +053023/* Use General purpose timer 1 */
24#define CONFIG_SYS_TIMERBASE GPT2_BASE
Aneesh V16dc7022011-09-08 11:05:49 -040025
26/*
Lokesh Vutla1d7b2892013-09-03 19:47:18 +053027 * For the DDR timing information we can either dynamically determine
28 * the timings to use or use pre-determined timings (based on using the
29 * dynamic method. Default to the static timing infomation.
30 */
31#define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
32#ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
33#define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
34#define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
35#endif
36
Nishanth Menon9a0f4002015-07-22 18:05:41 -050037#include <configs/ti_armv7_omap.h>
Aneesh V16dc7022011-09-08 11:05:49 -040038
39/*
40 * Hardware drivers
41 */
Thomas Chouc7b96862015-11-19 21:48:12 +080042#define CONFIG_SYS_NS16550_CLK 48000000
Tom Rini53ee6342015-09-17 16:47:03 -040043#if defined(CONFIG_SPL_BUILD) || !defined(CONFIG_DM_SERIAL)
Aneesh V16dc7022011-09-08 11:05:49 -040044#define CONFIG_SYS_NS16550_SERIAL
45#define CONFIG_SYS_NS16550_REG_SIZE (-4)
Aneesh V16dc7022011-09-08 11:05:49 -040046#define CONFIG_SYS_NS16550_COM3 UART3_BASE
Tom Rini53ee6342015-09-17 16:47:03 -040047#endif
Aneesh V16dc7022011-09-08 11:05:49 -040048
Aneesh V16dc7022011-09-08 11:05:49 -040049/* TWL6030 */
Balaji T K14fa2dd2011-09-08 06:34:57 +000050#ifndef CONFIG_SPL_BUILD
Aneesh V16dc7022011-09-08 11:05:49 -040051#define CONFIG_TWL6030_POWER 1
Balaji T K14fa2dd2011-09-08 06:34:57 +000052#endif
Aneesh V16dc7022011-09-08 11:05:49 -040053
Aneesh V16dc7022011-09-08 11:05:49 -040054/* USB */
Aneesh V16dc7022011-09-08 11:05:49 -040055
56/* USB device configuration */
57#define CONFIG_USB_DEVICE 1
58#define CONFIG_USB_TTY 1
Aneesh V16dc7022011-09-08 11:05:49 -040059
Aneesh V16dc7022011-09-08 11:05:49 -040060/*
61 * Environment setup
62 */
Tom Rini2a1a29c2015-12-10 16:46:03 -050063#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
64 "bootcmd_" #devtypel #instance "=" \
65 "setenv mmcdev " #instance"; "\
66 "setenv bootpart " #instance":2 ; "\
67 "run mmcboot\0"
68
69#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
70 #devtypel #instance " "
71
72#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
73 #devtypel #instance " "
74
75#define BOOT_TARGET_DEVICES(func) \
76 func(MMC, mmc, 0) \
77 func(LEGACY_MMC, legacy_mmc, 0) \
78 func(MMC, mmc, 1) \
79 func(LEGACY_MMC, legacy_mmc, 1) \
80 func(PXE, pxe, na) \
81 func(DHCP, dhcp, na)
82
Tom Rini2a1a29c2015-12-10 16:46:03 -050083#include <config_distro_bootcmd.h>
Sekhar Nori88fdfcd2017-04-06 14:52:56 +053084#include <environment/ti/mmc.h>
Tom Rini2a1a29c2015-12-10 16:46:03 -050085
Aneesh V16dc7022011-09-08 11:05:49 -040086#define CONFIG_EXTRA_ENV_SETTINGS \
Tom Rinifb3ad9b2014-03-28 15:03:29 -040087 DEFAULT_LINUX_BOOT_ENV \
Lokesh Vutla85d17be2015-08-28 13:35:07 +053088 DEFAULT_MMC_TI_ARGS \
Lokesh Vutla1e93cc82016-11-29 11:58:00 +053089 DEFAULT_FIT_TI_ARGS \
Aneesh Vd71a4912011-11-21 23:38:58 +000090 "console=ttyO2,115200n8\0" \
Dan Murphya7143212013-06-06 13:27:06 -050091 "fdtfile=undefined\0" \
SRICHARAN R143070d2013-04-04 23:39:27 +000092 "bootpart=0:2\0" \
93 "bootdir=/boot\0" \
SRICHARAN Raaed0a22013-04-04 23:39:47 +000094 "bootfile=zImage\0" \
Aneesh V16dc7022011-09-08 11:05:49 -040095 "usbtty=cdc_acm\0" \
96 "vram=16M\0" \
Ash Charlesffe16912014-05-14 08:34:34 -070097 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
Ash Charlesffe16912014-05-14 08:34:34 -070098 "uimageboot=echo Booting from mmc${mmcdev} ...; " \
Lokesh Vutla85d17be2015-08-28 13:35:07 +053099 "run args_mmc; " \
Ash Charlesffe16912014-05-14 08:34:34 -0700100 "bootm ${loadaddr}\0" \
SRICHARAN R143070d2013-04-04 23:39:27 +0000101 "findfdt="\
102 "if test $board_name = sdp4430; then " \
103 "setenv fdtfile omap4-sdp.dtb; fi; " \
104 "if test $board_name = panda; then " \
Dan Murphy34f667b2013-04-18 06:29:53 +0000105 "setenv fdtfile omap4-panda.dtb; fi;" \
Dan Murphy7d47d1c2013-06-13 11:21:13 -0500106 "if test $board_name = panda-a4; then " \
107 "setenv fdtfile omap4-panda-a4.dtb; fi;" \
Dan Murphy34f667b2013-04-18 06:29:53 +0000108 "if test $board_name = panda-es; then " \
Dan Murphya7143212013-06-06 13:27:06 -0500109 "setenv fdtfile omap4-panda-es.dtb; fi;" \
Ash Charlesffe16912014-05-14 08:34:34 -0700110 "if test $board_name = duovero; then " \
Ash Charles99907172014-06-06 11:36:50 -0700111 "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \
Dan Murphya7143212013-06-06 13:27:06 -0500112 "if test $fdtfile = undefined; then " \
113 "echo WARNING: Could not determine device tree to use; fi; \0" \
Tom Rini2a1a29c2015-12-10 16:46:03 -0500114 BOOTENV
Aneesh V16dc7022011-09-08 11:05:49 -0400115
Lokesh Vutladcc23572013-12-04 12:22:55 +0530116/*
117 * Defines for SPL
118 * It is known that this will break HS devices. Since the current size of
119 * SPL is overlapped with public stack and breaking non HS devices to boot.
120 * So moving TEXT_BASE down to non-HS limit.
121 */
Tom Rinid3289aa2014-04-03 07:52:53 -0400122#define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
123 (128 << 20))
Aneesh V16dc7022011-09-08 11:05:49 -0400124
Nishanth Menon4f80d5b2014-01-07 20:06:56 -0600125#ifdef CONFIG_SPL_BUILD
126/* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
127#undef CONFIG_SYS_I2C
Nishanth Menon4f80d5b2014-01-07 20:06:56 -0600128#endif
129
Enric Balletbò i Serra6c0a0322013-12-06 21:30:18 +0100130#endif /* __CONFIG_TI_OMAP4_COMMON_H */