blob: a5a524008b4a216da740655e1ebf3bdc90124bc2 [file] [log] [blame]
Rob Herring37fc0ed2011-10-24 08:50:20 +00001/*
2 * Copyright 2010-2011 Calxeda, Inc.
3 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02004 * SPDX-License-Identifier: GPL-2.0+
Rob Herring37fc0ed2011-10-24 08:50:20 +00005 */
6
7#ifndef __CONFIG_H
8#define __CONFIG_H
9
Rob Herringac9ae132014-04-10 16:17:30 -050010#include <config_distro_defaults.h>
11
Rob Herring185a5bb2013-06-12 22:24:47 -050012#define CONFIG_SYS_DCACHE_OFF
Rob Herring37fc0ed2011-10-24 08:50:20 +000013
Rob Herring37fc0ed2011-10-24 08:50:20 +000014#define CONFIG_SYS_BOOTMAPSZ (16 << 20)
15
Rob Herring9df1bd42013-10-04 10:22:43 -050016#define CONFIG_SYS_TIMER_RATE (150000000/256)
17#define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4)
18#define CONFIG_SYS_TIMER_COUNTS_DOWN
19
Rob Herring37fc0ed2011-10-24 08:50:20 +000020/*
21 * Size of malloc() pool
22 */
23#define CONFIG_SYS_MALLOC_LEN (512 * 1024)
24
25#define CONFIG_PL011_SERIAL
26#define CONFIG_PL011_CLOCK 150000000
27#define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) }
28#define CONFIG_CONS_INDEX 0
29
Rob Herring877012d2012-02-01 16:57:54 +000030#define CONFIG_BOOTCOUNT_LIMIT
Stefan Roese0044c422012-08-16 17:55:41 +000031#define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
32#define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */
Rob Herring877012d2012-02-01 16:57:54 +000033#define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c
34
Rob Herring37fc0ed2011-10-24 08:50:20 +000035#define CONFIG_MISC_INIT_R
Rob Herring37fc0ed2011-10-24 08:50:20 +000036#define CONFIG_SCSI_AHCI_PLAT
37#define CONFIG_SYS_SCSI_MAX_SCSI_ID 5
38#define CONFIG_SYS_SCSI_MAX_LUN 1
39#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
40 CONFIG_SYS_SCSI_MAX_LUN)
41
Rob Herring9a420982011-12-15 11:15:50 +000042#define CONFIG_CALXEDA_XGMAC
43
Rob Herring37fc0ed2011-10-24 08:50:20 +000044/*
45 * Command line configuration.
46 */
Rob Herring37fc0ed2011-10-24 08:50:20 +000047
Rob Herringe1df2832013-06-12 22:24:51 -050048#define CONFIG_BOOT_RETRY_TIME -1
49#define CONFIG_RESET_TO_RETRY
Stefan Roesed126e012015-05-18 14:08:23 +020050
Rob Herring37fc0ed2011-10-24 08:50:20 +000051/*
52 * Miscellaneous configurable options
53 */
Rob Herring185a5bb2013-06-12 22:24:47 -050054#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
Rob Herring37fc0ed2011-10-24 08:50:20 +000055#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
Rob Herring37fc0ed2011-10-24 08:50:20 +000056
57#define CONFIG_SYS_LOAD_ADDR 0x800000
Rob Herring185a5bb2013-06-12 22:24:47 -050058#define CONFIG_SYS_64BIT_LBA
59
Rob Herring37fc0ed2011-10-24 08:50:20 +000060/*-----------------------------------------------------------------------
Rob Herring37fc0ed2011-10-24 08:50:20 +000061 * Physical Memory Map
Rob Herring32b4a8a2015-06-21 00:29:55 +010062 * The DRAM is already setup, so do not touch the DT node later.
Rob Herring37fc0ed2011-10-24 08:50:20 +000063 */
Rob Herring32b4a8a2015-06-21 00:29:55 +010064#define CONFIG_NR_DRAM_BANKS 0
Rob Herring37fc0ed2011-10-24 08:50:20 +000065#define PHYS_SDRAM_1_SIZE (4089 << 20)
66#define CONFIG_SYS_MEMTEST_START 0x100000
67#define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000)
68
Jason Hobbsa34e8542012-02-01 16:57:56 +000069/* Environment data setup
70*/
Jason Hobbsa34e8542012-02-01 16:57:56 +000071#define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */
72#define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */
73#define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */
74#define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR
Rob Herring37fc0ed2011-10-24 08:50:20 +000075
76#define CONFIG_SYS_SDRAM_BASE 0x00000000
Rob Herring7b816492012-02-01 16:57:53 +000077#define CONFIG_SYS_TEXT_BASE 0x00008000
Rob Herring37fc0ed2011-10-24 08:50:20 +000078#define CONFIG_SYS_INIT_SP_ADDR 0x01000000
79#define CONFIG_SKIP_LOWLEVEL_INIT
80
81#endif