Chris Packham | d55254a | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
| 2 | |
| 3 | #include <common.h> |
Simon Glass | 5e6267a | 2019-12-28 10:44:48 -0700 | [diff] [blame] | 4 | #include <net.h> |
Chris Packham | d55254a | 2019-04-13 20:21:18 +1200 | [diff] [blame] | 5 | #include <linux/io.h> |
| 6 | #include <miiphy.h> |
| 7 | #include <netdev.h> |
| 8 | #include <asm/arch/cpu.h> |
| 9 | #include <asm/arch/soc.h> |
| 10 | #include <asm/arch/mpp.h> |
| 11 | #include <asm/arch/gpio.h> |
| 12 | |
| 13 | #define DB_88F6281_OE_LOW ~(BIT(7)) |
| 14 | #define DB_88F6281_OE_HIGH ~(BIT(15) | BIT(14) | BIT(13) | BIT(4)) |
| 15 | #define DB_88F6281_OE_VAL_LOW BIT(7) |
| 16 | #define DB_88F6281_OE_VAL_HIGH 0 |
| 17 | |
| 18 | DECLARE_GLOBAL_DATA_PTR; |
| 19 | |
| 20 | int board_early_init_f(void) |
| 21 | { |
| 22 | mvebu_config_gpio(DB_88F6281_OE_VAL_LOW, |
| 23 | DB_88F6281_OE_VAL_HIGH, |
| 24 | DB_88F6281_OE_LOW, DB_88F6281_OE_HIGH); |
| 25 | |
| 26 | /* Multi-Purpose Pins Functionality configuration */ |
| 27 | static const u32 kwmpp_config[] = { |
| 28 | #ifdef CONFIG_CMD_NAND |
| 29 | MPP0_NF_IO2, |
| 30 | MPP1_NF_IO3, |
| 31 | MPP2_NF_IO4, |
| 32 | MPP3_NF_IO5, |
| 33 | #else |
| 34 | MPP0_SPI_SCn, |
| 35 | MPP1_SPI_MOSI, |
| 36 | MPP2_SPI_SCK, |
| 37 | MPP3_SPI_MISO, |
| 38 | #endif |
| 39 | MPP4_NF_IO6, |
| 40 | MPP5_NF_IO7, |
| 41 | MPP6_SYSRST_OUTn, |
| 42 | MPP7_GPO, |
| 43 | MPP8_TW_SDA, |
| 44 | MPP9_TW_SCK, |
| 45 | MPP10_UART0_TXD, |
| 46 | MPP11_UART0_RXD, |
| 47 | MPP12_SD_CLK, |
| 48 | MPP13_SD_CMD, |
| 49 | MPP14_SD_D0, |
| 50 | MPP15_SD_D1, |
| 51 | MPP16_SD_D2, |
| 52 | MPP17_SD_D3, |
| 53 | MPP18_NF_IO0, |
| 54 | MPP19_NF_IO1, |
| 55 | MPP20_SATA1_ACTn, |
| 56 | MPP21_SATA0_ACTn, |
| 57 | MPP22_GPIO, |
| 58 | MPP23_GPIO, |
| 59 | MPP24_GPIO, |
| 60 | MPP25_GPIO, |
| 61 | MPP26_GPIO, |
| 62 | MPP27_GPIO, |
| 63 | MPP28_GPIO, |
| 64 | MPP29_GPIO, |
| 65 | MPP30_GPIO, |
| 66 | MPP31_GPIO, |
| 67 | MPP32_GPIO, |
| 68 | MPP33_GPIO, |
| 69 | MPP34_GPIO, |
| 70 | MPP35_GPIO, |
| 71 | MPP36_GPIO, |
| 72 | MPP37_GPIO, |
| 73 | MPP38_GPIO, |
| 74 | MPP39_GPIO, |
| 75 | MPP40_GPIO, |
| 76 | MPP41_GPIO, |
| 77 | MPP42_GPIO, |
| 78 | MPP43_GPIO, |
| 79 | MPP44_GPIO, |
| 80 | MPP45_GPIO, |
| 81 | MPP46_GPIO, |
| 82 | MPP47_GPIO, |
| 83 | MPP48_GPIO, |
| 84 | MPP49_GPIO, |
| 85 | 0 |
| 86 | }; |
| 87 | kirkwood_mpp_conf(kwmpp_config, NULL); |
| 88 | |
| 89 | return 0; |
| 90 | } |
| 91 | |
| 92 | int board_init(void) |
| 93 | { |
| 94 | gd->bd->bi_boot_params = mvebu_sdram_bar(0) + 0x100; |
| 95 | |
| 96 | return 0; |
| 97 | } |
| 98 | |
| 99 | #ifdef CONFIG_RESET_PHY_R |
| 100 | /* automatically defined by kirkwood config.h */ |
| 101 | void reset_phy(void) |
| 102 | { |
| 103 | } |
| 104 | #endif |