blob: 187e384305e78625568bd08c9314be70e0206302 [file] [log] [blame]
ramneek mehresh9dee2052013-08-05 16:00:16 +05301/*
2 * Freescale USB Controller
3 *
4 * Copyright 2013 Freescale Semiconductor, Inc.
5 *
York Sun49d87b12013-08-14 10:56:49 -07006 * SPDX-License-Identifier: GPL-2.0+
ramneek mehresh9dee2052013-08-05 16:00:16 +05307 */
8
9#ifndef _ASM_FSL_USB_H_
10#define _ASM_FSL_USB_H_
11
12#ifdef CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
13struct ccsr_usb_port_ctrl {
14 u32 ctrl;
15 u32 drvvbuscfg;
16 u32 pwrfltcfg;
17 u32 sts;
18 u8 res_14[0xc];
19 u32 bistcfg;
20 u32 biststs;
21 u32 abistcfg;
22 u32 abiststs;
23 u8 res_30[0x10];
24 u32 xcvrprg;
25 u32 anaprg;
26 u32 anadrv;
27 u32 anasts;
28};
29
30struct ccsr_usb_phy {
31 u32 id;
32 struct ccsr_usb_port_ctrl port1;
33 u8 res_50[0xc];
34 u32 tvr;
35 u32 pllprg[4];
36 u8 res_70[0x4];
37 u32 anaccfg;
38 u32 dbg;
39 u8 res_7c[0x4];
40 struct ccsr_usb_port_ctrl port2;
41 u8 res_dc[0x334];
42};
43
44#define CONFIG_SYS_FSL_USB_CTRL_PHY_EN (1 << 0)
45#define CONFIG_SYS_FSL_USB_DRVVBUS_CR_EN (1 << 1)
46#define CONFIG_SYS_FSL_USB_PWRFLT_CR_EN (1 << 1)
47#define CONFIG_SYS_FSL_USB_PLLPRG1_PHY_DIV (1 << 0)
48#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY2_CLK_EN (1 << 0)
49#define CONFIG_SYS_FSL_USB_PLLPRG2_PHY1_CLK_EN (1 << 1)
50#define CONFIG_SYS_FSL_USB_PLLPRG2_FRAC_LPF_EN (1 << 13)
Nikhil Badolad1c561c2014-04-15 14:44:52 +053051#ifdef CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
52#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV_INTERNAL_CLK (5 << 4)
53#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI_INTERNAL_CLK (6 << 16)
54#define CONFIG_SYS_FSL_USB_INTERNAL_SOC_CLK_EN (1 << 20)
55#endif
ramneek mehresh9dee2052013-08-05 16:00:16 +053056#define CONFIG_SYS_FSL_USB_PLLPRG2_REF_DIV (1 << 4)
57#define CONFIG_SYS_FSL_USB_PLLPRG2_MFI (5 << 16)
58#define CONFIG_SYS_FSL_USB_PLLPRG2_PLL_EN (1 << 21)
59#define CONFIG_SYS_FSL_USB_SYS_CLK_VALID (1 << 0)
Suresh Gupta9c641a82014-02-26 14:29:12 +053060#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_EN (1 << 7)
61#define CONFIG_SYS_FSL_USB_XCVRPRG_HS_DCNT_PROG_MASK (3 << 4)
62
63#define INC_DCNT_THRESHOLD_25MV (0 << 4)
64#define INC_DCNT_THRESHOLD_50MV (1 << 4)
65#define DEC_DCNT_THRESHOLD_25MV (2 << 4)
66#define DEC_DCNT_THRESHOLD_50MV (3 << 4)
ramneek mehresh9dee2052013-08-05 16:00:16 +053067#else
68struct ccsr_usb_phy {
Suresh Gupta9c641a82014-02-26 14:29:12 +053069 u32 config1;
70 u32 config2;
71 u32 config3;
72 u32 config4;
73 u32 config5;
74 u32 status1;
ramneek mehresh9dee2052013-08-05 16:00:16 +053075 u32 usb_enable_override;
76 u8 res[0xe4];
77};
Suresh Gupta9c641a82014-02-26 14:29:12 +053078#define CONFIG_SYS_FSL_USB_HS_DISCNCT_INC (3 << 22)
79#define CONFIG_SYS_FSL_USB_RX_AUTO_CAL_RD_WR_SEL (1 << 20)
80#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_0 13
81#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_WR_3 16
82#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_0 0
83#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_RD_3 3
84#define CONFIG_SYS_FSL_USB_ENABLE_OVERRIDE 1
85#define CONFIG_SYS_FSL_USB_SQUELCH_PROG_MASK 0x07
ramneek mehresh9dee2052013-08-05 16:00:16 +053086#endif
87
Nikhil Badolac26c80a2014-09-30 11:22:43 +053088/* USB Erratum Checking code */
89#ifdef CONFIG_PPC
Nikhil Badola0c771062015-03-11 15:44:23 +053090static inline bool has_dual_phy(void)
91{
92 u32 svr = get_svr();
93 u32 soc = SVR_SOC_VER(svr);
94
95 switch (soc) {
96 case SVR_T1023:
97 case SVR_T1024:
98 case SVR_T1013:
99 case SVR_T1014:
100 return IS_SVR_REV(svr, 1, 0);
101 case SVR_T1040:
102 case SVR_T1042:
103 case SVR_T1020:
104 case SVR_T1022:
105 case SVR_T2080:
106 case SVR_T2081:
107 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
108 case SVR_T4240:
109 case SVR_T4160:
110 case SVR_T4080:
111 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
112 }
113
114 return false;
115}
116
Nikhil Badolac26c80a2014-09-30 11:22:43 +0530117static inline bool has_erratum_a006261(void)
118{
119 u32 svr = get_svr();
120 u32 soc = SVR_SOC_VER(svr);
121
122 switch (soc) {
123 case SVR_P1010:
124 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
125 case SVR_P2041:
126 case SVR_P2040:
127 return IS_SVR_REV(svr, 1, 0) ||
128 IS_SVR_REV(svr, 1, 1) || IS_SVR_REV(svr, 2, 1);
129 case SVR_P3041:
130 return IS_SVR_REV(svr, 1, 0) ||
131 IS_SVR_REV(svr, 1, 1) ||
132 IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 2, 1);
133 case SVR_P5010:
134 case SVR_P5020:
135 case SVR_P5021:
136 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
137 case SVR_T4240:
138 case SVR_T4160:
139 case SVR_T4080:
140 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
141 case SVR_T1040:
142 return IS_SVR_REV(svr, 1, 0);
143 case SVR_T2080:
144 case SVR_T2081:
145 return IS_SVR_REV(svr, 1, 0);
146 case SVR_P5040:
147 return IS_SVR_REV(svr, 1, 0);
148 }
149
150 return false;
151}
152
153static inline bool has_erratum_a007075(void)
154{
155 u32 svr = get_svr();
156 u32 soc = SVR_SOC_VER(svr);
157
158 switch (soc) {
159 case SVR_B4860:
160 case SVR_B4420:
161 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
162 case SVR_P1010:
163 return IS_SVR_REV(svr, 1, 0);
164 case SVR_P4080:
165 return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
166 }
167 return false;
168}
Nikhil Badolaf3dff692014-10-17 09:12:07 +0530169
170static inline bool has_erratum_a007798(void)
171{
172 return SVR_SOC_VER(get_svr()) == SVR_T4240 &&
173 IS_SVR_REV(get_svr(), 2, 0);
174}
Nikhil Badolada5ce442014-10-30 10:11:28 +0530175
176static inline bool has_erratum_a007792(void)
177{
178 u32 svr = get_svr();
179 u32 soc = SVR_SOC_VER(svr);
180
181 switch (soc) {
182 case SVR_T4240:
183 case SVR_T4160:
Rajesh Bhagat7310ac42015-11-30 12:31:34 +0530184 case SVR_T4080:
Nikhil Badolada5ce442014-10-30 10:11:28 +0530185 return IS_SVR_REV(svr, 2, 0);
Nikhil Badola4a4323a2015-03-11 15:44:42 +0530186 case SVR_T1024:
187 case SVR_T1023:
Nikhil Badolada5ce442014-10-30 10:11:28 +0530188 return IS_SVR_REV(svr, 1, 0);
Nikhil Badola4a4323a2015-03-11 15:44:42 +0530189 case SVR_T1040:
190 case SVR_T1042:
191 case SVR_T1020:
192 case SVR_T1022:
Nikhil Badolada5ce442014-10-30 10:11:28 +0530193 case SVR_T2080:
194 case SVR_T2081:
195 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
196 }
197 return false;
198}
199
Nikhil Badolab4e78fa2015-03-17 18:16:33 +0530200static inline bool has_erratum_a005697(void)
201{
202 u32 svr = get_svr();
203 u32 soc = SVR_SOC_VER(svr);
204
205 switch (soc) {
206 case SVR_9131:
207 case SVR_9132:
208 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
209 }
210 return false;
211}
212
Nikhil Badola0dc78ff2014-11-21 17:25:21 +0530213static inline bool has_erratum_a004477(void)
214{
215 u32 svr = get_svr();
216 u32 soc = SVR_SOC_VER(svr);
217
218 switch (soc) {
219 case SVR_P1010:
220 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
221 case SVR_P1022:
222 case SVR_9131:
223 case SVR_9132:
224 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 1, 1);
225 case SVR_P2020:
226 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0) ||
227 IS_SVR_REV(svr, 2, 1);
228 case SVR_B4860:
229 case SVR_B4420:
230 return IS_SVR_REV(svr, 1, 0) || IS_SVR_REV(svr, 2, 0);
231 case SVR_P4080:
232 return IS_SVR_REV(svr, 2, 0) || IS_SVR_REV(svr, 3, 0);
233 }
234
235 return false;
236}
Nikhil Badolac26c80a2014-09-30 11:22:43 +0530237#else
Nikhil Badola0c771062015-03-11 15:44:23 +0530238static inline bool has_dual_phy(void)
239{
240 return false;
241}
242
Nikhil Badolac26c80a2014-09-30 11:22:43 +0530243static inline bool has_erratum_a006261(void)
244{
245 return false;
246}
247
248static inline bool has_erratum_a007075(void)
249{
250 return false;
251}
252
Nikhil Badolaf3dff692014-10-17 09:12:07 +0530253static inline bool has_erratum_a007798(void)
254{
255 return false;
256}
257
Nikhil Badolada5ce442014-10-30 10:11:28 +0530258static inline bool has_erratum_a007792(void)
259{
260 return false;
261}
Nikhil Badolab4e78fa2015-03-17 18:16:33 +0530262
263static inline bool has_erratum_a005697(void)
264{
265 return false;
266}
Nikhil Badola0dc78ff2014-11-21 17:25:21 +0530267
268static inline bool has_erratum_a004477(void)
269{
270 return false;
271}
Nikhil Badolac26c80a2014-09-30 11:22:43 +0530272#endif
ramneek mehresh9dee2052013-08-05 16:00:16 +0530273#endif /*_ASM_FSL_USB_H_ */