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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / eccfb49046fde7af9ae12ab59d97ae867368eaa8 / . / arch / x86 / cpu / start.S
blob: 6c84c43f06aa917c466f50c58b40020c8fcc3284 [file] [log] [blame]
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]1/*
Graeme Russfea25722011-04-13 19:43:28 +1000[diff] [blame]2 * U-boot - x86 Startup Code
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]3 *
Graeme Russdbf71152011-04-13 19:43:26 +1000[diff] [blame]4 * (C) Copyright 2008-2011
5 * Graeme Russ, <graeme.russ@gmail.com>
6 *
7 * (C) Copyright 2002
8 * Daniel Engström, Omicron Ceti AB, <daniel@omicron.se>
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]29#include <config.h>
30#include <version.h>
Graeme Russ161b3582010-10-07 20:03:29 +1100[diff] [blame]31#include <asm/global_data.h>
Graeme Russ0c24c9c2011-02-12 15:11:32 +1100[diff] [blame]32#include <asm/processor-flags.h>
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]33
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]34.section .text
35.code32
36.globl _start
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]37.type _start, @function
Graeme Russfea25722011-04-13 19:43:28 +1000[diff] [blame]38.globl _x86boot_start
39_x86boot_start:
Graeme Russ077e1952010-04-24 00:05:42 +1000[diff] [blame]40 /*
41 * This is the fail safe 32-bit bootstrap entry point. The
42 * following code is not executed from a cold-reset (actually, a
43 * lot of it is, but from real-mode after cold reset. It is
44 * repeated here to put the board into a state as close to cold
45 * reset as necessary)
46 */
47 cli
48 cld
49
50 /* Turn of cache (this might require a 486-class CPU) */
51 movl %cr0, %eax
Graeme Russ0c24c9c2011-02-12 15:11:32 +1100[diff] [blame]52 orl $(X86_CR0_NW | X86_CR0_CD), %eax
Graeme Russ077e1952010-04-24 00:05:42 +1000[diff] [blame]53 movl %eax, %cr0
54 wbinvd
55
56 /* Tell 32-bit code it is being entered from an in-RAM copy */
Graeme Russc81b26b2010-10-07 20:03:30 +1100[diff] [blame]57 movw $GD_FLG_WARM_BOOT, %bx
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]58_start:
Graeme Russ077e1952010-04-24 00:05:42 +1000[diff] [blame]59 /* This is the 32-bit cold-reset entry point */
60
Graeme Russdbf71152011-04-13 19:43:26 +1000[diff] [blame]61 /* Load the segement registes to match the gdt loaded in start16.S */
62 movl $0x18, %eax
Graeme Russ8ffb2e82010-10-07 20:03:21 +1100[diff] [blame]63 movw %ax, %fs
64 movw %ax, %ds
65 movw %ax, %gs
66 movw %ax, %es
67 movw %ax, %ss
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]68
Mike Williams16263082011-07-22 04:01:30 +0000[diff] [blame]69 /* Clear the interrupt vectors */
Graeme Russ077e1952010-04-24 00:05:42 +1000[diff] [blame]70 lidt blank_idt_ptr
71
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]72 /* Early platform init (setup gpio, etc ) */
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]73 jmp early_board_init
Graeme Russ88fa0a62010-10-07 20:03:27 +1100[diff] [blame]74.globl early_board_init_ret
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]75early_board_init_ret:
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]76
Graeme Russed4cba72011-02-12 15:11:52 +1100[diff] [blame]77 /* Initialise Cache-As-RAM */
78 jmp car_init
79.globl car_init_ret
80car_init_ret:
81 /*
82 * We now have CONFIG_SYS_CAR_SIZE bytes of Cache-As-RAM (or SRAM,
83 * or fully initialised SDRAM - we really don't care which)
84 * starting at CONFIG_SYS_CAR_ADDR to be used as a temporary stack
85 */
86 movl $CONFIG_SYS_INIT_SP_ADDR, %esp
Graeme Russ4e334672011-02-12 15:11:33 +1100[diff] [blame]87
Graeme Russ96cd6642011-02-12 15:11:54 +1100[diff] [blame]88 /* Set parameter to board_init_f() to boot flags */
Graeme Russdbf71152011-04-13 19:43:26 +1000[diff] [blame]89 xorl %eax, %eax
90 movw %bx, %ax
Graeme Russ161b3582010-10-07 20:03:29 +1100[diff] [blame]91
Graeme Russdbf71152011-04-13 19:43:26 +1000[diff] [blame]92 /* Enter, U-boot! */
93 call board_init_f
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]94
95 /* indicate (lack of) progress */
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]96 movw $0x85, %ax
Graeme Russfb002902011-02-12 15:11:58 +1100[diff] [blame]97 jmp die
98
99.globl relocate_code
100.type relocate_code, @function
101relocate_code:
102 /*
103 * SDRAM has been initialised, U-Boot code has been copied into
104 * RAM, BSS has been cleared and relocation adjustments have been
105 * made. It is now time to jump into the in-RAM copy of U-Boot
106 *
107 * %eax = Address of top of stack
108 * %edx = Address of Global Data
109 * %ecx = Base address of in-RAM copy of U-Boot
110 */
111
112 /* Setup stack in RAM */
113 movl %eax, %esp
114
115 /* Setup call address of in-RAM copy of board_init_r() */
116 movl $board_init_r, %ebp
Graeme Russ5fed8212011-02-12 15:12:05 +1100[diff] [blame]117 addl (GD_RELOC_OFF * 4)(%edx), %ebp
Graeme Russfb002902011-02-12 15:11:58 +1100[diff] [blame]118
119 /* Setup parameters to board_init_r() */
120 movl %edx, %eax
121 movl %ecx, %edx
122
123 /* Jump to in-RAM copy of board_init_r() */
124 call *%ebp
125
wdenk2262cfe2002-11-18 00:14:45 +0000[diff] [blame]126die: hlt
127 jmp die
wdenk8bde7f72003-06-27 21:31:46 +0000[diff] [blame]128 hlt
Graeme Russ077e1952010-04-24 00:05:42 +1000[diff] [blame]129
130blank_idt_ptr:
131 .word 0 /* limit */
132 .long 0 /* base */