blob: ed5437eec94d8daf892656ab856e8cdeb307c642 [file] [log] [blame]
Jason Jinece92f82007-07-06 08:34:56 +08001/****************************************************************************
2*
3* BIOS emulator and interface
4* to Realmode X86 Emulator Library
5*
6* Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
7* Jason Jin <Jason.jin@freescale.com>
8*
9* Copyright (C) 1996-1999 SciTech Software, Inc.
10*
11* ========================================================================
12*
13* Permission to use, copy, modify, distribute, and sell this software and
14* its documentation for any purpose is hereby granted without fee,
15* provided that the above copyright notice appear in all copies and that
16* both that copyright notice and this permission notice appear in
17* supporting documentation, and that the name of the authors not be used
18* in advertising or publicity pertaining to distribution of the software
19* without specific, written prior permission. The authors makes no
20* representations about the suitability of this software for any purpose.
21* It is provided "as is" without express or implied warranty.
22*
23* THE AUTHORS DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
24* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
25* EVENT SHALL THE AUTHORS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
26* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF
27* USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
28* OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
29* PERFORMANCE OF THIS SOFTWARE.
30*
31* ========================================================================
32*
33* Language: ANSI C
34* Environment: Any
35* Developer: Kendall Bennett
36*
37* Description: Module implementing the BIOS specific functions.
38*
39* Jason ported this file to u-boot to run the ATI video card
40* video BIOS.
41*
42****************************************************************************/
43
44#include "biosemui.h"
45
46/*----------------------------- Implementation ----------------------------*/
47
48/****************************************************************************
49PARAMETERS:
50intno - Interrupt number being serviced
51
52REMARKS:
53Handler for undefined interrupts.
54****************************************************************************/
55static void X86API undefined_intr(int intno)
56{
57 if (BE_rdw(intno * 4 + 2) == BIOS_SEG) {
58 DB(printf("biosEmu: undefined interrupt %xh called!\n", intno);)
59 } else
60 X86EMU_prepareForInt(intno);
61}
62
63/****************************************************************************
64PARAMETERS:
65intno - Interrupt number being serviced
66
67REMARKS:
68This function handles the default system BIOS Int 10h (the default is stored
69in the Int 42h vector by the system BIOS at bootup). We only need to handle
70a small number of special functions used by the BIOS during POST time.
71****************************************************************************/
72static void X86API int42(int intno)
73{
74 if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {
75 if (M.x86.R_AL == 0) {
76 /* Enable CPU accesses to video memory */
77 PM_outpb(0x3c2, PM_inpb(0x3cc) | (u8) 0x02);
78 return;
79 } else if (M.x86.R_AL == 1) {
80 /* Disable CPU accesses to video memory */
81 PM_outpb(0x3c2, PM_inpb(0x3cc) & (u8) ~ 0x02);
82 return;
83 }
84#ifdef DEBUG
85 else {
86 printf("int42: unknown function AH=0x12, BL=0x32, AL=%#02x\n",
87 M.x86.R_AL);
88 }
89#endif
90 }
91#ifdef DEBUG
92 else {
93 printf("int42: unknown function AH=%#02x, AL=%#02x, BL=%#02x\n",
94 M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);
95 }
96#endif
97}
98
99/****************************************************************************
100PARAMETERS:
101intno - Interrupt number being serviced
102
103REMARKS:
104This function handles the default system BIOS Int 10h. If the POST code
105has not yet re-vectored the Int 10h BIOS interrupt vector, we handle this
106by simply calling the int42 interrupt handler above. Very early in the
107BIOS POST process, the vector gets replaced and we simply let the real
108mode interrupt handler process the interrupt.
109****************************************************************************/
110static void X86API int10(int intno)
111{
112 if (BE_rdw(intno * 4 + 2) == BIOS_SEG)
113 int42(intno);
114 else
115 X86EMU_prepareForInt(intno);
116}
117
118/* Result codes returned by the PCI BIOS */
119
120#define SUCCESSFUL 0x00
121#define FUNC_NOT_SUPPORT 0x81
122#define BAD_VENDOR_ID 0x83
123#define DEVICE_NOT_FOUND 0x86
124#define BAD_REGISTER_NUMBER 0x87
125#define SET_FAILED 0x88
126#define BUFFER_TOO_SMALL 0x89
127
128/****************************************************************************
129PARAMETERS:
130intno - Interrupt number being serviced
131
132REMARKS:
133This function handles the default Int 1Ah interrupt handler for the real
134mode code, which provides support for the PCI BIOS functions. Since we only
135want to allow the real mode BIOS code *only* see the PCI config space for
136its own device, we only return information for the specific PCI config
137space that we have passed in to the init function. This solves problems
138when using the BIOS to warm boot a secondary adapter when there is an
139identical adapter before it on the bus (some BIOS'es get confused in this
140case).
141****************************************************************************/
142static void X86API int1A(int unused)
143{
144 u16 pciSlot;
145
146#ifdef __KERNEL__
147 u8 interface, subclass, baseclass;
148
149 /* Initialise the PCI slot number */
150 pciSlot = ((int)_BE_env.vgaInfo.bus << 8) |
151 ((int)_BE_env.vgaInfo.device << 3) | (int)_BE_env.vgaInfo.function;
152#else
153/* Fail if no PCI device information has been registered */
154 if (!_BE_env.vgaInfo.pciInfo)
155 return;
156
157 pciSlot = (u16) (_BE_env.vgaInfo.pciInfo->slot.i >> 8);
158#endif
159 switch (M.x86.R_AX) {
160 case 0xB101: /* PCI bios present? */
161 M.x86.R_AL = 0x00; /* no config space/special cycle generation support */
162 M.x86.R_EDX = 0x20494350; /* " ICP" */
163 M.x86.R_BX = 0x0210; /* Version 2.10 */
164 M.x86.R_CL = 0; /* Max bus number in system */
165 CLEAR_FLAG(F_CF);
166 break;
167 case 0xB102: /* Find PCI device */
168 M.x86.R_AH = DEVICE_NOT_FOUND;
169#ifdef __KERNEL__
170 if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
171 M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
172#else
173 if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
174 M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
175 M.x86.R_SI == 0) {
176#endif
177 M.x86.R_AH = SUCCESSFUL;
178 M.x86.R_BX = pciSlot;
179 }
180 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
181 break;
182 case 0xB103: /* Find PCI class code */
183 M.x86.R_AH = DEVICE_NOT_FOUND;
184#ifdef __KERNEL__
185 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_PROG,
186 &interface);
187 pci_read_config_byte(_BE_env.vgaInfo.pcidev, PCI_CLASS_DEVICE,
188 &subclass);
189 pci_read_config_byte(_BE_env.vgaInfo.pcidev,
190 PCI_CLASS_DEVICE + 1, &baseclass);
191 if (M.x86.R_CL == interface && M.x86.R_CH == subclass
192 && (u8) (M.x86.R_ECX >> 16) == baseclass) {
193#else
194 if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
195 M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
196 (u8) (M.x86.R_ECX >> 16) ==
197 _BE_env.vgaInfo.pciInfo->BaseClass) {
198#endif
199 M.x86.R_AH = SUCCESSFUL;
200 M.x86.R_BX = pciSlot;
201 }
202 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
203 break;
204 case 0xB108: /* Read configuration byte */
205 M.x86.R_AH = BAD_REGISTER_NUMBER;
206 if (M.x86.R_BX == pciSlot) {
207 M.x86.R_AH = SUCCESSFUL;
208#ifdef __KERNEL__
209 pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
210 &M.x86.R_CL);
211#else
212 M.x86.R_CL =
213 (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
214 _BE_env.vgaInfo.pciInfo);
215#endif
216 }
217 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
218 break;
219 case 0xB109: /* Read configuration word */
220 M.x86.R_AH = BAD_REGISTER_NUMBER;
221 if (M.x86.R_BX == pciSlot) {
222 M.x86.R_AH = SUCCESSFUL;
223#ifdef __KERNEL__
224 pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
225 &M.x86.R_CX);
226#else
227 M.x86.R_CX =
228 (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
229 _BE_env.vgaInfo.pciInfo);
230#endif
231 }
232 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
233 break;
234 case 0xB10A: /* Read configuration dword */
235 M.x86.R_AH = BAD_REGISTER_NUMBER;
236 if (M.x86.R_BX == pciSlot) {
237 M.x86.R_AH = SUCCESSFUL;
238#ifdef __KERNEL__
239 pci_read_config_dword(_BE_env.vgaInfo.pcidev,
240 M.x86.R_DI, &M.x86.R_ECX);
241#else
242 M.x86.R_ECX =
243 (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
244 _BE_env.vgaInfo.pciInfo);
245#endif
246 }
247 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
248 break;
249 case 0xB10B: /* Write configuration byte */
250 M.x86.R_AH = BAD_REGISTER_NUMBER;
251 if (M.x86.R_BX == pciSlot) {
252 M.x86.R_AH = SUCCESSFUL;
253#ifdef __KERNEL__
254 pci_write_config_byte(_BE_env.vgaInfo.pcidev,
255 M.x86.R_DI, M.x86.R_CL);
256#else
257 PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
258 _BE_env.vgaInfo.pciInfo);
259#endif
260 }
261 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
262 break;
263 case 0xB10C: /* Write configuration word */
264 M.x86.R_AH = BAD_REGISTER_NUMBER;
265 if (M.x86.R_BX == pciSlot) {
266 M.x86.R_AH = SUCCESSFUL;
267#ifdef __KERNEL__
268 pci_write_config_word(_BE_env.vgaInfo.pcidev,
269 M.x86.R_DI, M.x86.R_CX);
270#else
271 PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
272 _BE_env.vgaInfo.pciInfo);
273#endif
274 }
275 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
276 break;
277 case 0xB10D: /* Write configuration dword */
278 M.x86.R_AH = BAD_REGISTER_NUMBER;
279 if (M.x86.R_BX == pciSlot) {
280 M.x86.R_AH = SUCCESSFUL;
281#ifdef __KERNEL__
282 pci_write_config_dword(_BE_env.vgaInfo.pcidev,
283 M.x86.R_DI, M.x86.R_ECX);
284#else
285 PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
286 _BE_env.vgaInfo.pciInfo);
287#endif
288 }
289 CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
290 break;
291 default:
292 printf("biosEmu/bios.int1a: unknown function AX=%#04x\n",
293 M.x86.R_AX);
294 }
295}
296
297/****************************************************************************
298REMARKS:
299This function initialises the BIOS emulation functions for the specific
300PCI display device. We insulate the real mode BIOS from any other devices
301on the bus, so that it will work correctly thinking that it is the only
302device present on the bus (ie: avoiding any adapters present in from of
303the device we are trying to control).
304****************************************************************************/
305#define BE_constLE_32(v) ((((((v)&0xff00)>>8)|(((v)&0xff)<<8))<<16)|(((((v)&0xff000000)>>8)|(((v)&0x00ff0000)<<8))>>16))
306
307void _BE_bios_init(u32 * intrTab)
308{
309 int i;
310 X86EMU_intrFuncs bios_intr_tab[256];
311
312 for (i = 0; i < 256; ++i) {
313 intrTab[i] = BE_constLE_32(BIOS_SEG << 16);
314 bios_intr_tab[i] = undefined_intr;
315 }
316 bios_intr_tab[0x10] = int10;
317 bios_intr_tab[0x1A] = int1A;
318 bios_intr_tab[0x42] = int42;
319 bios_intr_tab[0x6D] = int10;
320 X86EMU_setupIntrFuncs(bios_intr_tab);
321}