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Yusuke Godac133c1f2008-03-11 12:55:12 +09001/*
2 * Configuation settings for the Renesas R7780MP board
3 *
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +09004 * Copyright (C) 2007,2008 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
Yusuke Godac133c1f2008-03-11 12:55:12 +09005 * Copyright (C) 2008 Yusuke Goda <goda.yusuke@renesas.com>
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Yusuke Godac133c1f2008-03-11 12:55:12 +09008 */
9
10#ifndef __R7780RP_H
11#define __R7780RP_H
12
13#undef DEBUG
Yusuke Godac133c1f2008-03-11 12:55:12 +090014#define CONFIG_CPU_SH7780 1
15#define CONFIG_R7780MP 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020016#define CONFIG_SYS_R7780MP_OLD_FLASH 1
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090017#define __LITTLE_ENDIAN__ 1
Yusuke Godac133c1f2008-03-11 12:55:12 +090018
19/*
20 * Command line configuration.
21 */
22#define CONFIG_CMD_SDRAM
Yusuke Godac133c1f2008-03-11 12:55:12 +090023#define CONFIG_CMD_PCI
Yusuke Godac133c1f2008-03-11 12:55:12 +090024#define CONFIG_CMD_PING
Yusuke Godac133c1f2008-03-11 12:55:12 +090025#define CONFIG_CMD_IDE
26#define CONFIG_CMD_EXT2
27#define CONFIG_DOS_PARTITION
28
Jean-Christophe PLAGNIOL-VILLARD6c58a032008-08-13 01:40:38 +020029#define CONFIG_SCIF_CONSOLE 1
Yusuke Godac133c1f2008-03-11 12:55:12 +090030#define CONFIG_BAUDRATE 115200
31#define CONFIG_CONS_SCIF0 1
32
33#define CONFIG_BOOTDELAY 3
34#define CONFIG_BOOTARGS "console=ttySC0,115200"
35#define CONFIG_ENV_OVERWRITE 1
36
37/* check for keypress on bootdelay==0 */
38/*#define CONFIG_ZERO_BOOTDELAY_CHECK*/
39
Nobuhiro Iwamatsu913c8912011-01-17 20:50:26 +090040#define CONFIG_SYS_TEXT_BASE 0x0FFC0000
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020041#define CONFIG_SYS_SDRAM_BASE (0x08000000)
42#define CONFIG_SYS_SDRAM_SIZE (128 * 1024 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090043
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020044#define CONFIG_SYS_LONGHELP
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020045#define CONFIG_SYS_CBSIZE 256
46#define CONFIG_SYS_PBSIZE 256
47#define CONFIG_SYS_MAXARGS 16
48#define CONFIG_SYS_BARGSIZE 512
Yusuke Godac133c1f2008-03-11 12:55:12 +090049
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020050#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
Wolfgang Denk14d0a022010-10-07 21:51:12 +020051#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_TEXT_BASE - 0x100000)
Yusuke Godac133c1f2008-03-11 12:55:12 +090052
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090053/* Flash board support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020054#define CONFIG_SYS_FLASH_BASE (0xA0000000)
55#ifdef CONFIG_SYS_R7780MP_OLD_FLASH
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090056/* NOR Flash (S29PL127J60TFI130) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020057# define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
58# define CONFIG_SYS_MAX_FLASH_BANKS (2)
59# define CONFIG_SYS_MAX_FLASH_SECT 270
60# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE,\
61 CONFIG_SYS_FLASH_BASE + 0x100000,\
62 CONFIG_SYS_FLASH_BASE + 0x400000,\
63 CONFIG_SYS_FLASH_BASE + 0x700000, }
64#else /* CONFIG_SYS_R7780MP_OLD_FLASH */
Nobuhiro Iwamatsuec39d472008-06-17 16:28:01 +090065/* NOR Flash (Spantion S29GL256P) */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020066# define CONFIG_SYS_MAX_FLASH_BANKS (1)
67# define CONFIG_SYS_MAX_FLASH_SECT 256
68# define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
69#endif /* CONFIG_SYS_R7780MP_OLD_FLASH */
Yusuke Godac133c1f2008-03-11 12:55:12 +090070
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020071#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 4 * 1024 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090072/* Address of u-boot image in Flash */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020073#define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE)
74#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090075/* Size of DRAM reserved for malloc() use */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020076#define CONFIG_SYS_MALLOC_LEN (1204 * 1024)
Yusuke Godac133c1f2008-03-11 12:55:12 +090077
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020078#define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024)
79#define CONFIG_SYS_RX_ETH_BUFFER (8)
Yusuke Godac133c1f2008-03-11 12:55:12 +090080
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_FLASH_CFI
Jean-Christophe PLAGNIOL-VILLARD00b18832008-08-13 01:40:42 +020082#define CONFIG_FLASH_CFI_DRIVER
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020083#undef CONFIG_SYS_FLASH_CFI_BROKEN_TABLE
84#undef CONFIG_SYS_FLASH_QUIET_TEST
Yusuke Godac133c1f2008-03-11 12:55:12 +090085/* print 'E' for empty sector on flinfo */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020086#define CONFIG_SYS_FLASH_EMPTY_INFO
Yusuke Godac133c1f2008-03-11 12:55:12 +090087
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +020088#define CONFIG_ENV_IS_IN_FLASH
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020089#define CONFIG_ENV_SECT_SIZE (256 * 1024)
90#define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE)
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020091#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
92#define CONFIG_SYS_FLASH_ERASE_TOUT 120000
93#define CONFIG_SYS_FLASH_WRITE_TOUT 500
Yusuke Godac133c1f2008-03-11 12:55:12 +090094
95/* Board Clock */
96#define CONFIG_SYS_CLK_FREQ 33333333
Nobuhiro Iwamatsu684a5012013-08-21 16:11:21 +090097#define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
98#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
Jean-Christophe PLAGNIOL-VILLARDbe45c632009-06-04 12:06:48 +020099#define CONFIG_SYS_TMU_CLK_DIV 4
Yusuke Godac133c1f2008-03-11 12:55:12 +0900100
101/* PCI Controller */
102#if defined(CONFIG_CMD_PCI)
103#define CONFIG_PCI
104#define CONFIG_SH4_PCI
Nobuhiro Iwamatsuab8f4d42008-03-24 02:11:26 +0900105#define CONFIG_SH7780_PCI
Yoshihiro Shimoda06b18162009-02-25 14:26:42 +0900106#define CONFIG_SH7780_PCI_LSR 0x07f00001
107#define CONFIG_SH7780_PCI_LAR CONFIG_SYS_SDRAM_SIZE
108#define CONFIG_SH7780_PCI_BAR CONFIG_SYS_SDRAM_SIZE
Yusuke Godac133c1f2008-03-11 12:55:12 +0900109#define CONFIG_PCI_PNP
110#define CONFIG_PCI_SCAN_SHOW 1
111#define __io
112#define __mem_pci
113
114#define CONFIG_PCI_MEM_BUS 0xFD000000 /* Memory space base addr */
115#define CONFIG_PCI_MEM_PHYS CONFIG_PCI_MEM_BUS
116#define CONFIG_PCI_MEM_SIZE 0x01000000 /* Size of Memory window */
117
118#define CONFIG_PCI_IO_BUS 0xFE200000 /* IO space base address */
119#define CONFIG_PCI_IO_PHYS CONFIG_PCI_IO_BUS
120#define CONFIG_PCI_IO_SIZE 0x00200000 /* Size of IO window */
Nobuhiro Iwamatsu04366d02009-07-08 11:42:19 +0900121#define CONFIG_PCI_SYS_PHYS CONFIG_SYS_SDRAM_BASE
122#define CONFIG_PCI_SYS_BUS CONFIG_SYS_SDRAM_BASE
123#define CONFIG_PCI_SYS_SIZE CONFIG_SYS_SDRAM_SIZE
Yusuke Godac133c1f2008-03-11 12:55:12 +0900124#endif /* CONFIG_CMD_PCI */
125
126#if defined(CONFIG_CMD_NET)
Marcel Ziswilerc7c1dbb2009-09-09 21:09:00 +0200127/* AX88796L Support(NE2000 base chip) */
Yusuke Godac133c1f2008-03-11 12:55:12 +0900128#define CONFIG_DRIVER_AX88796L
129#define CONFIG_DRIVER_NE2000_BASE 0xA4100000
130#endif
131
132/* Compact flash Support */
133#if defined(CONFIG_CMD_IDE)
134#define CONFIG_IDE_RESET 1
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200135#define CONFIG_SYS_PIO_MODE 1
136#define CONFIG_SYS_IDE_MAXBUS 1 /* IDE bus */
137#define CONFIG_SYS_IDE_MAXDEVICE 1
138#define CONFIG_SYS_ATA_BASE_ADDR 0xb4000000
139#define CONFIG_SYS_ATA_STRIDE 2 /* 1bit shift */
140#define CONFIG_SYS_ATA_DATA_OFFSET 0x1000 /* data reg offset */
141#define CONFIG_SYS_ATA_REG_OFFSET 0x1000 /* reg offset */
142#define CONFIG_SYS_ATA_ALT_OFFSET 0x800 /* alternate register offset */
Albert Aribaudf2a37fc2010-08-08 05:17:05 +0530143#define CONFIG_IDE_SWAP_IO
Yusuke Godac133c1f2008-03-11 12:55:12 +0900144#endif /* CONFIG_CMD_IDE */
145
146#endif /* __R7780RP_H */