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wdenkfabd46a2004-07-10 23:11:10 +00001/*
2 * (C) Copyright 2002
3 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
4 *
5 * (C) Copyright 2002
6 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
7 * Marius Groeger <mgroeger@sysgo.de>
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#include <common.h>
29
30/* ------------------------------------------------------------------------- */
31
32
33/*
34 * Miscelaneous platform dependent initialisations
35 */
36
37int board_init (void)
38{
39 DECLARE_GLOBAL_DATA_PTR;
40
41 /* memory and cpu-speed are setup before relocation */
42 /* so we do _nothing_ here */
43
44 /* arch number of cerf PXA Board */
wdenk731215e2004-10-10 18:41:04 +000045 gd->bd->bi_arch_number = MACH_TYPE_PXA_CERF;
wdenkfabd46a2004-07-10 23:11:10 +000046
47 /* adress of boot parameters */
48 gd->bd->bi_boot_params = 0xa0000100;
49
50 return 0;
51}
52
53int board_late_init(void)
54{
55 setenv("stdout", "serial");
56 setenv("stderr", "serial");
57 return 0;
58}
59
60
61int dram_init (void)
62{
63 DECLARE_GLOBAL_DATA_PTR;
64
65 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
66 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
67 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
68 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
69 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
70 gd->bd->bi_dram[2].size = PHYS_SDRAM_3_SIZE;
71 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
72 gd->bd->bi_dram[3].size = PHYS_SDRAM_4_SIZE;
73
74 return 0;
75}