wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2001 |
| 3 | * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net |
| 4 | * |
| 5 | * (C) Copyright 2001-2004 |
| 6 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. |
| 7 | * |
| 8 | * (C) Copyright 2003 |
| 9 | * Texas Instruments, <www.ti.com> |
| 10 | * Kshitij Gupta <Kshitij@ti.com> |
| 11 | * |
| 12 | * See file CREDITS for list of people who contributed to this |
| 13 | * project. |
| 14 | * |
| 15 | * This program is free software; you can redistribute it and/or |
| 16 | * modify it under the terms of the GNU General Public License as |
| 17 | * published by the Free Software Foundation; either version 2 of |
| 18 | * the License, or (at your option) any later version. |
| 19 | * |
| 20 | * This program is distributed in the hope that it will be useful, |
| 21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 23 | * GNU General Public License for more details. |
| 24 | * |
| 25 | * You should have received a copy of the GNU General Public License |
| 26 | * along with this program; if not, write to the Free Software |
| 27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 28 | * MA 02111-1307 USA |
| 29 | */ |
| 30 | |
| 31 | #include <common.h> |
| 32 | #include <linux/byteorder/swab.h> |
| 33 | |
| 34 | #define PHYS_FLASH_SECT_SIZE 0x00020000 /* 256 KB sectors (x2) */ |
| 35 | flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* info for FLASH chips */ |
| 36 | |
| 37 | /* Board support for 1 or 2 flash devices */ |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 38 | #define FLASH_PORT_WIDTH32 |
| 39 | #undef FLASH_PORT_WIDTH16 |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 40 | |
| 41 | #ifdef FLASH_PORT_WIDTH16 |
| 42 | #define FLASH_PORT_WIDTH ushort |
| 43 | #define FLASH_PORT_WIDTHV vu_short |
| 44 | #define SWAP(x) __swab16(x) |
| 45 | #else |
| 46 | #define FLASH_PORT_WIDTH ulong |
| 47 | #define FLASH_PORT_WIDTHV vu_long |
| 48 | #define SWAP(x) __swab32(x) |
| 49 | #endif |
| 50 | |
| 51 | #define FPW FLASH_PORT_WIDTH |
| 52 | #define FPWV FLASH_PORT_WIDTHV |
| 53 | |
| 54 | #define mb() __asm__ __volatile__ ("" : : : "memory") |
| 55 | |
| 56 | |
| 57 | /* Flash Organization Structure */ |
| 58 | typedef struct OrgDef { |
| 59 | unsigned int sector_number; |
| 60 | unsigned int sector_size; |
| 61 | } OrgDef; |
| 62 | |
| 63 | |
| 64 | /* Flash Organizations */ |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 65 | OrgDef OrgIntel_28F256K3[] = { |
| 66 | {256, 128 * 1024}, /* 256 * 128kBytes sectors */ |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | |
| 70 | /*----------------------------------------------------------------------- |
| 71 | * Functions |
| 72 | */ |
| 73 | unsigned long flash_init (void); |
| 74 | static ulong flash_get_size (FPW * addr, flash_info_t * info); |
| 75 | static int write_data (flash_info_t * info, ulong dest, FPW data); |
| 76 | static void flash_get_offsets (ulong base, flash_info_t * info); |
| 77 | void inline spin_wheel (void); |
| 78 | void flash_print_info (flash_info_t * info); |
| 79 | void flash_unprotect_sectors (FPWV * addr); |
| 80 | int flash_erase (flash_info_t * info, int s_first, int s_last); |
| 81 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt); |
| 82 | |
| 83 | /*----------------------------------------------------------------------- |
| 84 | */ |
| 85 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 86 | static void flash_vpp(int on) |
| 87 | { |
| 88 | unsigned int tmp; |
| 89 | |
| 90 | tmp = *(unsigned int *)(VERSATILE_FLASHCTRL); |
| 91 | |
| 92 | if (on) |
| 93 | tmp |= VERSATILE_FLASHPROG_FLVPPEN; |
| 94 | else |
| 95 | tmp &= ~VERSATILE_FLASHPROG_FLVPPEN; |
| 96 | |
| 97 | *(unsigned int *)(VERSATILE_FLASHCTRL) = tmp; |
| 98 | } |
| 99 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 100 | unsigned long flash_init (void) |
| 101 | { |
| 102 | int i; |
| 103 | ulong size = 0; |
| 104 | for (i = 0; i < CFG_MAX_FLASH_BANKS; i++) { |
| 105 | switch (i) { |
| 106 | case 0: |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 107 | flash_vpp(1); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 108 | flash_get_size ((FPW *) PHYS_FLASH_1, &flash_info[i]); |
| 109 | flash_get_offsets (PHYS_FLASH_1, &flash_info[i]); |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 110 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 111 | break; |
| 112 | default: |
| 113 | panic ("configured too many flash banks!\n"); |
| 114 | break; |
| 115 | } |
| 116 | size += flash_info[i].size; |
| 117 | } |
| 118 | |
| 119 | /* Protect monitor and environment sectors |
| 120 | */ |
| 121 | flash_protect (FLAG_PROTECT_SET, |
| 122 | CFG_FLASH_BASE, |
| 123 | CFG_FLASH_BASE + monitor_flash_len - 1, &flash_info[0]); |
| 124 | |
| 125 | return size; |
| 126 | } |
| 127 | |
| 128 | /*----------------------------------------------------------------------- |
| 129 | */ |
| 130 | static void flash_get_offsets (ulong base, flash_info_t * info) |
| 131 | { |
| 132 | int i; |
| 133 | OrgDef *pOrgDef; |
| 134 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 135 | pOrgDef = OrgIntel_28F256K3; |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 136 | if (info->flash_id == FLASH_UNKNOWN) { |
| 137 | return; |
| 138 | } |
| 139 | |
| 140 | if ((info->flash_id & FLASH_VENDMASK) == FLASH_MAN_INTEL) { |
| 141 | for (i = 0; i < info->sector_count; i++) { |
| 142 | if (i > 255) { |
| 143 | info->start[i] = base + (i * 0x8000); |
| 144 | info->protect[i] = 0; |
| 145 | } else { |
| 146 | info->start[i] = base + |
| 147 | (i * PHYS_FLASH_SECT_SIZE); |
| 148 | info->protect[i] = 0; |
| 149 | } |
| 150 | } |
| 151 | } |
| 152 | } |
| 153 | |
| 154 | /*----------------------------------------------------------------------- |
| 155 | */ |
| 156 | void flash_print_info (flash_info_t * info) |
| 157 | { |
| 158 | int i; |
| 159 | |
| 160 | if (info->flash_id == FLASH_UNKNOWN) { |
| 161 | printf ("missing or unknown FLASH type\n"); |
| 162 | return; |
| 163 | } |
| 164 | |
| 165 | switch (info->flash_id & FLASH_VENDMASK) { |
| 166 | case FLASH_MAN_INTEL: |
| 167 | printf ("INTEL "); |
| 168 | break; |
| 169 | default: |
| 170 | printf ("Unknown Vendor "); |
| 171 | break; |
| 172 | } |
| 173 | |
| 174 | switch (info->flash_id & FLASH_TYPEMASK) { |
| 175 | case FLASH_28F256L18T: |
| 176 | printf ("FLASH 28F256L18T\n"); |
| 177 | break; |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 178 | case FLASH_28F256K3: |
| 179 | printf ("FLASH 28F256K3\n"); |
| 180 | break; |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 181 | default: |
| 182 | printf ("Unknown Chip Type\n"); |
| 183 | break; |
| 184 | } |
| 185 | |
| 186 | printf (" Size: %ld MB in %d Sectors\n", |
| 187 | info->size >> 20, info->sector_count); |
| 188 | |
| 189 | printf (" Sector Start Addresses:"); |
| 190 | for (i = 0; i < info->sector_count; ++i) { |
| 191 | if ((i % 5) == 0) |
| 192 | printf ("\n "); |
| 193 | printf (" %08lX%s", |
| 194 | info->start[i], info->protect[i] ? " (RO)" : " "); |
| 195 | } |
| 196 | printf ("\n"); |
| 197 | return; |
| 198 | } |
| 199 | |
| 200 | /* |
| 201 | * The following code cannot be run from FLASH! |
| 202 | */ |
| 203 | static ulong flash_get_size (FPW * addr, flash_info_t * info) |
| 204 | { |
| 205 | volatile FPW value; |
| 206 | |
| 207 | /* Write auto select command: read Manufacturer ID */ |
| 208 | addr[0x5555] = (FPW) 0x00AA00AA; |
| 209 | addr[0x2AAA] = (FPW) 0x00550055; |
| 210 | addr[0x5555] = (FPW) 0x00900090; |
| 211 | |
| 212 | mb (); |
| 213 | value = addr[0]; |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 214 | switch (value) { |
| 215 | |
| 216 | case (FPW) INTEL_MANUFACT: |
| 217 | info->flash_id = FLASH_MAN_INTEL; |
| 218 | break; |
| 219 | |
| 220 | default: |
| 221 | info->flash_id = FLASH_UNKNOWN; |
| 222 | info->sector_count = 0; |
| 223 | info->size = 0; |
| 224 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 225 | return (0); /* no or unknown flash */ |
| 226 | } |
| 227 | |
| 228 | mb (); |
| 229 | value = addr[1]; /* device ID */ |
| 230 | switch (value) { |
| 231 | |
| 232 | case (FPW) (INTEL_ID_28F256L18T): |
| 233 | info->flash_id += FLASH_28F256L18T; |
| 234 | info->sector_count = 259; |
| 235 | info->size = 0x02000000; |
| 236 | break; /* => 32 MB */ |
| 237 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 238 | case (FPW)(INTEL_ID_28F256K3): |
| 239 | info->flash_id += FLASH_28F256K3; |
| 240 | info->sector_count = 256; |
| 241 | info->size = 0x02000000; |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 242 | break; |
| 243 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 244 | default: |
| 245 | info->flash_id = FLASH_UNKNOWN; |
| 246 | break; |
| 247 | } |
| 248 | |
| 249 | if (info->sector_count > CFG_MAX_FLASH_SECT) { |
| 250 | printf ("** ERROR: sector count %d > max (%d) **\n", |
| 251 | info->sector_count, CFG_MAX_FLASH_SECT); |
| 252 | info->sector_count = CFG_MAX_FLASH_SECT; |
| 253 | } |
| 254 | |
| 255 | addr[0] = (FPW) 0x00FF00FF; /* restore read mode */ |
| 256 | |
| 257 | return (info->size); |
| 258 | } |
| 259 | |
| 260 | |
| 261 | /* unprotects a sector for write and erase |
| 262 | * on some intel parts, this unprotects the entire chip, but it |
| 263 | * wont hurt to call this additional times per sector... |
| 264 | */ |
| 265 | void flash_unprotect_sectors (FPWV * addr) |
| 266 | { |
| 267 | #define PD_FINTEL_WSMS_READY_MASK 0x0080 |
| 268 | |
| 269 | *addr = (FPW) 0x00500050; /* clear status register */ |
| 270 | |
| 271 | /* this sends the clear lock bit command */ |
| 272 | *addr = (FPW) 0x00600060; |
| 273 | *addr = (FPW) 0x00D000D0; |
| 274 | } |
| 275 | |
| 276 | |
| 277 | /*----------------------------------------------------------------------- |
| 278 | */ |
| 279 | |
| 280 | int flash_erase (flash_info_t * info, int s_first, int s_last) |
| 281 | { |
| 282 | int flag, prot, sect; |
| 283 | ulong type, start, last; |
| 284 | int rcode = 0; |
| 285 | |
| 286 | if ((s_first < 0) || (s_first > s_last)) { |
| 287 | if (info->flash_id == FLASH_UNKNOWN) { |
| 288 | printf ("- missing\n"); |
| 289 | } else { |
| 290 | printf ("- no sectors to erase\n"); |
| 291 | } |
| 292 | return 1; |
| 293 | } |
| 294 | |
| 295 | type = (info->flash_id & FLASH_VENDMASK); |
| 296 | if ((type != FLASH_MAN_INTEL)) { |
| 297 | printf ("Can't erase unknown flash type %08lx - aborted\n", |
| 298 | info->flash_id); |
| 299 | return 1; |
| 300 | } |
| 301 | |
| 302 | prot = 0; |
| 303 | for (sect = s_first; sect <= s_last; ++sect) { |
| 304 | if (info->protect[sect]) { |
| 305 | prot++; |
| 306 | } |
| 307 | } |
| 308 | |
| 309 | if (prot) { |
| 310 | printf ("- Warning: %d protected sectors will not be erased!\n", |
| 311 | prot); |
| 312 | } else { |
| 313 | printf ("\n"); |
| 314 | } |
| 315 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 316 | flash_vpp(1); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 317 | |
| 318 | start = get_timer (0); |
| 319 | last = start; |
| 320 | |
| 321 | /* Disable interrupts which might cause a timeout here */ |
| 322 | flag = disable_interrupts (); |
| 323 | |
| 324 | /* Start erase on unprotected sectors */ |
| 325 | for (sect = s_first; sect <= s_last; sect++) { |
| 326 | if (info->protect[sect] == 0) { /* not protected */ |
| 327 | FPWV *addr = (FPWV *) (info->start[sect]); |
| 328 | FPW status; |
| 329 | |
| 330 | printf ("Erasing sector %2d ... ", sect); |
| 331 | |
| 332 | flash_unprotect_sectors (addr); |
| 333 | |
| 334 | /* arm simple, non interrupt dependent timer */ |
| 335 | reset_timer_masked (); |
| 336 | |
| 337 | *addr = (FPW) 0x00500050;/* clear status register */ |
| 338 | *addr = (FPW) 0x00200020;/* erase setup */ |
| 339 | *addr = (FPW) 0x00D000D0;/* erase confirm */ |
| 340 | |
| 341 | while (((status = |
| 342 | *addr) & (FPW) 0x00800080) != |
| 343 | (FPW) 0x00800080) { |
| 344 | if (get_timer_masked () > |
| 345 | CFG_FLASH_ERASE_TOUT) { |
| 346 | printf ("Timeout\n"); |
| 347 | /* suspend erase */ |
| 348 | *addr = (FPW) 0x00B000B0; |
| 349 | /* reset to read mode */ |
| 350 | *addr = (FPW) 0x00FF00FF; |
| 351 | rcode = 1; |
| 352 | break; |
| 353 | } |
| 354 | } |
| 355 | |
| 356 | /* clear status register cmd. */ |
| 357 | *addr = (FPW) 0x00500050; |
| 358 | *addr = (FPW) 0x00FF00FF;/* resest to read mode */ |
| 359 | printf (" done\n"); |
| 360 | } |
| 361 | } |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 362 | |
| 363 | flash_vpp(0); |
| 364 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 365 | return rcode; |
| 366 | } |
| 367 | |
| 368 | /*----------------------------------------------------------------------- |
| 369 | * Copy memory to flash, returns: |
| 370 | * 0 - OK |
| 371 | * 1 - write timeout |
| 372 | * 2 - Flash not erased |
| 373 | * 4 - Flash not identified |
| 374 | */ |
| 375 | |
| 376 | int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt) |
| 377 | { |
| 378 | ulong cp, wp; |
| 379 | FPW data; |
| 380 | int count, i, l, rc, port_width; |
| 381 | |
| 382 | if (info->flash_id == FLASH_UNKNOWN) { |
| 383 | return 4; |
| 384 | } |
| 385 | /* get lower word aligned address */ |
| 386 | #ifdef FLASH_PORT_WIDTH16 |
| 387 | wp = (addr & ~1); |
| 388 | port_width = 2; |
| 389 | #else |
| 390 | wp = (addr & ~3); |
| 391 | port_width = 4; |
| 392 | #endif |
| 393 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 394 | flash_vpp(1); |
| 395 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 396 | /* |
| 397 | * handle unaligned start bytes |
| 398 | */ |
| 399 | if ((l = addr - wp) != 0) { |
| 400 | data = 0; |
| 401 | for (i = 0, cp = wp; i < l; ++i, ++cp) { |
| 402 | data = (data << 8) | (*(uchar *) cp); |
| 403 | } |
| 404 | for (; i < port_width && cnt > 0; ++i) { |
| 405 | data = (data << 8) | *src++; |
| 406 | --cnt; |
| 407 | ++cp; |
| 408 | } |
| 409 | for (; cnt == 0 && i < port_width; ++i, ++cp) { |
| 410 | data = (data << 8) | (*(uchar *) cp); |
| 411 | } |
| 412 | |
| 413 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 414 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 415 | return (rc); |
| 416 | } |
| 417 | wp += port_width; |
| 418 | } |
| 419 | |
| 420 | /* |
| 421 | * handle word aligned part |
| 422 | */ |
| 423 | count = 0; |
| 424 | while (cnt >= port_width) { |
| 425 | data = 0; |
| 426 | for (i = 0; i < port_width; ++i) { |
| 427 | data = (data << 8) | *src++; |
| 428 | } |
| 429 | if ((rc = write_data (info, wp, SWAP (data))) != 0) { |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 430 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 431 | return (rc); |
| 432 | } |
| 433 | wp += port_width; |
| 434 | cnt -= port_width; |
| 435 | if (count++ > 0x800) { |
| 436 | spin_wheel (); |
| 437 | count = 0; |
| 438 | } |
| 439 | } |
| 440 | |
| 441 | if (cnt == 0) { |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 442 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 443 | return (0); |
| 444 | } |
| 445 | |
| 446 | /* |
| 447 | * handle unaligned tail bytes |
| 448 | */ |
| 449 | data = 0; |
| 450 | for (i = 0, cp = wp; i < port_width && cnt > 0; ++i, ++cp) { |
| 451 | data = (data << 8) | *src++; |
| 452 | --cnt; |
| 453 | } |
| 454 | for (; i < port_width; ++i, ++cp) { |
| 455 | data = (data << 8) | (*(uchar *) cp); |
| 456 | } |
| 457 | |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 458 | rc = write_data (info, wp, SWAP (data)); |
| 459 | |
| 460 | flash_vpp(0); |
| 461 | |
| 462 | return rc; |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 463 | } |
| 464 | |
| 465 | /*----------------------------------------------------------------------- |
| 466 | * Write a word or halfword to Flash, returns: |
| 467 | * 0 - OK |
| 468 | * 1 - write timeout |
| 469 | * 2 - Flash not erased |
| 470 | */ |
| 471 | static int write_data (flash_info_t * info, ulong dest, FPW data) |
| 472 | { |
| 473 | FPWV *addr = (FPWV *) dest; |
| 474 | ulong status; |
| 475 | int flag; |
| 476 | |
| 477 | /* Check if Flash is (sufficiently) erased */ |
| 478 | if ((*addr & data) != data) { |
| 479 | printf ("not erased at %08lx (%x)\n", (ulong) addr, *addr); |
| 480 | return (2); |
| 481 | } |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 482 | |
| 483 | flash_vpp(1); |
| 484 | |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 485 | flash_unprotect_sectors (addr); |
| 486 | /* Disable interrupts which might cause a timeout here */ |
| 487 | flag = disable_interrupts (); |
| 488 | *addr = (FPW) 0x00400040; /* write setup */ |
| 489 | *addr = data; |
| 490 | |
| 491 | /* arm simple, non interrupt dependent timer */ |
| 492 | reset_timer_masked (); |
| 493 | |
| 494 | /* wait while polling the status register */ |
| 495 | while (((status = *addr) & (FPW) 0x00800080) != (FPW) 0x00800080) { |
| 496 | if (get_timer_masked () > CFG_FLASH_WRITE_TOUT) { |
| 497 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 498 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 499 | return (1); |
| 500 | } |
| 501 | } |
| 502 | *addr = (FPW) 0x00FF00FF; /* restore read mode */ |
wdenk | d407bf5 | 2004-10-11 22:51:13 +0000 | [diff] [blame] | 503 | flash_vpp(0); |
wdenk | 3d3befa | 2004-03-14 15:06:13 +0000 | [diff] [blame] | 504 | return (0); |
| 505 | } |
| 506 | |
| 507 | void inline spin_wheel (void) |
| 508 | { |
| 509 | static int p = 0; |
| 510 | static char w[] = "\\/-"; |
| 511 | |
| 512 | printf ("\010%c", w[p]); |
| 513 | (++p == 3) ? (p = 0) : 0; |
| 514 | } |