Martin Fuzzey | 483880c | 2020-01-14 15:56:16 +0000 | [diff] [blame] | 1 | /* SPDX-License-Identifier: GPL-2.0+ */ |
| 2 | /* |
| 3 | * Copyright (C) 2018 Flowbird |
| 4 | * Martin Fuzzey <martin.fuzzey@flowbird.group> |
| 5 | */ |
| 6 | |
| 7 | #ifndef __DA9063_PMIC_H_ |
| 8 | #define __DA9063_PMIC_H_ |
| 9 | |
| 10 | /* Register definitions below taken from the kernel */ |
| 11 | |
| 12 | /* Page selection I2C or SPI always in the beginning of any page. */ |
| 13 | /* Page 0 : I2C access 0x000 - 0x0FF SPI access 0x000 - 0x07F */ |
| 14 | /* Page 1 : SPI access 0x080 - 0x0FF */ |
| 15 | /* Page 2 : I2C access 0x100 - 0x1FF SPI access 0x100 - 0x17F */ |
| 16 | /* Page 3 : SPI access 0x180 - 0x1FF */ |
| 17 | #define DA9063_REG_PAGE_CON 0x00 |
| 18 | |
| 19 | /* System Control and Event Registers */ |
| 20 | #define DA9063_REG_STATUS_A 0x01 |
| 21 | #define DA9063_REG_STATUS_B 0x02 |
| 22 | #define DA9063_REG_STATUS_C 0x03 |
| 23 | #define DA9063_REG_STATUS_D 0x04 |
| 24 | #define DA9063_REG_FAULT_LOG 0x05 |
| 25 | #define DA9063_REG_EVENT_A 0x06 |
| 26 | #define DA9063_REG_EVENT_B 0x07 |
| 27 | #define DA9063_REG_EVENT_C 0x08 |
| 28 | #define DA9063_REG_EVENT_D 0x09 |
| 29 | #define DA9063_REG_IRQ_MASK_A 0x0A |
| 30 | #define DA9063_REG_IRQ_MASK_B 0x0B |
| 31 | #define DA9063_REG_IRQ_MASK_C 0x0C |
| 32 | #define DA9063_REG_IRQ_MASK_D 0x0D |
| 33 | #define DA9063_REG_CONTROL_A 0x0E |
| 34 | #define DA9063_REG_CONTROL_B 0x0F |
| 35 | #define DA9063_REG_CONTROL_C 0x10 |
| 36 | #define DA9063_REG_CONTROL_D 0x11 |
| 37 | #define DA9063_REG_CONTROL_E 0x12 |
| 38 | #define DA9063_REG_CONTROL_F 0x13 |
| 39 | #define DA9063_REG_PD_DIS 0x14 |
| 40 | |
| 41 | /* GPIO Control Registers */ |
| 42 | #define DA9063_REG_GPIO_0_1 0x15 |
| 43 | #define DA9063_REG_GPIO_2_3 0x16 |
| 44 | #define DA9063_REG_GPIO_4_5 0x17 |
| 45 | #define DA9063_REG_GPIO_6_7 0x18 |
| 46 | #define DA9063_REG_GPIO_8_9 0x19 |
| 47 | #define DA9063_REG_GPIO_10_11 0x1A |
| 48 | #define DA9063_REG_GPIO_12_13 0x1B |
| 49 | #define DA9063_REG_GPIO_14_15 0x1C |
| 50 | #define DA9063_REG_GPIO_MODE0_7 0x1D |
| 51 | #define DA9063_REG_GPIO_MODE8_15 0x1E |
| 52 | #define DA9063_REG_SWITCH_CONT 0x1F |
| 53 | |
| 54 | /* Regulator Control Registers */ |
| 55 | #define DA9063_REG_BCORE2_CONT 0x20 |
| 56 | #define DA9063_REG_BCORE1_CONT 0x21 |
| 57 | #define DA9063_REG_BPRO_CONT 0x22 |
| 58 | #define DA9063_REG_BMEM_CONT 0x23 |
| 59 | #define DA9063_REG_BIO_CONT 0x24 |
| 60 | #define DA9063_REG_BPERI_CONT 0x25 |
| 61 | #define DA9063_REG_LDO1_CONT 0x26 |
| 62 | #define DA9063_REG_LDO2_CONT 0x27 |
| 63 | #define DA9063_REG_LDO3_CONT 0x28 |
| 64 | #define DA9063_REG_LDO4_CONT 0x29 |
| 65 | #define DA9063_REG_LDO5_CONT 0x2A |
| 66 | #define DA9063_REG_LDO6_CONT 0x2B |
| 67 | #define DA9063_REG_LDO7_CONT 0x2C |
| 68 | #define DA9063_REG_LDO8_CONT 0x2D |
| 69 | #define DA9063_REG_LDO9_CONT 0x2E |
| 70 | #define DA9063_REG_LDO10_CONT 0x2F |
| 71 | #define DA9063_REG_LDO11_CONT 0x30 |
| 72 | #define DA9063_REG_SUPPLIES 0x31 |
| 73 | #define DA9063_REG_DVC_1 0x32 |
| 74 | #define DA9063_REG_DVC_2 0x33 |
| 75 | |
| 76 | /* GP-ADC Control Registers */ |
| 77 | #define DA9063_REG_ADC_MAN 0x34 |
| 78 | #define DA9063_REG_ADC_CONT 0x35 |
| 79 | #define DA9063_REG_VSYS_MON 0x36 |
| 80 | #define DA9063_REG_ADC_RES_L 0x37 |
| 81 | #define DA9063_REG_ADC_RES_H 0x38 |
| 82 | #define DA9063_REG_VSYS_RES 0x39 |
| 83 | #define DA9063_REG_ADCIN1_RES 0x3A |
| 84 | #define DA9063_REG_ADCIN2_RES 0x3B |
| 85 | #define DA9063_REG_ADCIN3_RES 0x3C |
| 86 | #define DA9063_REG_MON_A8_RES 0x3D |
| 87 | #define DA9063_REG_MON_A9_RES 0x3E |
| 88 | #define DA9063_REG_MON_A10_RES 0x3F |
| 89 | |
| 90 | /* RTC Calendar and Alarm Registers */ |
| 91 | #define DA9063_REG_COUNT_S 0x40 |
| 92 | #define DA9063_REG_COUNT_MI 0x41 |
| 93 | #define DA9063_REG_COUNT_H 0x42 |
| 94 | #define DA9063_REG_COUNT_D 0x43 |
| 95 | #define DA9063_REG_COUNT_MO 0x44 |
| 96 | #define DA9063_REG_COUNT_Y 0x45 |
| 97 | |
| 98 | #define DA9063_AD_REG_ALARM_MI 0x46 |
| 99 | #define DA9063_AD_REG_ALARM_H 0x47 |
| 100 | #define DA9063_AD_REG_ALARM_D 0x48 |
| 101 | #define DA9063_AD_REG_ALARM_MO 0x49 |
| 102 | #define DA9063_AD_REG_ALARM_Y 0x4A |
| 103 | #define DA9063_AD_REG_SECOND_A 0x4B |
| 104 | #define DA9063_AD_REG_SECOND_B 0x4C |
| 105 | #define DA9063_AD_REG_SECOND_C 0x4D |
| 106 | #define DA9063_AD_REG_SECOND_D 0x4E |
| 107 | |
| 108 | #define DA9063_BB_REG_ALARM_S 0x46 |
| 109 | #define DA9063_BB_REG_ALARM_MI 0x47 |
| 110 | #define DA9063_BB_REG_ALARM_H 0x48 |
| 111 | #define DA9063_BB_REG_ALARM_D 0x49 |
| 112 | #define DA9063_BB_REG_ALARM_MO 0x4A |
| 113 | #define DA9063_BB_REG_ALARM_Y 0x4B |
| 114 | #define DA9063_BB_REG_SECOND_A 0x4C |
| 115 | #define DA9063_BB_REG_SECOND_B 0x4D |
| 116 | #define DA9063_BB_REG_SECOND_C 0x4E |
| 117 | #define DA9063_BB_REG_SECOND_D 0x4F |
| 118 | |
| 119 | #define DA9063_REG_HOLE_1 {0x50, 0x7F} |
| 120 | |
| 121 | /* Sequencer Control Registers */ |
| 122 | #define DA9063_REG_SEQ 0x81 |
| 123 | #define DA9063_REG_SEQ_TIMER 0x82 |
| 124 | #define DA9063_REG_ID_2_1 0x83 |
| 125 | #define DA9063_REG_ID_4_3 0x84 |
| 126 | #define DA9063_REG_ID_6_5 0x85 |
| 127 | #define DA9063_REG_ID_8_7 0x86 |
| 128 | #define DA9063_REG_ID_10_9 0x87 |
| 129 | #define DA9063_REG_ID_12_11 0x88 |
| 130 | #define DA9063_REG_ID_14_13 0x89 |
| 131 | #define DA9063_REG_ID_16_15 0x8A |
| 132 | #define DA9063_REG_ID_18_17 0x8B |
| 133 | #define DA9063_REG_ID_20_19 0x8C |
| 134 | #define DA9063_REG_ID_22_21 0x8D |
| 135 | #define DA9063_REG_ID_24_23 0x8E |
| 136 | #define DA9063_REG_ID_26_25 0x8F |
| 137 | #define DA9063_REG_ID_28_27 0x90 |
| 138 | #define DA9063_REG_ID_30_29 0x91 |
| 139 | #define DA9063_REG_ID_32_31 0x92 |
| 140 | #define DA9063_REG_SEQ_A 0x95 |
| 141 | #define DA9063_REG_SEQ_B 0x96 |
| 142 | #define DA9063_REG_WAIT 0x97 |
| 143 | #define DA9063_REG_EN_32K 0x98 |
| 144 | #define DA9063_REG_RESET 0x99 |
| 145 | |
| 146 | /* Regulator Setting Registers */ |
| 147 | #define DA9063_REG_BUCK_ILIM_A 0x9A |
| 148 | #define DA9063_REG_BUCK_ILIM_B 0x9B |
| 149 | #define DA9063_REG_BUCK_ILIM_C 0x9C |
| 150 | #define DA9063_REG_BCORE2_CFG 0x9D |
| 151 | #define DA9063_REG_BCORE1_CFG 0x9E |
| 152 | #define DA9063_REG_BPRO_CFG 0x9F |
| 153 | #define DA9063_REG_BIO_CFG 0xA0 |
| 154 | #define DA9063_REG_BMEM_CFG 0xA1 |
| 155 | #define DA9063_REG_BPERI_CFG 0xA2 |
| 156 | #define DA9063_REG_VBCORE2_A 0xA3 |
| 157 | #define DA9063_REG_VBCORE1_A 0xA4 |
| 158 | #define DA9063_REG_VBPRO_A 0xA5 |
| 159 | #define DA9063_REG_VBMEM_A 0xA6 |
| 160 | #define DA9063_REG_VBIO_A 0xA7 |
| 161 | #define DA9063_REG_VBPERI_A 0xA8 |
| 162 | #define DA9063_REG_VLDO1_A 0xA9 |
| 163 | #define DA9063_REG_VLDO2_A 0xAA |
| 164 | #define DA9063_REG_VLDO3_A 0xAB |
| 165 | #define DA9063_REG_VLDO4_A 0xAC |
| 166 | #define DA9063_REG_VLDO5_A 0xAD |
| 167 | #define DA9063_REG_VLDO6_A 0xAE |
| 168 | #define DA9063_REG_VLDO7_A 0xAF |
| 169 | #define DA9063_REG_VLDO8_A 0xB0 |
| 170 | #define DA9063_REG_VLDO9_A 0xB1 |
| 171 | #define DA9063_REG_VLDO10_A 0xB2 |
| 172 | #define DA9063_REG_VLDO11_A 0xB3 |
| 173 | #define DA9063_REG_VBCORE2_B 0xB4 |
| 174 | #define DA9063_REG_VBCORE1_B 0xB5 |
| 175 | #define DA9063_REG_VBPRO_B 0xB6 |
| 176 | #define DA9063_REG_VBMEM_B 0xB7 |
| 177 | #define DA9063_REG_VBIO_B 0xB8 |
| 178 | #define DA9063_REG_VBPERI_B 0xB9 |
| 179 | #define DA9063_REG_VLDO1_B 0xBA |
| 180 | #define DA9063_REG_VLDO2_B 0xBB |
| 181 | #define DA9063_REG_VLDO3_B 0xBC |
| 182 | #define DA9063_REG_VLDO4_B 0xBD |
| 183 | #define DA9063_REG_VLDO5_B 0xBE |
| 184 | #define DA9063_REG_VLDO6_B 0xBF |
| 185 | #define DA9063_REG_VLDO7_B 0xC0 |
| 186 | #define DA9063_REG_VLDO8_B 0xC1 |
| 187 | #define DA9063_REG_VLDO9_B 0xC2 |
| 188 | #define DA9063_REG_VLDO10_B 0xC3 |
| 189 | #define DA9063_REG_VLDO11_B 0xC4 |
| 190 | |
| 191 | /* Backup Battery Charger Control Register */ |
| 192 | #define DA9063_REG_BBAT_CONT 0xC5 |
| 193 | |
| 194 | /* GPIO PWM (LED) */ |
| 195 | #define DA9063_REG_GPO11_LED 0xC6 |
| 196 | #define DA9063_REG_GPO14_LED 0xC7 |
| 197 | #define DA9063_REG_GPO15_LED 0xC8 |
| 198 | |
| 199 | /* GP-ADC Threshold Registers */ |
| 200 | #define DA9063_REG_ADC_CFG 0xC9 |
| 201 | #define DA9063_REG_AUTO1_HIGH 0xCA |
| 202 | #define DA9063_REG_AUTO1_LOW 0xCB |
| 203 | #define DA9063_REG_AUTO2_HIGH 0xCC |
| 204 | #define DA9063_REG_AUTO2_LOW 0xCD |
| 205 | #define DA9063_REG_AUTO3_HIGH 0xCE |
| 206 | #define DA9063_REG_AUTO3_LOW 0xCF |
| 207 | |
| 208 | #define DA9063_REG_HOLE_2 {0xD0, 0xFF} |
| 209 | |
| 210 | /* DA9063 Configuration registers */ |
| 211 | /* OTP */ |
| 212 | #define DA9063_REG_OTP_COUNT 0x101 |
| 213 | #define DA9063_REG_OTP_ADDR 0x102 |
| 214 | #define DA9063_REG_OTP_DATA 0x103 |
| 215 | |
| 216 | /* Customer Trim and Configuration */ |
| 217 | #define DA9063_REG_T_OFFSET 0x104 |
| 218 | #define DA9063_REG_INTERFACE 0x105 |
| 219 | #define DA9063_REG_CONFIG_A 0x106 |
| 220 | #define DA9063_REG_CONFIG_B 0x107 |
| 221 | #define DA9063_REG_CONFIG_C 0x108 |
| 222 | #define DA9063_REG_CONFIG_D 0x109 |
| 223 | #define DA9063_REG_CONFIG_E 0x10A |
| 224 | #define DA9063_REG_CONFIG_F 0x10B |
| 225 | #define DA9063_REG_CONFIG_G 0x10C |
| 226 | #define DA9063_REG_CONFIG_H 0x10D |
| 227 | #define DA9063_REG_CONFIG_I 0x10E |
| 228 | #define DA9063_REG_CONFIG_J 0x10F |
| 229 | #define DA9063_REG_CONFIG_K 0x110 |
| 230 | #define DA9063_REG_CONFIG_L 0x111 |
| 231 | |
| 232 | #define DA9063_AD_REG_MON_REG_1 0x112 |
| 233 | #define DA9063_AD_REG_MON_REG_2 0x113 |
| 234 | #define DA9063_AD_REG_MON_REG_3 0x114 |
| 235 | #define DA9063_AD_REG_MON_REG_4 0x115 |
| 236 | #define DA9063_AD_REG_MON_REG_5 0x116 |
| 237 | #define DA9063_AD_REG_MON_REG_6 0x117 |
| 238 | #define DA9063_AD_REG_TRIM_CLDR 0x118 |
| 239 | |
| 240 | #define DA9063_AD_REG_GP_ID_0 0x119 |
| 241 | #define DA9063_AD_REG_GP_ID_1 0x11A |
| 242 | #define DA9063_AD_REG_GP_ID_2 0x11B |
| 243 | #define DA9063_AD_REG_GP_ID_3 0x11C |
| 244 | #define DA9063_AD_REG_GP_ID_4 0x11D |
| 245 | #define DA9063_AD_REG_GP_ID_5 0x11E |
| 246 | #define DA9063_AD_REG_GP_ID_6 0x11F |
| 247 | #define DA9063_AD_REG_GP_ID_7 0x120 |
| 248 | #define DA9063_AD_REG_GP_ID_8 0x121 |
| 249 | #define DA9063_AD_REG_GP_ID_9 0x122 |
| 250 | #define DA9063_AD_REG_GP_ID_10 0x123 |
| 251 | #define DA9063_AD_REG_GP_ID_11 0x124 |
| 252 | #define DA9063_AD_REG_GP_ID_12 0x125 |
| 253 | #define DA9063_AD_REG_GP_ID_13 0x126 |
| 254 | #define DA9063_AD_REG_GP_ID_14 0x127 |
| 255 | #define DA9063_AD_REG_GP_ID_15 0x128 |
| 256 | #define DA9063_AD_REG_GP_ID_16 0x129 |
| 257 | #define DA9063_AD_REG_GP_ID_17 0x12A |
| 258 | #define DA9063_AD_REG_GP_ID_18 0x12B |
| 259 | #define DA9063_AD_REG_GP_ID_19 0x12C |
| 260 | |
| 261 | #define DA9063_BB_REG_CONFIG_M 0x112 |
| 262 | #define DA9063_BB_REG_CONFIG_N 0x113 |
| 263 | |
| 264 | #define DA9063_BB_REG_MON_REG_1 0x114 |
| 265 | #define DA9063_BB_REG_MON_REG_2 0x115 |
| 266 | #define DA9063_BB_REG_MON_REG_3 0x116 |
| 267 | #define DA9063_BB_REG_MON_REG_4 0x117 |
| 268 | #define DA9063_BB_REG_MON_REG_5 0x11E |
| 269 | #define DA9063_BB_REG_MON_REG_6 0x11F |
| 270 | #define DA9063_BB_REG_TRIM_CLDR 0x120 |
| 271 | /* General Purpose Registers */ |
| 272 | #define DA9063_BB_REG_GP_ID_0 0x121 |
| 273 | #define DA9063_BB_REG_GP_ID_1 0x122 |
| 274 | #define DA9063_BB_REG_GP_ID_2 0x123 |
| 275 | #define DA9063_BB_REG_GP_ID_3 0x124 |
| 276 | #define DA9063_BB_REG_GP_ID_4 0x125 |
| 277 | #define DA9063_BB_REG_GP_ID_5 0x126 |
| 278 | #define DA9063_BB_REG_GP_ID_6 0x127 |
| 279 | #define DA9063_BB_REG_GP_ID_7 0x128 |
| 280 | #define DA9063_BB_REG_GP_ID_8 0x129 |
| 281 | #define DA9063_BB_REG_GP_ID_9 0x12A |
| 282 | #define DA9063_BB_REG_GP_ID_10 0x12B |
| 283 | #define DA9063_BB_REG_GP_ID_11 0x12C |
| 284 | #define DA9063_BB_REG_GP_ID_12 0x12D |
| 285 | #define DA9063_BB_REG_GP_ID_13 0x12E |
| 286 | #define DA9063_BB_REG_GP_ID_14 0x12F |
| 287 | #define DA9063_BB_REG_GP_ID_15 0x130 |
| 288 | #define DA9063_BB_REG_GP_ID_16 0x131 |
| 289 | #define DA9063_BB_REG_GP_ID_17 0x132 |
| 290 | #define DA9063_BB_REG_GP_ID_18 0x133 |
| 291 | #define DA9063_BB_REG_GP_ID_19 0x134 |
| 292 | |
| 293 | /* 0x135 - 0x13f are readable, but not documented */ |
| 294 | #define DA9063_REG_HOLE_3 {0x140, 0x17F} |
| 295 | |
| 296 | /* Chip ID and variant */ |
| 297 | #define DA9063_REG_CHIP_ID 0x181 |
| 298 | #define DA9063_REG_CHIP_VARIANT 0x182 |
| 299 | #define DA9063_REG_CUSTOMER_ID 0x183 |
| 300 | #define DA9063_REG_CONFIG_ID 0x184 |
| 301 | |
| 302 | #define DA9063_NUM_OF_REGS (DA9063_REG_CONFIG_ID + 1) |
| 303 | |
| 304 | /* Drivers name */ |
| 305 | #define DA9063_LDO_DRIVER "da9063_ldo" |
| 306 | #define DA9063_BUCK_DRIVER "da9063_buck" |
| 307 | |
Martin Fuzzey | 7ae22d8 | 2020-01-14 15:56:17 +0000 | [diff] [blame] | 308 | /* Regulator modes */ |
| 309 | enum { |
| 310 | DA9063_LDOMODE_SLEEP, |
| 311 | DA9063_LDOMODE_NORMAL |
| 312 | }; |
| 313 | |
| 314 | enum { |
| 315 | DA9063_BUCKMODE_SLEEP, |
| 316 | DA9063_BUCKMODE_SYNC, |
| 317 | DA9063_BUCKMODE_AUTO, |
| 318 | }; |
| 319 | |
Martin Fuzzey | 483880c | 2020-01-14 15:56:16 +0000 | [diff] [blame] | 320 | #endif |