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Dirk Behmef904cdb2009-01-27 18:19:12 +01001/*
2 * (C) Copyright 2006-2008
3 * Texas Instruments.
4 * Richard Woodruff <r-woodruff2@ti.com>
5 * Syed Mohammed Khasim <x0khasim@ti.com>
6 *
7 * Configuration settings for the TI OMAP3530 Beagle board.
8 *
9 * See file CREDITS for list of people who contributed to this
10 * project.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License as
14 * published by the Free Software Foundation; either version 2 of
15 * the License, or (at your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, write to the Free Software
24 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 * MA 02111-1307 USA
26 */
27
28#ifndef __CONFIG_H
29#define __CONFIG_H
Dirk Behmef904cdb2009-01-27 18:19:12 +010030
31/*
32 * High Level Configuration Options
33 */
34#define CONFIG_ARMCORTEXA8 1 /* This is an ARM V7 CPU core */
35#define CONFIG_OMAP 1 /* in a TI OMAP core */
36#define CONFIG_OMAP34XX 1 /* which is a 34XX */
37#define CONFIG_OMAP3430 1 /* which is in a 3430 */
38#define CONFIG_OMAP3_BEAGLE 1 /* working with BEAGLE */
39
40#include <asm/arch/cpu.h> /* get chip and board defs */
41#include <asm/arch/omap3.h>
42
Sanjeev Premi6a6b62e2009-04-27 21:27:27 +053043/*
44 * Display CPU and Board information
45 */
46#define CONFIG_DISPLAY_CPUINFO 1
47#define CONFIG_DISPLAY_BOARDINFO 1
48
Dirk Behmef904cdb2009-01-27 18:19:12 +010049/* Clock Defines */
50#define V_OSCK 26000000 /* Clock output from T2 */
51#define V_SCLK (V_OSCK >> 1)
52
53#undef CONFIG_USE_IRQ /* no support for IRQs */
54#define CONFIG_MISC_INIT_R
55
56#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
57#define CONFIG_SETUP_MEMORY_TAGS 1
58#define CONFIG_INITRD_TAG 1
59#define CONFIG_REVISION_TAG 1
60
61/*
62 * Size of malloc() pool
63 */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040064#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */
Dirk Behmef904cdb2009-01-27 18:19:12 +010065 /* Sector */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -040066#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Dirk Behmef904cdb2009-01-27 18:19:12 +010067#define CONFIG_SYS_GBL_DATA_SIZE 128 /* bytes reserved for */
68 /* initial data */
69
70/*
71 * Hardware drivers
72 */
73
74/*
75 * NS16550 Configuration
76 */
77#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
78
79#define CONFIG_SYS_NS16550
80#define CONFIG_SYS_NS16550_SERIAL
81#define CONFIG_SYS_NS16550_REG_SIZE (-4)
82#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
83
84/*
85 * select serial console configuration
86 */
87#define CONFIG_CONS_INDEX 3
88#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
89#define CONFIG_SERIAL3 3 /* UART3 on Beagle Rev 2 */
90
91/* allow to overwrite serial and ethaddr */
92#define CONFIG_ENV_OVERWRITE
93#define CONFIG_BAUDRATE 115200
94#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
95 115200}
96#define CONFIG_MMC 1
97#define CONFIG_OMAP3_MMC 1
98#define CONFIG_DOS_PARTITION 1
99
Nishanth Menon30563a02009-11-07 10:51:24 -0500100/* DDR - I use Micron DDR */
101#define CONFIG_OMAP3_MICRON_DDR 1
102
Tom Rix25374bf2009-10-31 12:37:43 -0500103/* USB */
104#define CONFIG_MUSB_UDC 1
105#define CONFIG_USB_OMAP3 1
106#define CONFIG_TWL4030_USB 1
107
108/* USB device configuration */
109#define CONFIG_USB_DEVICE 1
110#define CONFIG_USB_TTY 1
111#define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
112/* Change these to suit your needs */
113#define CONFIG_USBD_VENDORID 0x0451
114#define CONFIG_USBD_PRODUCTID 0x5678
115#define CONFIG_USBD_MANUFACTURER "Texas Instruments"
116#define CONFIG_USBD_PRODUCT_NAME "Beagle"
117
Dirk Behmef904cdb2009-01-27 18:19:12 +0100118/* commands to include */
119#include <config_cmd_default.h>
120
121#define CONFIG_CMD_EXT2 /* EXT2 Support */
122#define CONFIG_CMD_FAT /* FAT support */
123#define CONFIG_CMD_JFFS2 /* JFFS2 Support */
Nishanth Menon917cfc72009-03-25 22:13:56 +0100124#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
Stefan Roese942556a2009-05-12 14:32:58 +0200125#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Nishanth Menon917cfc72009-03-25 22:13:56 +0100126#define MTDIDS_DEFAULT "nand0=nand"
127#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
128 "1920k(u-boot),128k(u-boot-env),"\
129 "4m(kernel),-(fs)"
Dirk Behmef904cdb2009-01-27 18:19:12 +0100130
131#define CONFIG_CMD_I2C /* I2C serial bus support */
132#define CONFIG_CMD_MMC /* MMC support */
133#define CONFIG_CMD_NAND /* NAND support */
134
135#undef CONFIG_CMD_FLASH /* flinfo, erase, protect */
136#undef CONFIG_CMD_FPGA /* FPGA configuration Support */
137#undef CONFIG_CMD_IMI /* iminfo */
138#undef CONFIG_CMD_IMLS /* List all found images */
139#undef CONFIG_CMD_NET /* bootp, tftpboot, rarpboot */
140#undef CONFIG_CMD_NFS /* NFS support */
141
142#define CONFIG_SYS_NO_FLASH
Tom Rix0297ec72009-09-29 10:19:49 -0400143#define CONFIG_HARD_I2C 1
Dirk Behmef904cdb2009-01-27 18:19:12 +0100144#define CONFIG_SYS_I2C_SPEED 100000
145#define CONFIG_SYS_I2C_SLAVE 1
146#define CONFIG_SYS_I2C_BUS 0
147#define CONFIG_SYS_I2C_BUS_SELECT 1
148#define CONFIG_DRIVER_OMAP34XX_I2C 1
149
150/*
Tom Rix2c155132009-06-28 12:52:30 -0500151 * TWL4030
152 */
153#define CONFIG_TWL4030_POWER 1
154#define CONFIG_TWL4030_LED 1
155
156/*
Dirk Behmef904cdb2009-01-27 18:19:12 +0100157 * Board NAND Info.
158 */
159#define CONFIG_NAND_OMAP_GPMC
160#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
161 /* to access nand */
162#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
163 /* to access nand at */
164 /* CS0 */
165#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
166
167#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
168 /* devices */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100169#define CONFIG_JFFS2_NAND
170/* nand device jffs2 lives on */
171#define CONFIG_JFFS2_DEV "nand0"
172/* start of jffs2 partition */
173#define CONFIG_JFFS2_PART_OFFSET 0x680000
174#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
175 /* partition */
176
177/* Environment information */
178#define CONFIG_BOOTDELAY 10
179
180#define CONFIG_EXTRA_ENV_SETTINGS \
181 "loadaddr=0x82000000\0" \
Tom Rix25374bf2009-10-31 12:37:43 -0500182 "usbtty=cdc_acm\0" \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100183 "console=ttyS2,115200n8\0" \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400184 "vram=12M\0" \
185 "dvimode=1024x768MR-16@60\0" \
186 "defaultdisplay=dvi\0" \
187 "mmcroot=/dev/mmcblk0p2 rw\0" \
188 "mmcrootfstype=ext3 rootwait\0" \
189 "nandroot=/dev/mtdblock4 rw\0" \
190 "nandrootfstype=jffs2\0" \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100191 "mmcargs=setenv bootargs console=${console} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400192 "vram=${vram} " \
193 "omapfb.mode=dvi:${dvimode} " \
194 "omapfb.debug=y " \
195 "omapdss.def_disp=${defaultdisplay} " \
196 "root=${mmcroot} " \
197 "rootfstype=${mmcrootfstype}\0" \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100198 "nandargs=setenv bootargs console=${console} " \
Steve Sakoman13d2cb92009-10-10 14:29:37 -0400199 "vram=${vram} " \
200 "omapfb.mode=dvi:${dvimode} " \
201 "omapfb.debug=y " \
202 "omapdss.def_disp=${defaultdisplay} " \
203 "root=${nandroot} " \
204 "rootfstype=${nandrootfstype}\0" \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100205 "loadbootscript=fatload mmc 0 ${loadaddr} boot.scr\0" \
206 "bootscript=echo Running bootscript from mmc ...; " \
Wolfgang Denk74de7ae2009-04-01 23:34:12 +0200207 "source ${loadaddr}\0" \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100208 "loaduimage=fatload mmc 0 ${loadaddr} uImage\0" \
209 "mmcboot=echo Booting from mmc ...; " \
210 "run mmcargs; " \
211 "bootm ${loadaddr}\0" \
212 "nandboot=echo Booting from nand ...; " \
213 "run nandargs; " \
214 "nand read ${loadaddr} 280000 400000; " \
215 "bootm ${loadaddr}\0" \
216
217#define CONFIG_BOOTCOMMAND \
Dirk Behmea85693b2009-04-21 17:30:51 +0200218 "if mmc init; then " \
Dirk Behmef904cdb2009-01-27 18:19:12 +0100219 "if run loadbootscript; then " \
220 "run bootscript; " \
221 "else " \
222 "if run loaduimage; then " \
223 "run mmcboot; " \
224 "else run nandboot; " \
225 "fi; " \
226 "fi; " \
227 "else run nandboot; fi"
228
229#define CONFIG_AUTO_COMPLETE 1
230/*
231 * Miscellaneous configurable options
232 */
233#define V_PROMPT "OMAP3 beagleboard.org # "
234
235#define CONFIG_SYS_LONGHELP /* undef to save memory */
236#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
237#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
238#define CONFIG_SYS_PROMPT V_PROMPT
239#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
240/* Print Buffer Size */
241#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
242 sizeof(CONFIG_SYS_PROMPT) + 16)
243#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
244/* Boot Argument Buffer Size */
245#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
246
247#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
248 /* works on */
249#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
250 0x01F00000) /* 31MB */
251
Dirk Behmef904cdb2009-01-27 18:19:12 +0100252#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
253 /* load address */
254
255/*
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200256 * OMAP3 has 12 GP timers, they can be driven by the system clock
257 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
258 * This rate is divided by a local divisor.
Dirk Behmef904cdb2009-01-27 18:19:12 +0100259 */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100260#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
Manikandan Pillaid3a513c2009-04-21 17:29:05 +0200261#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
262#define CONFIG_SYS_HZ 1000
Dirk Behmef904cdb2009-01-27 18:19:12 +0100263
264/*-----------------------------------------------------------------------
265 * Stack sizes
266 *
267 * The stack sizes are set up in start.S using the settings below
268 */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400269#define CONFIG_STACKSIZE (128 << 10) /* regular stack 128 KiB */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100270#ifdef CONFIG_USE_IRQ
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400271#define CONFIG_STACKSIZE_IRQ (4 << 10) /* IRQ stack 4 KiB */
272#define CONFIG_STACKSIZE_FIQ (4 << 10) /* FIQ stack 4 KiB */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100273#endif
274
275/*-----------------------------------------------------------------------
276 * Physical Memory Map
277 */
278#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
279#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400280#define PHYS_SDRAM_1_SIZE (32 << 20) /* at least 32 MiB */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100281#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
282
283/* SDRAM Bank Allocation method */
284#define SDRC_R_B_C 1
285
286/*-----------------------------------------------------------------------
287 * FLASH and environment organization
288 */
289
290/* **** PISMO SUPPORT *** */
291
292/* Configure the PISMO */
293#define PISMO1_NAND_SIZE GPMC_SIZE_128M
294#define PISMO1_ONEN_SIZE GPMC_SIZE_128M
295
296#define CONFIG_SYS_MAX_FLASH_SECT 520 /* max number of sectors on */
297 /* one chip */
298#define CONFIG_SYS_MAX_FLASH_BANKS 2 /* max number of flash banks */
Sandeep Paulraj9c44ddc2009-09-09 11:50:40 -0400299#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Dirk Behmef904cdb2009-01-27 18:19:12 +0100300
301#define CONFIG_SYS_FLASH_BASE boot_flash_base
302
303/* Monitor at start of flash */
304#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
305#define CONFIG_SYS_ONENAND_BASE ONENAND_MAP
306
307#define CONFIG_ENV_IS_IN_NAND 1
308#define ONENAND_ENV_OFFSET 0x260000 /* environment starts here */
309#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
310
311#define CONFIG_SYS_ENV_SECT_SIZE boot_flash_sec
312#define CONFIG_ENV_OFFSET boot_flash_off
313#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
314
315/*-----------------------------------------------------------------------
316 * CFI FLASH driver setup
317 */
318/* timeout values are in ticks */
319#define CONFIG_SYS_FLASH_ERASE_TOUT (100 * CONFIG_SYS_HZ)
320#define CONFIG_SYS_FLASH_WRITE_TOUT (100 * CONFIG_SYS_HZ)
321
322/* Flash banks JFFS2 should use */
323#define CONFIG_SYS_MAX_MTD_BANKS (CONFIG_SYS_MAX_FLASH_BANKS + \
324 CONFIG_SYS_MAX_NAND_DEVICE)
325#define CONFIG_SYS_JFFS2_MEM_NAND
326/* use flash_info[2] */
327#define CONFIG_SYS_JFFS2_FIRST_BANK CONFIG_SYS_MAX_FLASH_BANKS
328#define CONFIG_SYS_JFFS2_NUM_BANKS 1
329
330#ifndef __ASSEMBLY__
Dirk Behme97a099e2009-08-08 09:30:21 +0200331extern struct gpmc *gpmc_cfg;
Dirk Behmef904cdb2009-01-27 18:19:12 +0100332extern unsigned int boot_flash_base;
333extern volatile unsigned int boot_flash_env_addr;
334extern unsigned int boot_flash_off;
335extern unsigned int boot_flash_sec;
336extern unsigned int boot_flash_type;
337#endif
338
Dirk Behmef904cdb2009-01-27 18:19:12 +0100339#endif /* __CONFIG_H */