| Dirk Eibach | 6008326 | 2017-02-22 16:07:23 +0100 | [diff] [blame] | 1 | struct ihs_fpga { |
| 2 | u32 reflection_low; /* 0x0000 */ | ||||
| 3 | u32 versions; /* 0x0004 */ | ||||
| 4 | u32 fpga_version; /* 0x0008 */ | ||||
| 5 | u32 fpga_features; /* 0x000c */ | ||||
| 6 | u32 reserved0[4]; /* 0x0010 */ | ||||
| 7 | u32 control; /* 0x0020 */ | ||||
| 8 | u32 reserved1[375]; /* 0x0024 */ | ||||
| 9 | u32 qsgmii_port_state[80]; /* 0x0600 */ | ||||
| 10 | }; | ||||
| 11 | |||||
| 12 | void print_hydra_version(uint index); | ||||
| 13 | void hydra_initialize(void); | ||||
| 14 | struct ihs_fpga *get_fpga(void); | ||||