Gitiles
Code Review Sign In
gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / ee7d755a58403fe342a97e40c3e64184d0197992 / . / arch / arm / dts / tegra20-harmony.dts
blob: 3eb9aa503ed84280c4b18884201f32973dd1dfce [file] [log] [blame]
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]1/dts-v1/;
2
Tom Warren6c5be642013-02-21 12:31:27 +0000[diff] [blame]3#include "tegra20.dtsi"
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]4
5/ {
Allen Martin00a27492012-08-31 08:30:00 +0000[diff] [blame]6 model = "NVIDIA Tegra20 Harmony evaluation board";
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]7 compatible = "nvidia,harmony", "nvidia,tegra20";
8
Simon Glassc3691392014-09-04 16:27:35 -0600[diff] [blame]9 chosen {
10 stdout-path = &uartd;
11 };
12
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]13 aliases {
14 usb0 = "/usb@c5008000";
Stephen Warren699c40e2012-10-12 09:45:48 +0000[diff] [blame]15 usb1 = "/usb@c5004000";
Tom Warren126685a2013-02-21 12:31:29 +0000[diff] [blame]16 sdhci0 = "/sdhci@c8000600";
17 sdhci1 = "/sdhci@c8000200";
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]18 };
19
20 memory {
21 reg = <0x00000000 0x40000000>;
22 };
23
Simon Glassee7d7552016-01-30 16:37:52 -0700[diff] [blame^]24 host1x@50000000 {
Stephen Warrenb46694d2013-06-18 09:46:51 -0600[diff] [blame]25 status = "okay";
26 dc@54200000 {
27 status = "okay";
28 rgb {
29 status = "okay";
30 nvidia,panel = <&lcd_panel>;
31 };
32 };
33 };
34
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]35 serial@70006300 {
36 clock-frequency = < 216000000 >;
37 };
38
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]39 nand-controller@70008000 {
Simon Glass2b2b50b2015-01-05 20:05:41 -0700[diff] [blame]40 nvidia,wp-gpios = <&gpio TEGRA_GPIO(C, 7) GPIO_ACTIVE_HIGH>;
Allen Martinb7723f32013-01-16 13:12:24 +0000[diff] [blame]41 nvidia,width = <8>;
42 nvidia,timing = <26 100 20 80 20 10 12 10 70>;
43 nand@0 {
44 reg = <0>;
45 compatible = "hynix,hy27uf4g2b", "nand-flash";
46 };
47 };
48
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]49 usb@c5004000 {
Simon Glassee7d7552016-01-30 16:37:52 -0700[diff] [blame^]50 statuc = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700[diff] [blame]51 nvidia,phy-reset-gpio = <&gpio TEGRA_GPIO(V, 1) 0>;
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]52 };
Tom Warren126685a2013-02-21 12:31:29 +0000[diff] [blame]53
Simon Glassee7d7552016-01-30 16:37:52 -0700[diff] [blame^]54 usb@c5008000 {
55 status = "okay";
56 };
57
Tom Warren126685a2013-02-21 12:31:29 +0000[diff] [blame]58 sdhci@c8000200 {
59 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700[diff] [blame]60 cd-gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>;
61 wp-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>;
62 power-gpios = <&gpio TEGRA_GPIO(T, 3) GPIO_ACTIVE_HIGH>;
Tom Warren126685a2013-02-21 12:31:29 +0000[diff] [blame]63 bus-width = <4>;
64 };
65
66 sdhci@c8000600 {
67 status = "okay";
Simon Glass2b2b50b2015-01-05 20:05:41 -0700[diff] [blame]68 cd-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_LOW>;
69 wp-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
70 power-gpios = <&gpio TEGRA_GPIO(I, 6) GPIO_ACTIVE_HIGH>;
Tom Warren126685a2013-02-21 12:31:29 +0000[diff] [blame]71 bus-width = <8>;
72 };
Stephen Warrenb46694d2013-06-18 09:46:51 -0600[diff] [blame]73
Simon Glassee7d7552016-01-30 16:37:52 -0700[diff] [blame^]74 clocks {
75 compatible = "simple-bus";
76 #address-cells = <1>;
77 #size-cells = <0>;
78
79 clk32k_in: clock@0 {
80 compatible = "fixed-clock";
81 reg=<0>;
82 #clock-cells = <0>;
83 clock-frequency = <32768>;
84 };
85 };
86
Stephen Warrenb46694d2013-06-18 09:46:51 -0600[diff] [blame]87 lcd_panel: panel {
88 clock = <42430000>;
89 xres = <1024>;
90 yres = <600>;
91 left-margin = <138>;
92 right-margin = <34>;
93 hsync-len = <136>;
94 lower-margin = <4>;
95 upper-margin = <21>;
96 vsync-len = <4>;
97 hsync-active-high;
98 vsyncx-active-high;
99 nvidia,bits-per-pixel = <16>;
100 nvidia,pwm = <&pwm 0 0>;
Simon Glass2b2b50b2015-01-05 20:05:41 -0700[diff] [blame]101 nvidia,backlight-enable-gpios = <&gpio TEGRA_GPIO(B, 5)
102 GPIO_ACTIVE_HIGH>;
103 nvidia,lvds-shutdown-gpios = <&gpio TEGRA_GPIO(B, 2)
104 GPIO_ACTIVE_HIGH>;
105 nvidia,backlight-vdd-gpios = <&gpio TEGRA_GPIO(W, 0)
106 GPIO_ACTIVE_HIGH>;
107 nvidia,panel-vdd-gpios = <&gpio TEGRA_GPIO(C, 6)
108 GPIO_ACTIVE_HIGH>;
Stephen Warrenb46694d2013-06-18 09:46:51 -0600[diff] [blame]109 nvidia,panel-timings = <0 0 200 0 0>;
110 };
Stephen Warrenf3d93302012-05-21 10:04:27 +0000[diff] [blame]111};