Masahiro Yamada | 5ca269a | 2015-03-16 16:43:24 +0900 | [diff] [blame] | 1 | if ARCH_ZYNQ |
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 2 | |
Tien Fong Chee | 0c3a9ed | 2019-01-23 14:20:03 +0800 | [diff] [blame] | 3 | config SPL_FS_FAT |
Simon Glass | ae56db5 | 2016-09-12 23:18:38 -0600 | [diff] [blame] | 4 | default y |
5 | |||||
Simon Glass | 77d2f7f | 2016-09-12 23:18:41 -0600 | [diff] [blame] | 6 | config SPL_LIBCOMMON_SUPPORT |
7 | default y | ||||
8 | |||||
Simon Glass | 1646eba | 2016-09-12 23:18:42 -0600 | [diff] [blame] | 9 | config SPL_LIBDISK_SUPPORT |
10 | default y | ||||
11 | |||||
Simon Glass | cc4288e | 2016-09-12 23:18:43 -0600 | [diff] [blame] | 12 | config SPL_LIBGENERIC_SUPPORT |
13 | default y | ||||
14 | |||||
Simon Glass | 103c5f1 | 2021-08-08 12:20:09 -0600 | [diff] [blame] | 15 | config SPL_MMC |
Masahiro Yamada | 08aa033 | 2017-01-30 19:46:51 +0900 | [diff] [blame] | 16 | default y if MMC_SDHCI_ZYNQ |
Simon Glass | 1fdf7c6 | 2016-09-12 23:18:44 -0600 | [diff] [blame] | 17 | |
Simon Glass | 2a73606 | 2021-08-08 12:20:12 -0600 | [diff] [blame] | 18 | config SPL_SERIAL |
Simon Glass | e00f76c | 2016-09-12 23:18:56 -0600 | [diff] [blame] | 19 | default y |
20 | |||||
Simon Glass | e404ade | 2016-09-12 23:18:57 -0600 | [diff] [blame] | 21 | config SPL_SPI_FLASH_SUPPORT |
22 | default y if ZYNQ_QSPI | ||||
23 | |||||
Simon Glass | ea2ca7e | 2021-08-08 12:20:14 -0600 | [diff] [blame] | 24 | config SPL_SPI |
Simon Glass | f35ed9e | 2016-09-12 23:18:58 -0600 | [diff] [blame] | 25 | default y if ZYNQ_QSPI |
26 | |||||
Siva Durga Prasad Paladugu | d84bd92 | 2017-05-12 15:04:11 +0530 | [diff] [blame] | 27 | config ZYNQ_DDRC_INIT |
28 | bool "Zynq DDRC initialization" | ||||
29 | default y | ||||
30 | help | ||||
31 | This option used to perform DDR specific initialization | ||||
32 | if required. There might be cases like ddr less where we | ||||
33 | want to skip ddr init and this option is useful for it. | ||||
34 | |||||
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 35 | config SYS_BOARD |
Michal Simek | 3b2b2cc | 2018-03-04 16:15:15 +0100 | [diff] [blame] | 36 | string "Board name" |
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 37 | default "zynq" |
38 | |||||
39 | config SYS_VENDOR | ||||
Mike Looijmans | ba4ccf9 | 2016-09-28 07:46:30 +0200 | [diff] [blame] | 40 | string "Vendor name" |
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 41 | default "xilinx" |
42 | |||||
43 | config SYS_SOC | ||||
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 44 | default "zynq" |
45 | |||||
Simon Glass | 04e3890 | 2016-07-05 17:10:13 -0600 | [diff] [blame] | 46 | config SYS_MALLOC_F_LEN |
Anton Gerasimov | 8a26070 | 2018-12-24 02:29:04 +0100 | [diff] [blame] | 47 | default 0x800 |
Simon Glass | 04e3890 | 2016-07-05 17:10:13 -0600 | [diff] [blame] | 48 | |
Siva Durga Prasad Paladugu | 01aa5b8 | 2018-07-20 15:11:38 +0530 | [diff] [blame] | 49 | config SYS_MALLOC_LEN |
50 | default 0x1400000 | ||||
51 | |||||
Mike Looijmans | 3b64608 | 2016-09-20 11:37:24 +0200 | [diff] [blame] | 52 | config BOOT_INIT_FILE |
53 | string "boot.bin init register filename" | ||||
54 | default "" | ||||
55 | help | ||||
56 | Add register writes to boot.bin format (max 256 pairs). | ||||
57 | Expect a table of register-value pairs, e.g. "0x12345678 0x4321" | ||||
58 | |||||
Vipul Kumar | 5dc5a53 | 2018-02-28 15:53:28 +0530 | [diff] [blame] | 59 | config ZYNQ_SDHCI_MAX_FREQ |
60 | default 52000000 | ||||
61 | |||||
Michal Simek | 6ba36c0 | 2020-08-27 15:34:11 +0200 | [diff] [blame] | 62 | source "board/xilinx/Kconfig" |
63 | source "board/xilinx/zynq/Kconfig" | ||||
64 | |||||
Masahiro Yamada | 44dcb40 | 2014-08-31 07:10:55 +0900 | [diff] [blame] | 65 | endif |