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wdenkaffae2b2002-08-17 09:36:01 +00001/*
wdenk04a85b32004-04-15 18:22:41 +00002 * (C) Copyright 2000-2004
wdenkaffae2b2002-08-17 09:36:01 +00003 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkaffae2b2002-08-17 09:36:01 +00006 */
7
8#ifndef _PCMCIA_H
9#define _PCMCIA_H
10
11#include <common.h>
12#include <config.h>
13
14/*
15 * Allow configuration to select PCMCIA slot,
16 * or try to generate a useful default
17 */
Jon Loeliger639221c2007-07-09 17:15:49 -050018#if defined(CONFIG_CMD_PCMCIA) || \
Simon Glassfc843a02017-05-17 03:25:30 -060019 (defined(CONFIG_IDE) && \
wdenkaffae2b2002-08-17 09:36:01 +000020 (defined(CONFIG_IDE_8xx_PCCARD) || defined(CONFIG_IDE_8xx_DIRECT) ) )
21
22#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
23
Masahiro Yamadad1a4aaf2014-08-06 12:59:52 +090024#if defined(CONFIG_TQM8xxL)
wdenkaffae2b2002-08-17 09:36:01 +000025# define CONFIG_PCMCIA_SLOT_B /* The TQM8xxL use SLOT_B */
wdenkaffae2b2002-08-17 09:36:01 +000026#else
27# error "PCMCIA Slot not configured"
28#endif
29
30#endif /* !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B) */
31
32/* Make sure exactly one slot is defined - we support only one for now */
33#if !defined(CONFIG_PCMCIA_SLOT_A) && !defined(CONFIG_PCMCIA_SLOT_B)
34#error Neither CONFIG_PCMCIA_SLOT_A nor CONFIG_PCMCIA_SLOT_B configured
35#endif
36#if defined(CONFIG_PCMCIA_SLOT_A) && defined(CONFIG_PCMCIA_SLOT_B)
37#error Both CONFIG_PCMCIA_SLOT_A and CONFIG_PCMCIA_SLOT_B configured
38#endif
39
wdenkea909b72002-11-21 23:11:29 +000040#ifndef PCMCIA_SOCKETS_NO
wdenkaffae2b2002-08-17 09:36:01 +000041#define PCMCIA_SOCKETS_NO 1
wdenkea909b72002-11-21 23:11:29 +000042#endif
43#ifndef PCMCIA_MEM_WIN_NO
wdenkaffae2b2002-08-17 09:36:01 +000044#define PCMCIA_MEM_WIN_NO 4
wdenkea909b72002-11-21 23:11:29 +000045#endif
wdenkaffae2b2002-08-17 09:36:01 +000046#define PCMCIA_IO_WIN_NO 2
47
48/* define _slot_ to be able to optimize macros */
49#ifdef CONFIG_PCMCIA_SLOT_A
50# define _slot_ 0
51# define PCMCIA_SLOT_MSG "slot A"
52# define PCMCIA_SLOT_x PCMCIA_PSLOT_A
53#else
54# define _slot_ 1
55# define PCMCIA_SLOT_MSG "slot B"
56# define PCMCIA_SLOT_x PCMCIA_PSLOT_B
57#endif
58
59/*
60 * The TQM850L hardware has two pins swapped! Grrrrgh!
61 */
62#ifdef CONFIG_TQM850L
63#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXOE
64#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXRESET
65#else
66#define __MY_PCMCIA_GCRX_CXRESET PCMCIA_GCRX_CXRESET
67#define __MY_PCMCIA_GCRX_CXOE PCMCIA_GCRX_CXOE
68#endif
69
70/*
71 * This structure is used to address each window in the PCMCIA controller.
72 *
73 * Keep in mind that we assume that pcmcia_win_t[n+1] is mapped directly
74 * after pcmcia_win_t[n]...
75 */
76
77typedef struct {
78 ulong br;
79 ulong or;
80} pcmcia_win_t;
81
82/*
83 * Definitions for PCMCIA control registers to operate in IDE mode
84 *
85 * All timing related setup (PCMCIA_SHT, PCMCIA_SST, PCMCIA_SL)
86 * to be done later (depending on CPU clock)
87 */
88
89/* Window 0:
90 * Base: 0xFE100000 CS1
91 * Port Size: 2 Bytes
92 * Port Size: 16 Bit
93 * Common Memory Space
94 */
95
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020096#define CONFIG_SYS_PCMCIA_PBR0 0xFE100000
97#define CONFIG_SYS_PCMCIA_POR0 ( PCMCIA_BSIZE_2 \
wdenkaffae2b2002-08-17 09:36:01 +000098 | PCMCIA_PPS_16 \
99 | PCMCIA_PRS_MEM \
100 | PCMCIA_SLOT_x \
101 | PCMCIA_PV \
102 )
103
104/* Window 1:
105 * Base: 0xFE100080 CS1
106 * Port Size: 8 Bytes
107 * Port Size: 8 Bit
108 * Common Memory Space
109 */
110
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200111#define CONFIG_SYS_PCMCIA_PBR1 0xFE100080
112#define CONFIG_SYS_PCMCIA_POR1 ( PCMCIA_BSIZE_8 \
wdenkaffae2b2002-08-17 09:36:01 +0000113 | PCMCIA_PPS_8 \
114 | PCMCIA_PRS_MEM \
115 | PCMCIA_SLOT_x \
116 | PCMCIA_PV \
117 )
118
119/* Window 2:
120 * Base: 0xFE100100 CS2
121 * Port Size: 8 Bytes
122 * Port Size: 8 Bit
123 * Common Memory Space
124 */
125
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200126#define CONFIG_SYS_PCMCIA_PBR2 0xFE100100
127#define CONFIG_SYS_PCMCIA_POR2 ( PCMCIA_BSIZE_8 \
wdenkaffae2b2002-08-17 09:36:01 +0000128 | PCMCIA_PPS_8 \
129 | PCMCIA_PRS_MEM \
130 | PCMCIA_SLOT_x \
131 | PCMCIA_PV \
132 )
133
134/* Window 3:
135 * not used
136 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200137#define CONFIG_SYS_PCMCIA_PBR3 0
138#define CONFIG_SYS_PCMCIA_POR3 0
wdenkaffae2b2002-08-17 09:36:01 +0000139
140/* Window 4:
141 * Base: 0xFE100C00 CS1
142 * Port Size: 2 Bytes
143 * Port Size: 16 Bit
144 * Common Memory Space
145 */
146
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200147#define CONFIG_SYS_PCMCIA_PBR4 0xFE100C00
148#define CONFIG_SYS_PCMCIA_POR4 ( PCMCIA_BSIZE_2 \
wdenkaffae2b2002-08-17 09:36:01 +0000149 | PCMCIA_PPS_16 \
150 | PCMCIA_PRS_MEM \
151 | PCMCIA_SLOT_x \
152 | PCMCIA_PV \
153 )
154
155/* Window 5:
156 * Base: 0xFE100C80 CS1
157 * Port Size: 8 Bytes
158 * Port Size: 8 Bit
159 * Common Memory Space
160 */
161
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200162#define CONFIG_SYS_PCMCIA_PBR5 0xFE100C80
163#define CONFIG_SYS_PCMCIA_POR5 ( PCMCIA_BSIZE_8 \
wdenkaffae2b2002-08-17 09:36:01 +0000164 | PCMCIA_PPS_8 \
165 | PCMCIA_PRS_MEM \
166 | PCMCIA_SLOT_x \
167 | PCMCIA_PV \
168 )
169
170/* Window 6:
171 * Base: 0xFE100D00 CS2
172 * Port Size: 8 Bytes
173 * Port Size: 8 Bit
174 * Common Memory Space
175 */
176
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_PCMCIA_PBR6 0xFE100D00
178#define CONFIG_SYS_PCMCIA_POR6 ( PCMCIA_BSIZE_8 \
wdenkaffae2b2002-08-17 09:36:01 +0000179 | PCMCIA_PPS_8 \
180 | PCMCIA_PRS_MEM \
181 | PCMCIA_SLOT_x \
182 | PCMCIA_PV \
183 )
184
185/* Window 7:
186 * not used
187 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200188#define CONFIG_SYS_PCMCIA_PBR7 0
189#define CONFIG_SYS_PCMCIA_POR7 0
wdenkaffae2b2002-08-17 09:36:01 +0000190
191/**********************************************************************/
192
193/*
194 * CIS Tupel codes
195 */
196#define CISTPL_NULL 0x00
197#define CISTPL_DEVICE 0x01
198#define CISTPL_LONGLINK_CB 0x02
199#define CISTPL_INDIRECT 0x03
200#define CISTPL_CONFIG_CB 0x04
201#define CISTPL_CFTABLE_ENTRY_CB 0x05
202#define CISTPL_LONGLINK_MFC 0x06
203#define CISTPL_BAR 0x07
204#define CISTPL_PWR_MGMNT 0x08
205#define CISTPL_EXTDEVICE 0x09
206#define CISTPL_CHECKSUM 0x10
207#define CISTPL_LONGLINK_A 0x11
208#define CISTPL_LONGLINK_C 0x12
209#define CISTPL_LINKTARGET 0x13
210#define CISTPL_NO_LINK 0x14
211#define CISTPL_VERS_1 0x15
212#define CISTPL_ALTSTR 0x16
213#define CISTPL_DEVICE_A 0x17
214#define CISTPL_JEDEC_C 0x18
215#define CISTPL_JEDEC_A 0x19
216#define CISTPL_CONFIG 0x1a
217#define CISTPL_CFTABLE_ENTRY 0x1b
218#define CISTPL_DEVICE_OC 0x1c
219#define CISTPL_DEVICE_OA 0x1d
220#define CISTPL_DEVICE_GEO 0x1e
221#define CISTPL_DEVICE_GEO_A 0x1f
222#define CISTPL_MANFID 0x20
223#define CISTPL_FUNCID 0x21
224#define CISTPL_FUNCE 0x22
225#define CISTPL_SWIL 0x23
226#define CISTPL_END 0xff
227
228/*
229 * CIS Function ID codes
230 */
231#define CISTPL_FUNCID_MULTI 0x00
232#define CISTPL_FUNCID_MEMORY 0x01
233#define CISTPL_FUNCID_SERIAL 0x02
234#define CISTPL_FUNCID_PARALLEL 0x03
235#define CISTPL_FUNCID_FIXED 0x04
236#define CISTPL_FUNCID_VIDEO 0x05
237#define CISTPL_FUNCID_NETWORK 0x06
238#define CISTPL_FUNCID_AIMS 0x07
239#define CISTPL_FUNCID_SCSI 0x08
240
241/*
242 * Fixed Disk FUNCE codes
243 */
244#define CISTPL_IDE_INTERFACE 0x01
245
246#define CISTPL_FUNCE_IDE_IFACE 0x01
247#define CISTPL_FUNCE_IDE_MASTER 0x02
248#define CISTPL_FUNCE_IDE_SLAVE 0x03
249
250/* First feature byte */
251#define CISTPL_IDE_SILICON 0x04
252#define CISTPL_IDE_UNIQUE 0x08
253#define CISTPL_IDE_DUAL 0x10
254
255/* Second feature byte */
256#define CISTPL_IDE_HAS_SLEEP 0x01
257#define CISTPL_IDE_HAS_STANDBY 0x02
258#define CISTPL_IDE_HAS_IDLE 0x04
259#define CISTPL_IDE_LOW_POWER 0x08
260#define CISTPL_IDE_REG_INHIBIT 0x10
261#define CISTPL_IDE_HAS_INDEX 0x20
262#define CISTPL_IDE_IOIS16 0x40
263
Jon Loeliger068b60a2007-07-10 10:27:39 -0500264#endif
wdenkaffae2b2002-08-17 09:36:01 +0000265
Wolfgang Denk9d407992006-07-10 23:07:28 +0200266#ifdef CONFIG_8xx
267extern u_int *pcmcia_pgcrx[];
268#define PCMCIA_PGCRX(slot) (*pcmcia_pgcrx[slot])
269#endif
270
Simon Glassfc843a02017-05-17 03:25:30 -0600271#if defined(CONFIG_IDE) && defined(CONFIG_IDE_8xx_PCCARD)
Wolfgang Denk9d407992006-07-10 23:07:28 +0200272extern int check_ide_device(int slot);
273#endif
274
wdenkaffae2b2002-08-17 09:36:01 +0000275#endif /* _PCMCIA_H */