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wdenkc6097192002-11-03 00:24:07 +00001/*
2 * (C) Copyright 2001
3 * Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com.
4 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02005 * SPDX-License-Identifier: GPL-2.0+
wdenkc6097192002-11-03 00:24:07 +00006 */
7
8/*
9 * This provides a bit-banged interface to the ethernet MII management
10 * channel.
11 */
12
13#include <common.h>
Simon Glassc74c8e62015-04-05 16:07:39 -060014#include <dm.h>
wdenkc6097192002-11-03 00:24:07 +000015#include <miiphy.h>
Andy Fleming5f184712011-04-08 02:10:27 -050016#include <phy.h>
wdenkc6097192002-11-03 00:24:07 +000017
Marian Balakowicz63ff0042005-10-28 22:30:33 +020018#include <asm/types.h>
19#include <linux/list.h>
20#include <malloc.h>
21#include <net.h>
22
23/* local debug macro */
Marian Balakowicz63ff0042005-10-28 22:30:33 +020024#undef MII_DEBUG
25
26#undef debug
27#ifdef MII_DEBUG
Andy Fleming16a53232011-04-07 14:38:35 -050028#define debug(fmt, args...) printf(fmt, ##args)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020029#else
Andy Fleming16a53232011-04-07 14:38:35 -050030#define debug(fmt, args...)
Marian Balakowicz63ff0042005-10-28 22:30:33 +020031#endif /* MII_DEBUG */
32
Marian Balakowicz63ff0042005-10-28 22:30:33 +020033static struct list_head mii_devs;
34static struct mii_dev *current_mii;
35
Mike Frysinger0daac972010-07-27 18:35:09 -040036/*
37 * Lookup the mii_dev struct by the registered device name.
38 */
Andy Fleming5f184712011-04-08 02:10:27 -050039struct mii_dev *miiphy_get_dev_by_name(const char *devname)
Mike Frysinger0daac972010-07-27 18:35:09 -040040{
41 struct list_head *entry;
42 struct mii_dev *dev;
43
44 if (!devname) {
45 printf("NULL device name!\n");
46 return NULL;
47 }
48
49 list_for_each(entry, &mii_devs) {
50 dev = list_entry(entry, struct mii_dev, link);
51 if (strcmp(dev->name, devname) == 0)
52 return dev;
53 }
54
Mike Frysinger0daac972010-07-27 18:35:09 -040055 return NULL;
56}
57
Marian Balakowicz63ff0042005-10-28 22:30:33 +020058/*****************************************************************************
59 *
Marian Balakowiczd9785c12005-11-30 18:06:04 +010060 * Initialize global data. Need to be called before any other miiphy routine.
61 */
Mike Frysinger5700bb62010-07-27 18:35:08 -040062void miiphy_init(void)
Marian Balakowiczd9785c12005-11-30 18:06:04 +010063{
Andy Fleming16a53232011-04-07 14:38:35 -050064 INIT_LIST_HEAD(&mii_devs);
Larry Johnson298035d2007-10-31 11:21:29 -050065 current_mii = NULL;
Marian Balakowiczd9785c12005-11-30 18:06:04 +010066}
67
Andy Fleming5f184712011-04-08 02:10:27 -050068struct mii_dev *mdio_alloc(void)
69{
70 struct mii_dev *bus;
71
72 bus = malloc(sizeof(*bus));
73 if (!bus)
74 return bus;
75
76 memset(bus, 0, sizeof(*bus));
77
78 /* initalize mii_dev struct fields */
79 INIT_LIST_HEAD(&bus->link);
80
81 return bus;
82}
83
Bin Mengcb6baca2015-10-07 21:32:37 -070084void mdio_free(struct mii_dev *bus)
85{
86 free(bus);
87}
88
Andy Fleming5f184712011-04-08 02:10:27 -050089int mdio_register(struct mii_dev *bus)
90{
Peng Fand39449b2015-11-24 17:03:47 +080091 if (!bus || !bus->read || !bus->write)
Andy Fleming5f184712011-04-08 02:10:27 -050092 return -1;
93
94 /* check if we have unique name */
95 if (miiphy_get_dev_by_name(bus->name)) {
96 printf("mdio_register: non unique device name '%s'\n",
97 bus->name);
98 return -1;
99 }
100
101 /* add it to the list */
102 list_add_tail(&bus->link, &mii_devs);
103
104 if (!current_mii)
105 current_mii = bus;
106
107 return 0;
108}
109
Michal Simek79e2a6a2016-12-08 10:06:26 +0100110int mdio_register_seq(struct mii_dev *bus, int seq)
111{
112 int ret;
113
114 /* Setup a unique name for each mdio bus */
115 ret = snprintf(bus->name, MDIO_NAME_LEN, "eth%d", seq);
116 if (ret < 0)
117 return ret;
118
119 return mdio_register(bus);
120}
121
Bin Mengcb6baca2015-10-07 21:32:37 -0700122int mdio_unregister(struct mii_dev *bus)
123{
124 if (!bus)
125 return 0;
126
127 /* delete it from the list */
128 list_del(&bus->link);
129
130 if (current_mii == bus)
131 current_mii = NULL;
132
133 return 0;
134}
135
Andy Fleming5f184712011-04-08 02:10:27 -0500136void mdio_list_devices(void)
137{
138 struct list_head *entry;
139
140 list_for_each(entry, &mii_devs) {
141 int i;
142 struct mii_dev *bus = list_entry(entry, struct mii_dev, link);
143
144 printf("%s:\n", bus->name);
145
146 for (i = 0; i < PHY_MAX_ADDR; i++) {
147 struct phy_device *phydev = bus->phymap[i];
148
149 if (phydev) {
Michal Simek15a2acd2016-11-16 08:41:01 +0100150 printf("%x - %s", i, phydev->drv->name);
Andy Fleming5f184712011-04-08 02:10:27 -0500151
152 if (phydev->dev)
153 printf(" <--> %s\n", phydev->dev->name);
154 else
155 printf("\n");
156 }
157 }
158 }
159}
160
Mike Frysinger5700bb62010-07-27 18:35:08 -0400161int miiphy_set_current_dev(const char *devname)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200162{
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200163 struct mii_dev *dev;
164
Andy Fleming5f184712011-04-08 02:10:27 -0500165 dev = miiphy_get_dev_by_name(devname);
Mike Frysinger0daac972010-07-27 18:35:09 -0400166 if (dev) {
167 current_mii = dev;
168 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200169 }
170
Andy Fleming5f184712011-04-08 02:10:27 -0500171 printf("No such device: %s\n", devname);
172
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200173 return 1;
174}
175
Andy Fleming5f184712011-04-08 02:10:27 -0500176struct mii_dev *mdio_get_current_dev(void)
177{
178 return current_mii;
179}
180
181struct phy_device *mdio_phydev_for_ethname(const char *ethname)
182{
183 struct list_head *entry;
184 struct mii_dev *bus;
185
186 list_for_each(entry, &mii_devs) {
187 int i;
188 bus = list_entry(entry, struct mii_dev, link);
189
190 for (i = 0; i < PHY_MAX_ADDR; i++) {
191 if (!bus->phymap[i] || !bus->phymap[i]->dev)
192 continue;
193
194 if (strcmp(bus->phymap[i]->dev->name, ethname) == 0)
195 return bus->phymap[i];
196 }
197 }
198
199 printf("%s is not a known ethernet\n", ethname);
200 return NULL;
201}
202
Mike Frysinger5700bb62010-07-27 18:35:08 -0400203const char *miiphy_get_current_dev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200204{
205 if (current_mii)
206 return current_mii->name;
207
208 return NULL;
209}
210
Mike Frysingerede16ea2010-07-27 18:35:10 -0400211static struct mii_dev *miiphy_get_active_dev(const char *devname)
212{
213 /* If the current mii is the one we want, return it */
214 if (current_mii)
215 if (strcmp(current_mii->name, devname) == 0)
216 return current_mii;
217
218 /* Otherwise, set the active one to the one we want */
219 if (miiphy_set_current_dev(devname))
220 return NULL;
221 else
222 return current_mii;
223}
224
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200225/*****************************************************************************
226 *
227 * Read to variable <value> from the PHY attached to device <devname>,
228 * use PHY address <addr> and register <reg>.
229 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500230 * This API is deprecated. Use phy_read on a phy_device found via phy_connect
231 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200232 * Returns:
233 * 0 on success
234 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100235int miiphy_read(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500236 unsigned short *value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200237{
Andy Fleming5f184712011-04-08 02:10:27 -0500238 struct mii_dev *bus;
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000239 int ret;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200240
Andy Fleming5f184712011-04-08 02:10:27 -0500241 bus = miiphy_get_active_dev(devname);
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000242 if (!bus)
Andy Fleming5f184712011-04-08 02:10:27 -0500243 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200244
Anatolij Gustschind67d5d52011-04-30 02:17:44 +0000245 ret = bus->read(bus, addr, MDIO_DEVAD_NONE, reg);
246 if (ret < 0)
247 return 1;
248
249 *value = (unsigned short)ret;
250 return 0;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200251}
252
253/*****************************************************************************
254 *
255 * Write <value> to the PHY attached to device <devname>,
256 * use PHY address <addr> and register <reg>.
257 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500258 * This API is deprecated. Use phy_write on a phy_device found by phy_connect
259 *
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200260 * Returns:
261 * 0 on success
262 */
Wolfgang Denkf915c932011-12-07 08:35:14 +0100263int miiphy_write(const char *devname, unsigned char addr, unsigned char reg,
Larry Johnson298035d2007-10-31 11:21:29 -0500264 unsigned short value)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200265{
Andy Fleming5f184712011-04-08 02:10:27 -0500266 struct mii_dev *bus;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200267
Andy Fleming5f184712011-04-08 02:10:27 -0500268 bus = miiphy_get_active_dev(devname);
269 if (bus)
270 return bus->write(bus, addr, MDIO_DEVAD_NONE, reg, value);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200271
Mike Frysinger0daac972010-07-27 18:35:09 -0400272 return 1;
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200273}
274
275/*****************************************************************************
276 *
277 * Print out list of registered MII capable devices.
278 */
Andy Fleming16a53232011-04-07 14:38:35 -0500279void miiphy_listdev(void)
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200280{
281 struct list_head *entry;
282 struct mii_dev *dev;
283
Andy Fleming16a53232011-04-07 14:38:35 -0500284 puts("MII devices: ");
285 list_for_each(entry, &mii_devs) {
286 dev = list_entry(entry, struct mii_dev, link);
287 printf("'%s' ", dev->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200288 }
Andy Fleming16a53232011-04-07 14:38:35 -0500289 puts("\n");
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200290
291 if (current_mii)
Andy Fleming16a53232011-04-07 14:38:35 -0500292 printf("Current device: '%s'\n", current_mii->name);
Marian Balakowicz63ff0042005-10-28 22:30:33 +0200293}
294
wdenkc6097192002-11-03 00:24:07 +0000295/*****************************************************************************
296 *
297 * Read the OUI, manufacture's model number, and revision number.
298 *
299 * OUI: 22 bits (unsigned int)
300 * Model: 6 bits (unsigned char)
301 * Revision: 4 bits (unsigned char)
302 *
Andy Fleming1cdabc42011-10-31 09:46:13 -0500303 * This API is deprecated.
304 *
wdenkc6097192002-11-03 00:24:07 +0000305 * Returns:
306 * 0 on success
307 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400308int miiphy_info(const char *devname, unsigned char addr, unsigned int *oui,
wdenkc6097192002-11-03 00:24:07 +0000309 unsigned char *model, unsigned char *rev)
310{
311 unsigned int reg = 0;
wdenk8bf3b002003-12-06 23:20:41 +0000312 unsigned short tmp;
wdenkc6097192002-11-03 00:24:07 +0000313
Andy Fleming16a53232011-04-07 14:38:35 -0500314 if (miiphy_read(devname, addr, MII_PHYSID2, &tmp) != 0) {
315 debug("PHY ID register 2 read failed\n");
316 return -1;
wdenkc6097192002-11-03 00:24:07 +0000317 }
wdenk8bf3b002003-12-06 23:20:41 +0000318 reg = tmp;
wdenkc6097192002-11-03 00:24:07 +0000319
Andy Fleming16a53232011-04-07 14:38:35 -0500320 debug("MII_PHYSID2 @ 0x%x = 0x%04x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900321
wdenkc6097192002-11-03 00:24:07 +0000322 if (reg == 0xFFFF) {
323 /* No physical device present at this address */
Andy Fleming16a53232011-04-07 14:38:35 -0500324 return -1;
wdenkc6097192002-11-03 00:24:07 +0000325 }
326
Andy Fleming16a53232011-04-07 14:38:35 -0500327 if (miiphy_read(devname, addr, MII_PHYSID1, &tmp) != 0) {
328 debug("PHY ID register 1 read failed\n");
329 return -1;
wdenkc6097192002-11-03 00:24:07 +0000330 }
wdenk8bf3b002003-12-06 23:20:41 +0000331 reg |= tmp << 16;
Andy Fleming16a53232011-04-07 14:38:35 -0500332 debug("PHY_PHYIDR[1,2] @ 0x%x = 0x%08x\n", addr, reg);
Shinya Kuribayashi26c7bab2008-01-19 10:25:59 +0900333
Larry Johnson298035d2007-10-31 11:21:29 -0500334 *oui = (reg >> 10);
335 *model = (unsigned char)((reg >> 4) & 0x0000003F);
336 *rev = (unsigned char)(reg & 0x0000000F);
Andy Fleming16a53232011-04-07 14:38:35 -0500337 return 0;
wdenkc6097192002-11-03 00:24:07 +0000338}
339
Andy Fleming5f184712011-04-08 02:10:27 -0500340#ifndef CONFIG_PHYLIB
wdenkc6097192002-11-03 00:24:07 +0000341/*****************************************************************************
342 *
343 * Reset the PHY.
Andy Fleming1cdabc42011-10-31 09:46:13 -0500344 *
345 * This API is deprecated. Use PHYLIB.
346 *
wdenkc6097192002-11-03 00:24:07 +0000347 * Returns:
348 * 0 on success
349 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400350int miiphy_reset(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000351{
352 unsigned short reg;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100353 int timeout = 500;
wdenkc6097192002-11-03 00:24:07 +0000354
Andy Fleming16a53232011-04-07 14:38:35 -0500355 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
356 debug("PHY status read failed\n");
357 return -1;
Wolfgang Denkf89920c2005-08-12 23:15:53 +0200358 }
Andy Fleming16a53232011-04-07 14:38:35 -0500359 if (miiphy_write(devname, addr, MII_BMCR, reg | BMCR_RESET) != 0) {
360 debug("PHY reset failed\n");
361 return -1;
wdenkc6097192002-11-03 00:24:07 +0000362 }
wdenk5653fc32004-02-08 22:55:38 +0000363#ifdef CONFIG_PHY_RESET_DELAY
Andy Fleming16a53232011-04-07 14:38:35 -0500364 udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */
wdenk5653fc32004-02-08 22:55:38 +0000365#endif
wdenkc6097192002-11-03 00:24:07 +0000366 /*
367 * Poll the control register for the reset bit to go to 0 (it is
368 * auto-clearing). This should happen within 0.5 seconds per the
369 * IEEE spec.
370 */
wdenkc6097192002-11-03 00:24:07 +0000371 reg = 0x8000;
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100372 while (((reg & 0x8000) != 0) && timeout--) {
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500373 if (miiphy_read(devname, addr, MII_BMCR, &reg) != 0) {
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100374 debug("PHY status read failed\n");
375 return -1;
wdenkc6097192002-11-03 00:24:07 +0000376 }
Stefan Roeseab5a0dc2010-02-02 13:43:48 +0100377 udelay(1000);
wdenkc6097192002-11-03 00:24:07 +0000378 }
379 if ((reg & 0x8000) == 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500380 return 0;
wdenkc6097192002-11-03 00:24:07 +0000381 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500382 puts("PHY reset timed out\n");
383 return -1;
wdenkc6097192002-11-03 00:24:07 +0000384 }
Andy Fleming16a53232011-04-07 14:38:35 -0500385 return 0;
wdenkc6097192002-11-03 00:24:07 +0000386}
Andy Fleming5f184712011-04-08 02:10:27 -0500387#endif /* !PHYLIB */
wdenkc6097192002-11-03 00:24:07 +0000388
wdenkc6097192002-11-03 00:24:07 +0000389/*****************************************************************************
390 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500391 * Determine the ethernet speed (10/100/1000). Return 10 on error.
wdenkc6097192002-11-03 00:24:07 +0000392 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400393int miiphy_speed(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000394{
Dongpo Li8c83c032016-08-22 21:03:29 +0800395 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000396
wdenk6fb6af62004-03-23 23:20:24 +0000397#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500398 u16 btsr;
399
400 /*
401 * Check for 1000BASE-X. If it is supported, then assume that the speed
402 * is 1000.
403 */
Andy Fleming16a53232011-04-07 14:38:35 -0500404 if (miiphy_is_1000base_x(devname, addr))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500405 return _1000BASET;
Andy Fleming16a53232011-04-07 14:38:35 -0500406
Larry Johnson71bc6e62007-11-01 08:46:50 -0500407 /*
408 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
409 */
410 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500411 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
412 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500413 goto miiphy_read_failed;
414 }
415 if (btsr != 0xFFFF &&
Andy Fleming16a53232011-04-07 14:38:35 -0500416 (btsr & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)))
Larry Johnson71bc6e62007-11-01 08:46:50 -0500417 return _1000BASET;
wdenk6fb6af62004-03-23 23:20:24 +0000418#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000419
wdenka56bd922004-06-06 23:13:55 +0000420 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500421 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
422 printf("PHY speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500423 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000424 }
wdenka56bd922004-06-06 23:13:55 +0000425 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500426 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000427 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500428 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
429 printf("PHY AN speed");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500430 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000431 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800432
433 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
434 puts("PHY AN adv speed");
435 goto miiphy_read_failed;
436 }
437 return ((anlpar & adv) & LPA_100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000438 }
439 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500440 return (bmcr & BMCR_SPEED100) ? _100BASET : _10BASET;
wdenka56bd922004-06-06 23:13:55 +0000441
Michael Zaidman5f841952010-02-28 16:28:25 +0200442miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500443 printf(" read failed, assuming 10BASE-T\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500444 return _10BASET;
wdenkc6097192002-11-03 00:24:07 +0000445}
446
wdenkc6097192002-11-03 00:24:07 +0000447/*****************************************************************************
448 *
Larry Johnson71bc6e62007-11-01 08:46:50 -0500449 * Determine full/half duplex. Return half on error.
wdenkc6097192002-11-03 00:24:07 +0000450 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400451int miiphy_duplex(const char *devname, unsigned char addr)
wdenkc6097192002-11-03 00:24:07 +0000452{
Dongpo Li8c83c032016-08-22 21:03:29 +0800453 u16 bmcr, anlpar, adv;
wdenkc6097192002-11-03 00:24:07 +0000454
wdenk6fb6af62004-03-23 23:20:24 +0000455#if defined(CONFIG_PHY_GIGE)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500456 u16 btsr;
457
458 /* Check for 1000BASE-X. */
Andy Fleming16a53232011-04-07 14:38:35 -0500459 if (miiphy_is_1000base_x(devname, addr)) {
Larry Johnson71bc6e62007-11-01 08:46:50 -0500460 /* 1000BASE-X */
Andy Fleming16a53232011-04-07 14:38:35 -0500461 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
462 printf("1000BASE-X PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500463 goto miiphy_read_failed;
464 }
465 }
466 /*
467 * No 1000BASE-X, so assume 1000BASE-T/100BASE-TX/10BASE-T register set.
468 */
469 /* Check for 1000BASE-T. */
Andy Fleming16a53232011-04-07 14:38:35 -0500470 if (miiphy_read(devname, addr, MII_STAT1000, &btsr)) {
471 printf("PHY 1000BT status");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500472 goto miiphy_read_failed;
473 }
474 if (btsr != 0xFFFF) {
475 if (btsr & PHY_1000BTSR_1000FD) {
476 return FULL;
477 } else if (btsr & PHY_1000BTSR_1000HD) {
478 return HALF;
wdenk855a4962004-03-14 18:23:55 +0000479 }
480 }
wdenk6fb6af62004-03-23 23:20:24 +0000481#endif /* CONFIG_PHY_GIGE */
wdenk855a4962004-03-14 18:23:55 +0000482
wdenka56bd922004-06-06 23:13:55 +0000483 /* Check Basic Management Control Register first. */
Andy Fleming16a53232011-04-07 14:38:35 -0500484 if (miiphy_read(devname, addr, MII_BMCR, &bmcr)) {
485 puts("PHY duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500486 goto miiphy_read_failed;
wdenkc6097192002-11-03 00:24:07 +0000487 }
wdenka56bd922004-06-06 23:13:55 +0000488 /* Check if auto-negotiation is on. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500489 if (bmcr & BMCR_ANENABLE) {
wdenka56bd922004-06-06 23:13:55 +0000490 /* Get auto-negotiation results. */
Andy Fleming16a53232011-04-07 14:38:35 -0500491 if (miiphy_read(devname, addr, MII_LPA, &anlpar)) {
492 puts("PHY AN duplex");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500493 goto miiphy_read_failed;
wdenka56bd922004-06-06 23:13:55 +0000494 }
Dongpo Li8c83c032016-08-22 21:03:29 +0800495
496 if (miiphy_read(devname, addr, MII_ADVERTISE, &adv)) {
497 puts("PHY AN adv duplex");
498 goto miiphy_read_failed;
499 }
500 return ((anlpar & adv) & (LPA_10FULL | LPA_100FULL)) ?
Larry Johnson71bc6e62007-11-01 08:46:50 -0500501 FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000502 }
503 /* Get speed from basic control settings. */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500504 return (bmcr & BMCR_FULLDPLX) ? FULL : HALF;
wdenka56bd922004-06-06 23:13:55 +0000505
Michael Zaidman5f841952010-02-28 16:28:25 +0200506miiphy_read_failed:
Andy Fleming16a53232011-04-07 14:38:35 -0500507 printf(" read failed, assuming half duplex\n");
Larry Johnson71bc6e62007-11-01 08:46:50 -0500508 return HALF;
509}
510
511/*****************************************************************************
512 *
513 * Return 1 if PHY supports 1000BASE-X, 0 if PHY supports 10BASE-T/100BASE-TX/
514 * 1000BASE-T, or on error.
515 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400516int miiphy_is_1000base_x(const char *devname, unsigned char addr)
Larry Johnson71bc6e62007-11-01 08:46:50 -0500517{
518#if defined(CONFIG_PHY_GIGE)
519 u16 exsr;
520
Andy Fleming16a53232011-04-07 14:38:35 -0500521 if (miiphy_read(devname, addr, MII_ESTATUS, &exsr)) {
522 printf("PHY extended status read failed, assuming no "
Larry Johnson71bc6e62007-11-01 08:46:50 -0500523 "1000BASE-X\n");
524 return 0;
525 }
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500526 return 0 != (exsr & (ESTATUS_1000XF | ESTATUS_1000XH));
Larry Johnson71bc6e62007-11-01 08:46:50 -0500527#else
528 return 0;
529#endif
wdenkc6097192002-11-03 00:24:07 +0000530}
531
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200532#ifdef CONFIG_SYS_FAULT_ECHO_LINK_DOWN
wdenkfc3e2162003-10-08 22:33:00 +0000533/*****************************************************************************
534 *
535 * Determine link status
536 */
Mike Frysinger5700bb62010-07-27 18:35:08 -0400537int miiphy_link(const char *devname, unsigned char addr)
wdenkfc3e2162003-10-08 22:33:00 +0000538{
539 unsigned short reg;
540
wdenka3d991b2004-04-15 21:48:45 +0000541 /* dummy read; needed to latch some phys */
Andy Fleming16a53232011-04-07 14:38:35 -0500542 (void)miiphy_read(devname, addr, MII_BMSR, &reg);
543 if (miiphy_read(devname, addr, MII_BMSR, &reg)) {
544 puts("MII_BMSR read failed, assuming no link\n");
545 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000546 }
547
548 /* Determine if a link is active */
Mike Frysinger8ef583a2010-12-23 15:40:12 -0500549 if ((reg & BMSR_LSTATUS) != 0) {
Andy Fleming16a53232011-04-07 14:38:35 -0500550 return 1;
wdenkfc3e2162003-10-08 22:33:00 +0000551 } else {
Andy Fleming16a53232011-04-07 14:38:35 -0500552 return 0;
wdenkfc3e2162003-10-08 22:33:00 +0000553 }
554}
555#endif