blob: e5fb474afce805435a57afbf8ff112dc7de99d5e [file] [log] [blame]
Mike Rapoport36b4e2d2010-12-18 17:43:19 -05001/*
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +00002 * (C) Copyright 2011 CompuLab, Ltd.
Mike Rapoport36b4e2d2010-12-18 17:43:19 -05003 * Mike Rapoport <mike@compulab.co.il>
Igor Grinbergdccd9a02011-04-18 17:48:31 -04004 * Igor Grinberg <grinberg@compulab.co.il>
Mike Rapoport36b4e2d2010-12-18 17:43:19 -05005 *
6 * Based on omap3_beagle.h
7 * (C) Copyright 2006-2008
8 * Texas Instruments.
9 * Richard Woodruff <r-woodruff2@ti.com>
10 * Syed Mohammed Khasim <x0khasim@ti.com>
11 *
Igor Grinbergb65a77a2011-04-18 17:55:21 -040012 * Configuration settings for the CompuLab CM-T35 and CM-T3730 boards
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050013 *
Wolfgang Denk1a459662013-07-08 09:37:19 +020014 * SPDX-License-Identifier: GPL-2.0+
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050015 */
16
17#ifndef __CONFIG_H
18#define __CONFIG_H
19
20/*
21 * High Level Configuration Options
22 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000023#define CONFIG_OMAP /* in a TI OMAP core */
Marek Vasut308252a2012-07-21 05:02:23 +000024#define CONFIG_OMAP_GPIO
Nikita Kiryanov5b28f202013-10-07 17:28:50 +030025#define CONFIG_CMD_GPIO
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000026#define CONFIG_CM_T3X /* working with CM-T35 and CM-T3730 */
Lokesh Vutla806d2792013-07-30 11:36:30 +053027#define CONFIG_OMAP_COMMON
Nikita Kiryanov623185d2014-12-31 15:00:56 +020028#define CONFIG_SYS_GENERIC_BOARD
Nishanth Menonc6f90e12015-03-09 17:12:08 -050029/* Common ARM Erratas */
30#define CONFIG_ARM_ERRATA_454179
31#define CONFIG_ARM_ERRATA_430973
32#define CONFIG_ARM_ERRATA_621766
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050033
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050034#define CONFIG_SDRC /* The chip has SDRC controller */
35
36#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050037#include <asm/arch/omap.h>
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050038
39/*
40 * Display CPU and Board information
41 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000042#define CONFIG_DISPLAY_CPUINFO
43#define CONFIG_DISPLAY_BOARDINFO
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050044
45/* Clock Defines */
46#define V_OSCK 26000000 /* Clock output from T2 */
47#define V_SCLK (V_OSCK >> 1)
48
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050049#define CONFIG_MISC_INIT_R
50
51#define CONFIG_OF_LIBFDT 1
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050052
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000053#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
54#define CONFIG_SETUP_MEMORY_TAGS
55#define CONFIG_INITRD_TAG
56#define CONFIG_REVISION_TAG
Nikita Kiryanov82309252012-01-12 03:26:30 +000057#define CONFIG_SERIAL_TAG
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050058
59/*
60 * Size of malloc() pool
61 */
Igor Grinberg390cdcd2012-05-24 04:01:21 +000062#define CONFIG_ENV_SIZE (16 << 10) /* 16 KiB */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000063 /* Sector */
64#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050065
66/*
67 * Hardware drivers
68 */
69
70/*
71 * NS16550 Configuration
72 */
73#define V_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
74
75#define CONFIG_SYS_NS16550
76#define CONFIG_SYS_NS16550_SERIAL
77#define CONFIG_SYS_NS16550_REG_SIZE (-4)
78#define CONFIG_SYS_NS16550_CLK V_NS16550_CLK
79
80/*
81 * select serial console configuration
82 */
83#define CONFIG_CONS_INDEX 3
84#define CONFIG_SYS_NS16550_COM3 OMAP34XX_UART3
85#define CONFIG_SERIAL3 3 /* UART3 */
86
87/* allow to overwrite serial and ethaddr */
88#define CONFIG_ENV_OVERWRITE
89#define CONFIG_BAUDRATE 115200
90#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
91 115200}
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000092
93#define CONFIG_GENERIC_MMC
94#define CONFIG_MMC
95#define CONFIG_OMAP_HSMMC
96#define CONFIG_DOS_PARTITION
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050097
Mike Rapoport36b4e2d2010-12-18 17:43:19 -050098/* USB */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +000099#define CONFIG_USB_OMAP3
Nikita Kiryanov854a7832012-12-02 13:59:19 +0200100#define CONFIG_USB_EHCI
101#define CONFIG_USB_EHCI_OMAP
Nikita Kiryanov854a7832012-12-02 13:59:19 +0200102#define CONFIG_USB_STORAGE
Paul Kocialkowski95de1e22015-08-04 17:04:06 +0200103#define CONFIG_USB_MUSB_UDC
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000104#define CONFIG_TWL4030_USB
Nikita Kiryanov854a7832012-12-02 13:59:19 +0200105#define CONFIG_CMD_USB
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500106
107/* USB device configuration */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000108#define CONFIG_USB_DEVICE
109#define CONFIG_USB_TTY
110#define CONFIG_SYS_CONSOLE_IS_IN_ENV
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500111
112/* commands to include */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500113#define CONFIG_CMD_CACHE
114#define CONFIG_CMD_EXT2 /* EXT2 Support */
115#define CONFIG_CMD_FAT /* FAT support */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500116#define CONFIG_CMD_MTDPARTS /* Enable MTD parts commands */
117#define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
Igor Grinberg0b800a62013-04-22 01:06:55 +0000118#define CONFIG_MTD_PARTITIONS
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000119#define MTDIDS_DEFAULT "nand0=nand"
120#define MTDPARTS_DEFAULT "mtdparts=nand:512k(x-loader),"\
Igor Grinberg0b800a62013-04-22 01:06:55 +0000121 "1920k(u-boot),256k(u-boot-env),"\
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000122 "4m(kernel),-(fs)"
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500123
124#define CONFIG_CMD_I2C /* I2C serial bus support */
125#define CONFIG_CMD_MMC /* MMC support */
126#define CONFIG_CMD_NAND /* NAND support */
127#define CONFIG_CMD_DHCP
128#define CONFIG_CMD_PING
129
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500130
131#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200132#define CONFIG_SYS_I2C
133#define CONFIG_SYS_OMAP24_I2C_SPEED 100000
134#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
135#define CONFIG_SYS_I2C_OMAP34XX
Nikita Kiryanov82309252012-01-12 03:26:30 +0000136#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
137#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
Nikita Kiryanov52658fd2014-08-20 15:08:52 +0300138#define CONFIG_SYS_I2C_EEPROM_BUS 0
Nikita Kiryanov79874ae2012-04-02 02:29:31 +0000139#define CONFIG_I2C_MULTI_BUS
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500140
141/*
142 * TWL4030
143 */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000144#define CONFIG_TWL4030_POWER
145#define CONFIG_TWL4030_LED
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500146
147/*
148 * Board NAND Info.
149 */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500150#define CONFIG_NAND_OMAP_GPMC
151#define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */
152 /* to access nand */
153#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
154 /* to access nand at */
155 /* CS0 */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500156#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
157 /* devices */
Stefan Roese7bb6e292014-03-11 17:04:45 +0100158
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500159/* Environment information */
Nikita Kiryanova431be42013-10-07 17:28:49 +0300160#define CONFIG_BOOTDELAY 3
Nikita Kiryanov9bd5c1a2012-12-04 23:28:26 +0000161#define CONFIG_ZERO_BOOTDELAY_CHECK
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500162
163#define CONFIG_EXTRA_ENV_SETTINGS \
164 "loadaddr=0x82000000\0" \
165 "usbtty=cdc_acm\0" \
Nikita Kiryanovf3ef3602013-12-11 18:04:40 +0200166 "console=ttyO2,115200n8\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500167 "mpurate=500\0" \
168 "vram=12M\0" \
169 "dvimode=1024x768MR-16@60\0" \
170 "defaultdisplay=dvi\0" \
171 "mmcdev=0\0" \
172 "mmcroot=/dev/mmcblk0p2 rw\0" \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000173 "mmcrootfstype=ext4 rootwait\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500174 "nandroot=/dev/mtdblock4 rw\0" \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000175 "nandrootfstype=ubifs\0" \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500176 "mmcargs=setenv bootargs console=${console} " \
177 "mpurate=${mpurate} " \
178 "vram=${vram} " \
179 "omapfb.mode=dvi:${dvimode} " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500180 "omapdss.def_disp=${defaultdisplay} " \
181 "root=${mmcroot} " \
182 "rootfstype=${mmcrootfstype}\0" \
183 "nandargs=setenv bootargs console=${console} " \
184 "mpurate=${mpurate} " \
185 "vram=${vram} " \
186 "omapfb.mode=dvi:${dvimode} " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500187 "omapdss.def_disp=${defaultdisplay} " \
188 "root=${nandroot} " \
189 "rootfstype=${nandrootfstype}\0" \
190 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
191 "bootscript=echo Running bootscript from mmc ...; " \
192 "source ${loadaddr}\0" \
193 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
194 "mmcboot=echo Booting from mmc ...; " \
195 "run mmcargs; " \
196 "bootm ${loadaddr}\0" \
197 "nandboot=echo Booting from nand ...; " \
198 "run nandargs; " \
Igor Grinberg0b800a62013-04-22 01:06:55 +0000199 "nand read ${loadaddr} 2a0000 400000; " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500200 "bootm ${loadaddr}\0" \
201
Nikita Kiryanovf3ef3602013-12-11 18:04:40 +0200202#define CONFIG_CMD_BOOTZ
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500203#define CONFIG_BOOTCOMMAND \
Andrew Bradford66968112012-10-01 05:06:52 +0000204 "mmc dev ${mmcdev}; if mmc rescan; then " \
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500205 "if run loadbootscript; then " \
206 "run bootscript; " \
207 "else " \
208 "if run loaduimage; then " \
209 "run mmcboot; " \
210 "else run nandboot; " \
211 "fi; " \
212 "fi; " \
213 "else run nandboot; fi"
214
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500215/*
216 * Miscellaneous configurable options
217 */
Igor Grinberg41d7e702011-04-18 17:48:28 -0400218#define CONFIG_AUTO_COMPLETE
219#define CONFIG_CMDLINE_EDITING
220#define CONFIG_TIMESTAMP
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000221#define CONFIG_SYS_AUTOLOAD "no"
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500222#define CONFIG_SYS_LONGHELP /* undef to save memory */
223#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500224#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
225/* Print Buffer Size */
226#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
227 sizeof(CONFIG_SYS_PROMPT) + 16)
228#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
229/* Boot Argument Buffer Size */
230#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
231
232#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0) /* memtest */
233 /* works on */
234#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
235 0x01F00000) /* 31MB */
236
237#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default */
238 /* load address */
239
240/*
241 * OMAP3 has 12 GP timers, they can be driven by the system clock
242 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
243 * This rate is divided by a local divisor.
244 */
245#define CONFIG_SYS_TIMERBASE (OMAP34XX_GPT2)
246#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500247
248/*-----------------------------------------------------------------------
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500249 * Physical Memory Map
250 */
251#define CONFIG_NR_DRAM_BANKS 1 /* CS1 is never populated */
252#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500253
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500254/*-----------------------------------------------------------------------
255 * FLASH and environment organization
256 */
257
258/* **** PISMO SUPPORT *** */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500259/* Monitor at start of flash */
260#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Igor Grinberg3530a352012-10-07 01:17:34 +0000261#define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500262
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000263#define CONFIG_ENV_IS_IN_NAND
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500264#define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */
Luca Ceresoli6cbec7b2011-04-20 11:02:05 -0400265#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500266#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
267
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500268#if defined(CONFIG_CMD_NET)
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500269#define CONFIG_SMC911X
270#define CONFIG_SMC911X_32_BIT
Igor Grinbergb65a77a2011-04-18 17:55:21 -0400271#define CM_T3X_SMC911X_BASE 0x2C000000
272#define SB_T35_SMC911X_BASE (CM_T3X_SMC911X_BASE + (16 << 20))
273#define CONFIG_SMC911X_BASE CM_T3X_SMC911X_BASE
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500274#endif /* (CONFIG_CMD_NET) */
275
276/* additions for new relocation code, must be added to all boards */
277#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
278#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
279#define CONFIG_SYS_INIT_RAM_SIZE 0x800
280#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
281 CONFIG_SYS_INIT_RAM_SIZE - \
282 GENERATED_GBL_DATA_SIZE)
283
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400284/* Status LED */
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000285#define CONFIG_STATUS_LED /* Status LED enabled */
286#define CONFIG_BOARD_SPECIFIC_LED
Igor Grinbergebc18af2013-11-06 16:39:47 +0200287#define CONFIG_GPIO_LED
288#define GREEN_LED_GPIO 186 /* CM-T35 Green LED is GPIO186 */
289#define GREEN_LED_DEV 0
290#define STATUS_LED_BIT GREEN_LED_GPIO
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400291#define STATUS_LED_STATE STATUS_LED_ON
292#define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2)
Igor Grinbergebc18af2013-11-06 16:39:47 +0200293#define STATUS_LED_BOOT GREEN_LED_DEV
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400294
Nikita Kiryanov60e6bdc2013-02-24 06:19:23 +0000295#define CONFIG_SPLASHIMAGE_GUARD
296
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400297/* GPIO banks */
298#ifdef CONFIG_STATUS_LED
Nikita Kiryanov9fc376b2012-01-02 04:01:30 +0000299#define CONFIG_OMAP3_GPIO_6 /* GPIO186 is in GPIO bank 6 */
Igor Grinberg2b8754b2011-04-18 17:54:33 -0400300#endif
301
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000302/* Display Configuration */
303#define CONFIG_OMAP3_GPIO_2
Nikita Kiryanov6f728922013-12-31 12:55:15 +0200304#define CONFIG_OMAP3_GPIO_5
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000305#define CONFIG_VIDEO_OMAP3
306#define LCD_BPP LCD_COLOR16
307
308#define CONFIG_LCD
Nikita Kiryanovf35034f2012-12-22 21:03:48 +0000309#define CONFIG_SPLASH_SCREEN
Nikita Kiryanovf82eb2f2015-01-14 10:42:54 +0200310#define CONFIG_SPLASH_SOURCE
Nikita Kiryanovf35034f2012-12-22 21:03:48 +0000311#define CONFIG_CMD_BMP
312#define CONFIG_BMP_16BPP
Nikita Kiryanov63c4f172013-10-16 17:23:29 +0300313#define CONFIG_SCF0403_LCD
314
315#define CONFIG_OMAP3_SPI
Nikita Kiryanov7878ca52013-01-30 21:39:58 +0000316
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100317/* Defines for SPL */
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100318#define CONFIG_SPL_FRAMEWORK
319#define CONFIG_SPL_NAND_SIMPLE
320
321#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
322#define CONFIG_SYS_U_BOOT_MAX_SIZE_SECTORS 0x200 /* 256 KB */
Paul Kocialkowskie2ccdf82014-11-08 23:14:55 +0100323#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
Guillaume GARDET205b4f32014-10-15 17:53:11 +0200324#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100325
326#define CONFIG_SPL_BOARD_INIT
327#define CONFIG_SPL_LIBCOMMON_SUPPORT
328#define CONFIG_SPL_LIBDISK_SUPPORT
329#define CONFIG_SPL_I2C_SUPPORT
330#define CONFIG_SPL_LIBGENERIC_SUPPORT
331#define CONFIG_SPL_MMC_SUPPORT
332#define CONFIG_SPL_FAT_SUPPORT
333#define CONFIG_SPL_SERIAL_SUPPORT
334#define CONFIG_SPL_NAND_SUPPORT
335#define CONFIG_SPL_NAND_BASE
336#define CONFIG_SPL_NAND_DRIVERS
337#define CONFIG_SPL_NAND_ECC
338#define CONFIG_SPL_GPIO_SUPPORT
339#define CONFIG_SPL_POWER_SUPPORT
340#define CONFIG_SPL_OMAP3_ID_NAND
341#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
342
343/* NAND boot config */
344#define CONFIG_SYS_NAND_5_ADDR_CYCLE
345#define CONFIG_SYS_NAND_PAGE_COUNT 64
346#define CONFIG_SYS_NAND_PAGE_SIZE 2048
347#define CONFIG_SYS_NAND_OOBSIZE 64
348#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
349#define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS
350/*
351 * Use the ECC/OOB layout from omap_gpmc.h that matches your chip:
352 * SP vs LP, 8bit vs 16bit: GPMC_NAND_HW_ECC_LAYOUT
353 */
354#define CONFIG_SYS_NAND_ECCPOS { 1, 2, 3, 4, 5, 6, 7, 8, 9, \
355 10, 11, 12 }
356#define CONFIG_SYS_NAND_ECCSIZE 512
357#define CONFIG_SYS_NAND_ECCBYTES 3
358#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW
359
360#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
361#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
362
363#define CONFIG_SPL_TEXT_BASE 0x40200800
364#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Stefan Roese3e51b7c2013-12-04 13:54:18 +0100365
366/*
367 * Use 0x80008000 as TEXT_BASE here for compatibility reasons with the
368 * older x-loader implementations. And move the BSS area so that it
369 * doesn't overlap with TEXT_BASE.
370 */
371#define CONFIG_SYS_TEXT_BASE 0x80008000
372#define CONFIG_SPL_BSS_START_ADDR 0x80100000
373#define CONFIG_SPL_BSS_MAX_SIZE 0x80000 /* 512 KB */
374
375#define CONFIG_SYS_SPL_MALLOC_START 0x80208000
376#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000
377
Mike Rapoport36b4e2d2010-12-18 17:43:19 -0500378#endif /* __CONFIG_H */