Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (C) 2013 Gabor Juhos <juhosg@openwrt.org> |
| 3 | * |
Tom Rini | 0b17998 | 2013-07-24 09:34:30 -0400 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0 |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 7 | #ifndef _MALTA_CONFIG_H |
| 8 | #define _MALTA_CONFIG_H |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 9 | |
| 10 | #include <asm/addrspace.h> |
| 11 | #include <asm/malta.h> |
| 12 | |
| 13 | /* |
| 14 | * System configuration |
| 15 | */ |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 16 | #define CONFIG_MALTA |
Paul Burton | 5f978d7 | 2014-04-07 10:11:23 +0100 | [diff] [blame] | 17 | #define CONFIG_BOARD_EARLY_INIT_F |
| 18 | #define CONFIG_DISPLAY_BOARDINFO |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 19 | |
Gabor Juhos | ab41305 | 2013-10-24 14:32:00 +0200 | [diff] [blame] | 20 | #define CONFIG_MEMSIZE_IN_BYTES |
| 21 | |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 22 | #define CONFIG_PCI |
| 23 | #define CONFIG_PCI_GT64120 |
Paul Burton | baf37f0 | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 24 | #define CONFIG_PCI_MSC01 |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 25 | #define CONFIG_PCI_PNP |
Gabor Juhos | f195749 | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 26 | #define CONFIG_PCNET |
Paul Burton | e0878af | 2013-11-08 11:18:52 +0000 | [diff] [blame] | 27 | #define CONFIG_PCNET_79C973 |
| 28 | #define PCNET_HAS_PROM |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 29 | |
Paul Burton | 3ced12a | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 30 | #define CONFIG_MISC_INIT_R |
| 31 | #define CONFIG_RTC_MC146818 |
| 32 | #define CONFIG_SYS_ISA_IO_BASE_ADDRESS 0 |
| 33 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 34 | /* |
| 35 | * CPU Configuration |
| 36 | */ |
| 37 | #define CONFIG_SYS_MHZ 250 /* arbitrary value */ |
| 38 | #define CONFIG_SYS_MIPS_TIMER_FREQ (CONFIG_SYS_MHZ * 1000000) |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 39 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 40 | /* |
| 41 | * Memory map |
| 42 | */ |
Gabor Juhos | 10473d0 | 2013-11-12 16:47:32 +0100 | [diff] [blame] | 43 | #define CONFIG_SYS_TEXT_BASE 0xbe000000 /* Rom version */ |
| 44 | #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 45 | |
| 46 | #define CONFIG_SYS_SDRAM_BASE 0x80000000 /* Cached addr */ |
| 47 | #define CONFIG_SYS_MEM_SIZE (256 * 1024 * 1024) |
| 48 | |
| 49 | #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 |
| 50 | |
| 51 | #define CONFIG_SYS_LOAD_ADDR 0x81000000 |
| 52 | #define CONFIG_SYS_MEMTEST_START 0x80100000 |
| 53 | #define CONFIG_SYS_MEMTEST_END 0x80800000 |
| 54 | |
| 55 | #define CONFIG_SYS_MALLOC_LEN (128 * 1024) |
| 56 | #define CONFIG_SYS_BOOTPARAMS_LEN (128 * 1024) |
Paul Burton | 67d4752 | 2013-11-26 17:45:28 +0000 | [diff] [blame] | 57 | #define CONFIG_SYS_BOOTM_LEN (64 * 1024 * 1024) |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 58 | |
| 59 | /* |
| 60 | * Console configuration |
| 61 | */ |
Nikita Kiryanov | 181bd9d | 2015-08-03 12:36:58 +0300 | [diff] [blame] | 62 | #undef CONFIG_SYS_PROMPT |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 63 | #if defined(CONFIG_SYS_LITTLE_ENDIAN) |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 64 | #define CONFIG_SYS_PROMPT "maltael # " |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 65 | #else |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 66 | #define CONFIG_SYS_PROMPT "malta # " |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 67 | #endif |
| 68 | |
| 69 | #define CONFIG_SYS_CBSIZE 256 |
| 70 | #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ |
| 71 | sizeof(CONFIG_SYS_PROMPT) + 16) |
| 72 | #define CONFIG_SYS_MAXARGS 16 |
| 73 | |
Paul Burton | a3bdaac | 2015-01-29 10:38:22 +0000 | [diff] [blame] | 74 | #define CONFIG_SYS_HUSH_PARSER |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 75 | #define CONFIG_AUTO_COMPLETE |
| 76 | #define CONFIG_CMDLINE_EDITING |
| 77 | |
| 78 | /* |
| 79 | * Serial driver |
| 80 | */ |
| 81 | #define CONFIG_BAUDRATE 115200 |
| 82 | |
| 83 | #define CONFIG_SYS_NS16550 |
| 84 | #define CONFIG_SYS_NS16550_SERIAL |
| 85 | #define CONFIG_SYS_NS16550_REG_SIZE 1 |
Paul Burton | 72117da | 2013-11-26 17:45:26 +0000 | [diff] [blame] | 86 | #define CONFIG_SYS_NS16550_CLK (115200 * 16) |
Paul Burton | baf37f0 | 2013-11-08 11:18:50 +0000 | [diff] [blame] | 87 | #define CONFIG_SYS_NS16550_COM1 CKSEG1ADDR(MALTA_GT_UART0_BASE) |
| 88 | #define CONFIG_SYS_NS16550_COM2 CKSEG1ADDR(MALTA_MSC01_UART0_BASE) |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 89 | #define CONFIG_CONS_INDEX 1 |
| 90 | |
| 91 | /* |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 92 | * Flash configuration |
| 93 | */ |
Gabor Juhos | 52caee0 | 2013-05-22 03:57:39 +0000 | [diff] [blame] | 94 | #define CONFIG_SYS_FLASH_BASE (KSEG1 | MALTA_FLASH_BASE) |
| 95 | #define CONFIG_SYS_MAX_FLASH_BANKS 1 |
| 96 | #define CONFIG_SYS_MAX_FLASH_SECT 128 |
| 97 | #define CONFIG_SYS_FLASH_CFI |
| 98 | #define CONFIG_FLASH_CFI_DRIVER |
| 99 | #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 100 | |
| 101 | /* |
Paul Burton | fba6f45 | 2013-11-08 11:18:56 +0000 | [diff] [blame] | 102 | * Environment |
| 103 | */ |
| 104 | #define CONFIG_ENV_IS_IN_FLASH |
| 105 | #define CONFIG_ENV_SECT_SIZE 0x20000 |
| 106 | #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE |
| 107 | #define CONFIG_ENV_ADDR \ |
| 108 | (CONFIG_SYS_FLASH_BASE + (4 << 20) - CONFIG_ENV_SIZE) |
| 109 | |
| 110 | /* |
Paul Burton | ba21a45 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 111 | * IDE/ATA |
| 112 | */ |
| 113 | #define CONFIG_SYS_IDE_MAXBUS 1 |
| 114 | #define CONFIG_SYS_IDE_MAXDEVICE 2 |
| 115 | #define CONFIG_SYS_ATA_BASE_ADDR CONFIG_SYS_ISA_IO_BASE_ADDRESS |
| 116 | #define CONFIG_SYS_ATA_IDE0_OFFSET 0x01f0 |
| 117 | #define CONFIG_SYS_ATA_DATA_OFFSET 0 |
| 118 | #define CONFIG_SYS_ATA_REG_OFFSET 0 |
| 119 | |
| 120 | /* |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 121 | * Commands |
| 122 | */ |
Paul Burton | 3ced12a | 2013-11-08 11:18:55 +0000 | [diff] [blame] | 123 | #define CONFIG_CMD_DATE |
Paul Burton | e0878af | 2013-11-08 11:18:52 +0000 | [diff] [blame] | 124 | #define CONFIG_CMD_DHCP |
Paul Burton | ba21a45 | 2015-01-29 10:38:20 +0000 | [diff] [blame] | 125 | #define CONFIG_CMD_IDE |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 126 | #define CONFIG_CMD_PCI |
Gabor Juhos | f195749 | 2013-05-22 03:57:44 +0000 | [diff] [blame] | 127 | #define CONFIG_CMD_PING |
Gabor Juhos | feaa606 | 2013-05-22 03:57:42 +0000 | [diff] [blame] | 128 | |
Gabor Juhos | 5a4dcfa | 2013-05-22 03:57:37 +0000 | [diff] [blame] | 129 | #define CONFIG_SYS_LONGHELP /* verbose help, undef to save memory */ |
| 130 | |
Paul Burton | 7a9d109 | 2013-11-09 10:22:08 +0000 | [diff] [blame] | 131 | #endif /* _MALTA_CONFIG_H */ |