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Marek Vasutd5914012011-01-19 04:40:37 +00001/*
2 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
3 *
4 * (C) Copyright 2009 Freescale Semiconductor, Inc.
5 *
6 * Configuration settings for the MX51EVK Board
7 *
Wolfgang Denk3765b3e2013-10-07 13:07:26 +02008 * SPDX-License-Identifier: GPL-2.0+
Marek Vasutd5914012011-01-19 04:40:37 +00009 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <config_cmd_default.h>
15
16/*
17 * High Level Board Configuration Options
18 */
19/* An i.MX51 CPU */
20#define CONFIG_MX51
Marek Vasutaf708cb2011-09-25 09:55:43 +000021
22#define machine_is_efikamx() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKAMX)
23#define machine_is_efikasb() (CONFIG_MACH_TYPE == MACH_TYPE_MX51_EFIKASB)
24
Marek Vasutd5914012011-01-19 04:40:37 +000025#include <asm/arch/imx-regs.h>
26
Marek Vasutd5914012011-01-19 04:40:37 +000027#define CONFIG_DISPLAY_CPUINFO
28#define CONFIG_DISPLAY_BOARDINFO
29
Jana Rapava745525f2011-07-11 14:16:44 +000030#define CONFIG_SYS_TEXT_BASE 0x97800000
31
Marek Vasutd98d8bc2011-06-24 21:46:07 +020032#define CONFIG_SYS_ICACHE_OFF
33#define CONFIG_SYS_DCACHE_OFF
34
Marek Vasutd5914012011-01-19 04:40:37 +000035/*
36 * Bootloader Components Configuration
37 */
38#define CONFIG_CMD_SPI
39#define CONFIG_CMD_SF
40#define CONFIG_CMD_MMC
41#define CONFIG_CMD_FAT
Marek Vasut4e0499e2011-07-11 14:16:45 +000042#define CONFIG_CMD_EXT2
Marek Vasutd5914012011-01-19 04:40:37 +000043#define CONFIG_CMD_IDE
Marek Vasutd98d8bc2011-06-24 21:46:07 +020044#define CONFIG_CMD_NET
45#define CONFIG_CMD_DATE
Marek Vasutd5914012011-01-19 04:40:37 +000046#undef CONFIG_CMD_IMLS
47
48/*
49 * Environmental settings
50 */
51
52#define CONFIG_ENV_OFFSET (6 * 64 * 1024)
53#define CONFIG_ENV_SECT_SIZE (1 * 64 * 1024)
54#define CONFIG_ENV_SIZE (4 * 1024)
55
56/*
57 * ATAG setup
58 */
59#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
60#define CONFIG_REVISION_TAG
61#define CONFIG_SETUP_MEMORY_TAGS
62#define CONFIG_INITRD_TAG
63
Grant Likely2fa8ca92011-03-28 09:59:07 +000064#define CONFIG_OF_LIBFDT 1
65
Marek Vasutd5914012011-01-19 04:40:37 +000066/*
67 * Size of malloc() pool
68 */
69#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
70
71#define CONFIG_BOARD_EARLY_INIT_F
Helmut Raiger9660e442011-10-20 04:19:47 +000072#define CONFIG_BOARD_LATE_INIT
Marek Vasutd5914012011-01-19 04:40:37 +000073
74/*
75 * Hardware drivers
76 */
77#define CONFIG_MXC_UART
Stefano Babic40f6fff2011-11-22 15:22:39 +010078#define CONFIG_MXC_UART_BASE UART1_BASE
Marek Vasutd5914012011-01-19 04:40:37 +000079#define CONFIG_CONS_INDEX 1
80#define CONFIG_BAUDRATE 115200
Marek Vasutd5914012011-01-19 04:40:37 +000081
82#define CONFIG_MXC_GPIO
83
84/*
85 * SPI Interface
86 */
87#ifdef CONFIG_CMD_SPI
88
89#define CONFIG_HARD_SPI
90#define CONFIG_MXC_SPI
91#define CONFIG_DEFAULT_SPI_BUS 1
92#define CONFIG_DEFAULT_SPI_MODE (SPI_MODE_0 | SPI_CS_HIGH)
93
94/* SPI FLASH */
95#ifdef CONFIG_CMD_SF
96
97#define CONFIG_SPI_FLASH
98#define CONFIG_SPI_FLASH_SST
Fabio Estevam94f00032012-03-22 14:29:04 +000099#define CONFIG_SF_DEFAULT_CS (1 | 121 << 8)
Marek Vasutd5914012011-01-19 04:40:37 +0000100#define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0)
101#define CONFIG_SF_DEFAULT_SPEED 25000000
102
103#define CONFIG_ENV_SPI_CS (1 | 121 << 8)
104#define CONFIG_ENV_SPI_BUS 0
105#define CONFIG_ENV_SPI_MAX_HZ 25000000
106#define CONFIG_ENV_SPI_MODE (SPI_MODE_0)
107#define CONFIG_FSL_ENV_IN_SF
108#define CONFIG_ENV_IS_IN_SPI_FLASH
109#define CONFIG_SYS_NO_FLASH
110
111#else
112#define CONFIG_ENV_IS_NOWHERE
113#endif
114
115/* SPI PMIC */
Łukasz Majewskibe3b51a2012-11-13 03:22:14 +0000116#define CONFIG_POWER
117#define CONFIG_POWER_SPI
118#define CONFIG_POWER_FSL
Marek Vasutd5914012011-01-19 04:40:37 +0000119#define CONFIG_FSL_PMIC_BUS 0
120#define CONFIG_FSL_PMIC_CS (0 | 120 << 8)
121#define CONFIG_FSL_PMIC_CLK 25000000
122#define CONFIG_FSL_PMIC_MODE (SPI_MODE_0 | SPI_CS_HIGH)
Stefano Babic9c38f7d2011-10-06 11:44:26 +0200123#define CONFIG_FSL_PMIC_BITLEN 32
Fabio Estevam4e8b7542011-10-24 06:44:15 +0000124#define CONFIG_RTC_MC13XXX
Marek Vasutd5914012011-01-19 04:40:37 +0000125#endif
126
127/*
128 * MMC Configs
129 */
130#ifdef CONFIG_CMD_MMC
131#define CONFIG_MMC
132#define CONFIG_GENERIC_MMC
133#define CONFIG_FSL_ESDHC
134#define CONFIG_SYS_FSL_ESDHC_ADDR 0
135#define CONFIG_SYS_FSL_ESDHC_NUM 2
136#endif
137
138/*
139 * ATA/IDE
140 */
141#ifdef CONFIG_CMD_IDE
142#define CONFIG_LBA48
143#undef CONFIG_IDE_LED
144#undef CONFIG_IDE_RESET
145
146#define CONFIG_MX51_PATA
147
148#define __io
149
150#define CONFIG_SYS_IDE_MAXBUS 1
151#define CONFIG_SYS_IDE_MAXDEVICE 1
152
153#define CONFIG_SYS_ATA_BASE_ADDR 0x83fe0000
154#define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
155
156#define CONFIG_SYS_ATA_DATA_OFFSET 0xa0
157#define CONFIG_SYS_ATA_REG_OFFSET 0xa0
158#define CONFIG_SYS_ATA_ALT_OFFSET 0xd8
159
160#define CONFIG_SYS_ATA_STRIDE 4
161
162#define CONFIG_IDE_PREINIT
163#define CONFIG_MXC_ATA_PIO_MODE 4
164#endif
165
166/*
Marek Vasutd98d8bc2011-06-24 21:46:07 +0200167 * USB
168 */
169#define CONFIG_CMD_USB
170#ifdef CONFIG_CMD_USB
171#define CONFIG_USB_EHCI /* Enable EHCI USB support */
172#define CONFIG_USB_EHCI_MX5
173#define CONFIG_USB_ULPI
174#define CONFIG_USB_ULPI_VIEWPORT
175#define CONFIG_MXC_USB_PORT 1
176#if (CONFIG_MXC_USB_PORT == 0)
177#define CONFIG_MXC_USB_PORTSC (1 << 28)
178#define CONFIG_MXC_USB_FLAGS MXC_EHCI_INTERNAL_PHY
179#else
180#define CONFIG_MXC_USB_PORTSC (2 << 30)
181#define CONFIG_MXC_USB_FLAGS 0
182#endif
183#define CONFIG_EHCI_IS_TDI
184#define CONFIG_USB_STORAGE
185#define CONFIG_USB_HOST_ETHER
186#define CONFIG_USB_KEYBOARD
187#define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
188#define CONFIG_PREBOOT
189/* USB NET */
190#ifdef CONFIG_CMD_NET
191#define CONFIG_USB_ETHER_ASIX
Marek Vasutd98d8bc2011-06-24 21:46:07 +0200192#define CONFIG_CMD_PING
193#define CONFIG_CMD_DHCP
194#endif
195#endif /* CONFIG_CMD_USB */
196
197/*
Marek Vasutd5914012011-01-19 04:40:37 +0000198 * Filesystems
199 */
200#ifdef CONFIG_CMD_FAT
201#define CONFIG_DOS_PARTITION
Marek Vasutd98d8bc2011-06-24 21:46:07 +0200202#ifdef CONFIG_CMD_NET
203#define CONFIG_CMD_NFS
Marek Vasutd5914012011-01-19 04:40:37 +0000204#endif
Marek Vasutd98d8bc2011-06-24 21:46:07 +0200205#endif
Marek Vasutd5914012011-01-19 04:40:37 +0000206
207/*
208 * Miscellaneous configurable options
209 */
210#define CONFIG_ENV_OVERWRITE
211#define CONFIG_BOOTDELAY 3
212#define CONFIG_LOADADDR 0x90800000
213
214#define CONFIG_SYS_LONGHELP /* undef to save memory */
215#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Marek Vasutd5914012011-01-19 04:40:37 +0000216#define CONFIG_SYS_PROMPT "Efika> "
217#define CONFIG_AUTO_COMPLETE
218#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
219/* Print Buffer Size */
220#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
221#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
222#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
223
224#define CONFIG_SYS_MEMTEST_START 0x90000000
Fabio Estevamf361a5c2012-02-09 14:25:11 +0000225#define CONFIG_SYS_MEMTEST_END 0x90010000
Marek Vasutd5914012011-01-19 04:40:37 +0000226
227#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
228
Marek Vasutd5914012011-01-19 04:40:37 +0000229#define CONFIG_CMDLINE_EDITING
230
231/*-----------------------------------------------------------------------
Marek Vasutd5914012011-01-19 04:40:37 +0000232 * Physical Memory Map
233 */
234#define CONFIG_NR_DRAM_BANKS 1
235#define PHYS_SDRAM_1 CSD0_BASE_ADDR
236#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
237
238#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
239#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
240#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
241
242#define CONFIG_SYS_INIT_SP_OFFSET \
243 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
244#define CONFIG_SYS_INIT_SP_ADDR \
245 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
246
247#define CONFIG_SYS_DDR_CLKSEL 0
Marek Vasutb7171d92011-09-14 18:16:57 +0000248#define CONFIG_SYS_CLKTL_CBCDR 0x59E35145
Benoît Thébaudeau39e85762012-11-05 10:07:04 +0000249#define CONFIG_SYS_MAIN_PWR_ON
Marek Vasutd5914012011-01-19 04:40:37 +0000250
251#endif