Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 1 | /* |
| 2 | * Generic PHY Management code |
| 3 | * |
Wolfgang Denk | 1a45966 | 2013-07-08 09:37:19 +0200 | [diff] [blame] | 4 | * SPDX-License-Identifier: GPL-2.0+ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 5 | * |
| 6 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 7 | * author Andy Fleming |
| 8 | * |
| 9 | * Based loosely off of Linux's PHY Lib |
| 10 | */ |
| 11 | |
| 12 | #include <config.h> |
| 13 | #include <common.h> |
Simon Glass | 24b852a | 2015-11-08 23:47:45 -0700 | [diff] [blame] | 14 | #include <console.h> |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 15 | #include <dm.h> |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 16 | #include <malloc.h> |
| 17 | #include <net.h> |
| 18 | #include <command.h> |
| 19 | #include <miiphy.h> |
| 20 | #include <phy.h> |
| 21 | #include <errno.h> |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 22 | #include <linux/err.h> |
Shengzhou Liu | 597fe04 | 2014-04-11 16:14:17 +0800 | [diff] [blame] | 23 | #include <linux/compiler.h> |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 24 | |
Michal Simek | abbfcbe | 2015-05-13 13:40:40 +0200 | [diff] [blame] | 25 | DECLARE_GLOBAL_DATA_PTR; |
| 26 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 27 | /* Generic PHY support and helper functions */ |
| 28 | |
| 29 | /** |
| 30 | * genphy_config_advert - sanitize and advertise auto-negotation parameters |
| 31 | * @phydev: target phy_device struct |
| 32 | * |
| 33 | * Description: Writes MII_ADVERTISE with the appropriate values, |
| 34 | * after sanitizing the values to make sure we only advertise |
| 35 | * what is supported. Returns < 0 on error, 0 if the PHY's advertisement |
| 36 | * hasn't changed, and > 0 if it has changed. |
| 37 | */ |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 38 | static int genphy_config_advert(struct phy_device *phydev) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 39 | { |
| 40 | u32 advertise; |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 41 | int oldadv, adv, bmsr; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 42 | int err, changed = 0; |
| 43 | |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 44 | /* Only allow advertising what this PHY supports */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 45 | phydev->advertising &= phydev->supported; |
| 46 | advertise = phydev->advertising; |
| 47 | |
| 48 | /* Setup standard advertisement */ |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 49 | adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); |
| 50 | oldadv = adv; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 51 | |
| 52 | if (adv < 0) |
| 53 | return adv; |
| 54 | |
| 55 | adv &= ~(ADVERTISE_ALL | ADVERTISE_100BASE4 | ADVERTISE_PAUSE_CAP | |
| 56 | ADVERTISE_PAUSE_ASYM); |
| 57 | if (advertise & ADVERTISED_10baseT_Half) |
| 58 | adv |= ADVERTISE_10HALF; |
| 59 | if (advertise & ADVERTISED_10baseT_Full) |
| 60 | adv |= ADVERTISE_10FULL; |
| 61 | if (advertise & ADVERTISED_100baseT_Half) |
| 62 | adv |= ADVERTISE_100HALF; |
| 63 | if (advertise & ADVERTISED_100baseT_Full) |
| 64 | adv |= ADVERTISE_100FULL; |
| 65 | if (advertise & ADVERTISED_Pause) |
| 66 | adv |= ADVERTISE_PAUSE_CAP; |
| 67 | if (advertise & ADVERTISED_Asym_Pause) |
| 68 | adv |= ADVERTISE_PAUSE_ASYM; |
Charles Coldwell | de1d786 | 2013-02-21 08:25:52 -0500 | [diff] [blame] | 69 | if (advertise & ADVERTISED_1000baseX_Half) |
| 70 | adv |= ADVERTISE_1000XHALF; |
| 71 | if (advertise & ADVERTISED_1000baseX_Full) |
| 72 | adv |= ADVERTISE_1000XFULL; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 73 | |
| 74 | if (adv != oldadv) { |
| 75 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE, adv); |
| 76 | |
| 77 | if (err < 0) |
| 78 | return err; |
| 79 | changed = 1; |
| 80 | } |
| 81 | |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 82 | bmsr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 83 | if (bmsr < 0) |
| 84 | return bmsr; |
| 85 | |
| 86 | /* Per 802.3-2008, Section 22.2.4.2.16 Extended status all |
| 87 | * 1000Mbits/sec capable PHYs shall have the BMSR_ESTATEN bit set to a |
| 88 | * logical 1. |
| 89 | */ |
| 90 | if (!(bmsr & BMSR_ESTATEN)) |
| 91 | return changed; |
| 92 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 93 | /* Configure gigabit if it's supported */ |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 94 | adv = phy_read(phydev, MDIO_DEVAD_NONE, MII_CTRL1000); |
| 95 | oldadv = adv; |
| 96 | |
| 97 | if (adv < 0) |
| 98 | return adv; |
| 99 | |
| 100 | adv &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF); |
| 101 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 102 | if (phydev->supported & (SUPPORTED_1000baseT_Half | |
| 103 | SUPPORTED_1000baseT_Full)) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 104 | if (advertise & SUPPORTED_1000baseT_Half) |
| 105 | adv |= ADVERTISE_1000HALF; |
| 106 | if (advertise & SUPPORTED_1000baseT_Full) |
| 107 | adv |= ADVERTISE_1000FULL; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 108 | } |
| 109 | |
Florian Fainelli | bbdcaff | 2016-01-13 16:59:31 +0300 | [diff] [blame] | 110 | if (adv != oldadv) |
| 111 | changed = 1; |
| 112 | |
| 113 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_CTRL1000, adv); |
| 114 | if (err < 0) |
| 115 | return err; |
| 116 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 117 | return changed; |
| 118 | } |
| 119 | |
| 120 | |
| 121 | /** |
| 122 | * genphy_setup_forced - configures/forces speed/duplex from @phydev |
| 123 | * @phydev: target phy_device struct |
| 124 | * |
| 125 | * Description: Configures MII_BMCR to force speed/duplex |
| 126 | * to the values in phydev. Assumes that the values are valid. |
| 127 | */ |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 128 | static int genphy_setup_forced(struct phy_device *phydev) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 129 | { |
| 130 | int err; |
Alexandre Messier | 53b0c38 | 2016-01-22 14:16:15 -0500 | [diff] [blame] | 131 | int ctl = BMCR_ANRESTART; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 132 | |
| 133 | phydev->pause = phydev->asym_pause = 0; |
| 134 | |
| 135 | if (SPEED_1000 == phydev->speed) |
| 136 | ctl |= BMCR_SPEED1000; |
| 137 | else if (SPEED_100 == phydev->speed) |
| 138 | ctl |= BMCR_SPEED100; |
| 139 | |
| 140 | if (DUPLEX_FULL == phydev->duplex) |
| 141 | ctl |= BMCR_FULLDPLX; |
| 142 | |
| 143 | err = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); |
| 144 | |
| 145 | return err; |
| 146 | } |
| 147 | |
| 148 | |
| 149 | /** |
| 150 | * genphy_restart_aneg - Enable and Restart Autonegotiation |
| 151 | * @phydev: target phy_device struct |
| 152 | */ |
| 153 | int genphy_restart_aneg(struct phy_device *phydev) |
| 154 | { |
| 155 | int ctl; |
| 156 | |
| 157 | ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); |
| 158 | |
| 159 | if (ctl < 0) |
| 160 | return ctl; |
| 161 | |
| 162 | ctl |= (BMCR_ANENABLE | BMCR_ANRESTART); |
| 163 | |
| 164 | /* Don't isolate the PHY if we're negotiating */ |
| 165 | ctl &= ~(BMCR_ISOLATE); |
| 166 | |
| 167 | ctl = phy_write(phydev, MDIO_DEVAD_NONE, MII_BMCR, ctl); |
| 168 | |
| 169 | return ctl; |
| 170 | } |
| 171 | |
| 172 | |
| 173 | /** |
| 174 | * genphy_config_aneg - restart auto-negotiation or write BMCR |
| 175 | * @phydev: target phy_device struct |
| 176 | * |
| 177 | * Description: If auto-negotiation is enabled, we configure the |
| 178 | * advertising, and then restart auto-negotiation. If it is not |
| 179 | * enabled, then we write the BMCR. |
| 180 | */ |
| 181 | int genphy_config_aneg(struct phy_device *phydev) |
| 182 | { |
| 183 | int result; |
| 184 | |
| 185 | if (AUTONEG_ENABLE != phydev->autoneg) |
| 186 | return genphy_setup_forced(phydev); |
| 187 | |
| 188 | result = genphy_config_advert(phydev); |
| 189 | |
| 190 | if (result < 0) /* error */ |
| 191 | return result; |
| 192 | |
| 193 | if (result == 0) { |
| 194 | /* Advertisment hasn't changed, but maybe aneg was never on to |
| 195 | * begin with? Or maybe phy was isolated? */ |
| 196 | int ctl = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); |
| 197 | |
| 198 | if (ctl < 0) |
| 199 | return ctl; |
| 200 | |
| 201 | if (!(ctl & BMCR_ANENABLE) || (ctl & BMCR_ISOLATE)) |
| 202 | result = 1; /* do restart aneg */ |
| 203 | } |
| 204 | |
| 205 | /* Only restart aneg if we are advertising something different |
| 206 | * than we were before. */ |
| 207 | if (result > 0) |
| 208 | result = genphy_restart_aneg(phydev); |
| 209 | |
| 210 | return result; |
| 211 | } |
| 212 | |
| 213 | /** |
| 214 | * genphy_update_link - update link status in @phydev |
| 215 | * @phydev: target phy_device struct |
| 216 | * |
| 217 | * Description: Update the value in phydev->link to reflect the |
| 218 | * current link value. In order to do this, we need to read |
| 219 | * the status register twice, keeping the second value. |
| 220 | */ |
| 221 | int genphy_update_link(struct phy_device *phydev) |
| 222 | { |
| 223 | unsigned int mii_reg; |
| 224 | |
| 225 | /* |
| 226 | * Wait if the link is up, and autonegotiation is in progress |
| 227 | * (ie - we're capable and it's not done) |
| 228 | */ |
| 229 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 230 | |
| 231 | /* |
| 232 | * If we already saw the link up, and it hasn't gone down, then |
| 233 | * we don't need to wait for autoneg again |
| 234 | */ |
| 235 | if (phydev->link && mii_reg & BMSR_LSTATUS) |
| 236 | return 0; |
| 237 | |
Alexandre Messier | 1f9e672 | 2016-01-22 14:16:56 -0500 | [diff] [blame] | 238 | if ((phydev->autoneg == AUTONEG_ENABLE) && |
| 239 | !(mii_reg & BMSR_ANEGCOMPLETE)) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 240 | int i = 0; |
| 241 | |
| 242 | printf("%s Waiting for PHY auto negotiation to complete", |
| 243 | phydev->dev->name); |
| 244 | while (!(mii_reg & BMSR_ANEGCOMPLETE)) { |
| 245 | /* |
| 246 | * Timeout reached ? |
| 247 | */ |
| 248 | if (i > PHY_ANEG_TIMEOUT) { |
| 249 | printf(" TIMEOUT !\n"); |
| 250 | phydev->link = 0; |
Michal Simek | ef5e821 | 2016-05-18 12:48:57 +0200 | [diff] [blame^] | 251 | return -ETIMEDOUT; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | if (ctrlc()) { |
| 255 | puts("user interrupt!\n"); |
| 256 | phydev->link = 0; |
| 257 | return -EINTR; |
| 258 | } |
| 259 | |
| 260 | if ((i++ % 500) == 0) |
| 261 | printf("."); |
| 262 | |
| 263 | udelay(1000); /* 1 ms */ |
| 264 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 265 | } |
| 266 | printf(" done\n"); |
| 267 | phydev->link = 1; |
| 268 | } else { |
| 269 | /* Read the link a second time to clear the latched state */ |
| 270 | mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 271 | |
| 272 | if (mii_reg & BMSR_LSTATUS) |
| 273 | phydev->link = 1; |
| 274 | else |
| 275 | phydev->link = 0; |
| 276 | } |
| 277 | |
| 278 | return 0; |
| 279 | } |
| 280 | |
| 281 | /* |
| 282 | * Generic function which updates the speed and duplex. If |
| 283 | * autonegotiation is enabled, it uses the AND of the link |
| 284 | * partner's advertised capabilities and our advertised |
| 285 | * capabilities. If autonegotiation is disabled, we use the |
| 286 | * appropriate bits in the control register. |
| 287 | * |
| 288 | * Stolen from Linux's mii.c and phy_device.c |
| 289 | */ |
Yegor Yefremov | e2043f5 | 2012-11-28 11:15:17 +0100 | [diff] [blame] | 290 | int genphy_parse_link(struct phy_device *phydev) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 291 | { |
| 292 | int mii_reg = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 293 | |
| 294 | /* We're using autonegotiation */ |
Alexandre Messier | 1f9e672 | 2016-01-22 14:16:56 -0500 | [diff] [blame] | 295 | if (phydev->autoneg == AUTONEG_ENABLE) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 296 | u32 lpa = 0; |
Heiko Schocher | f6d1f6e | 2013-07-23 15:32:36 +0200 | [diff] [blame] | 297 | int gblpa = 0; |
Charles Coldwell | de1d786 | 2013-02-21 08:25:52 -0500 | [diff] [blame] | 298 | u32 estatus = 0; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 299 | |
| 300 | /* Check for gigabit capability */ |
David Dueck | 3a530d1 | 2013-11-05 17:23:02 +0100 | [diff] [blame] | 301 | if (phydev->supported & (SUPPORTED_1000baseT_Full | |
| 302 | SUPPORTED_1000baseT_Half)) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 303 | /* We want a list of states supported by |
| 304 | * both PHYs in the link |
| 305 | */ |
| 306 | gblpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_STAT1000); |
Heiko Schocher | f6d1f6e | 2013-07-23 15:32:36 +0200 | [diff] [blame] | 307 | if (gblpa < 0) { |
| 308 | debug("Could not read MII_STAT1000. Ignoring gigabit capability\n"); |
| 309 | gblpa = 0; |
| 310 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 311 | gblpa &= phy_read(phydev, |
| 312 | MDIO_DEVAD_NONE, MII_CTRL1000) << 2; |
| 313 | } |
| 314 | |
| 315 | /* Set the baseline so we only have to set them |
| 316 | * if they're different |
| 317 | */ |
| 318 | phydev->speed = SPEED_10; |
| 319 | phydev->duplex = DUPLEX_HALF; |
| 320 | |
| 321 | /* Check the gigabit fields */ |
| 322 | if (gblpa & (PHY_1000BTSR_1000FD | PHY_1000BTSR_1000HD)) { |
| 323 | phydev->speed = SPEED_1000; |
| 324 | |
| 325 | if (gblpa & PHY_1000BTSR_1000FD) |
| 326 | phydev->duplex = DUPLEX_FULL; |
| 327 | |
| 328 | /* We're done! */ |
| 329 | return 0; |
| 330 | } |
| 331 | |
| 332 | lpa = phy_read(phydev, MDIO_DEVAD_NONE, MII_ADVERTISE); |
| 333 | lpa &= phy_read(phydev, MDIO_DEVAD_NONE, MII_LPA); |
| 334 | |
Wolfgang Denk | 0dcfb0f | 2011-09-28 21:02:43 +0200 | [diff] [blame] | 335 | if (lpa & (LPA_100FULL | LPA_100HALF)) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 336 | phydev->speed = SPEED_100; |
| 337 | |
Wolfgang Denk | 0dcfb0f | 2011-09-28 21:02:43 +0200 | [diff] [blame] | 338 | if (lpa & LPA_100FULL) |
| 339 | phydev->duplex = DUPLEX_FULL; |
| 340 | |
| 341 | } else if (lpa & LPA_10FULL) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 342 | phydev->duplex = DUPLEX_FULL; |
Charles Coldwell | de1d786 | 2013-02-21 08:25:52 -0500 | [diff] [blame] | 343 | |
Sascha Silbe | 9ba30f6 | 2013-07-19 12:25:10 +0200 | [diff] [blame] | 344 | /* |
| 345 | * Extended status may indicate that the PHY supports |
| 346 | * 1000BASE-T/X even though the 1000BASE-T registers |
| 347 | * are missing. In this case we can't tell whether the |
| 348 | * peer also supports it, so we only check extended |
| 349 | * status if the 1000BASE-T registers are actually |
| 350 | * missing. |
| 351 | */ |
| 352 | if ((mii_reg & BMSR_ESTATEN) && !(mii_reg & BMSR_ERCAP)) |
Charles Coldwell | de1d786 | 2013-02-21 08:25:52 -0500 | [diff] [blame] | 353 | estatus = phy_read(phydev, MDIO_DEVAD_NONE, |
| 354 | MII_ESTATUS); |
| 355 | |
| 356 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_XHALF | |
| 357 | ESTATUS_1000_TFULL | ESTATUS_1000_THALF)) { |
| 358 | phydev->speed = SPEED_1000; |
| 359 | if (estatus & (ESTATUS_1000_XFULL | ESTATUS_1000_TFULL)) |
| 360 | phydev->duplex = DUPLEX_FULL; |
| 361 | } |
| 362 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 363 | } else { |
| 364 | u32 bmcr = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMCR); |
| 365 | |
| 366 | phydev->speed = SPEED_10; |
| 367 | phydev->duplex = DUPLEX_HALF; |
| 368 | |
| 369 | if (bmcr & BMCR_FULLDPLX) |
| 370 | phydev->duplex = DUPLEX_FULL; |
| 371 | |
| 372 | if (bmcr & BMCR_SPEED1000) |
| 373 | phydev->speed = SPEED_1000; |
| 374 | else if (bmcr & BMCR_SPEED100) |
| 375 | phydev->speed = SPEED_100; |
| 376 | } |
| 377 | |
| 378 | return 0; |
| 379 | } |
| 380 | |
| 381 | int genphy_config(struct phy_device *phydev) |
| 382 | { |
| 383 | int val; |
| 384 | u32 features; |
| 385 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 386 | features = (SUPPORTED_TP | SUPPORTED_MII |
| 387 | | SUPPORTED_AUI | SUPPORTED_FIBRE | |
| 388 | SUPPORTED_BNC); |
| 389 | |
| 390 | /* Do we support autonegotiation? */ |
| 391 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_BMSR); |
| 392 | |
| 393 | if (val < 0) |
| 394 | return val; |
| 395 | |
| 396 | if (val & BMSR_ANEGCAPABLE) |
| 397 | features |= SUPPORTED_Autoneg; |
| 398 | |
| 399 | if (val & BMSR_100FULL) |
| 400 | features |= SUPPORTED_100baseT_Full; |
| 401 | if (val & BMSR_100HALF) |
| 402 | features |= SUPPORTED_100baseT_Half; |
| 403 | if (val & BMSR_10FULL) |
| 404 | features |= SUPPORTED_10baseT_Full; |
| 405 | if (val & BMSR_10HALF) |
| 406 | features |= SUPPORTED_10baseT_Half; |
| 407 | |
| 408 | if (val & BMSR_ESTATEN) { |
| 409 | val = phy_read(phydev, MDIO_DEVAD_NONE, MII_ESTATUS); |
| 410 | |
| 411 | if (val < 0) |
| 412 | return val; |
| 413 | |
| 414 | if (val & ESTATUS_1000_TFULL) |
| 415 | features |= SUPPORTED_1000baseT_Full; |
| 416 | if (val & ESTATUS_1000_THALF) |
| 417 | features |= SUPPORTED_1000baseT_Half; |
Charles Coldwell | de1d786 | 2013-02-21 08:25:52 -0500 | [diff] [blame] | 418 | if (val & ESTATUS_1000_XFULL) |
| 419 | features |= SUPPORTED_1000baseX_Full; |
| 420 | if (val & ESTATUS_1000_XHALF) |
Fabio Estevam | 9a5dad2 | 2013-07-19 10:01:34 -0300 | [diff] [blame] | 421 | features |= SUPPORTED_1000baseX_Half; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 422 | } |
| 423 | |
Sascha Hauer | 44bc317 | 2016-01-13 16:59:32 +0300 | [diff] [blame] | 424 | phydev->supported &= features; |
| 425 | phydev->advertising &= features; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 426 | |
| 427 | genphy_config_aneg(phydev); |
| 428 | |
| 429 | return 0; |
| 430 | } |
| 431 | |
| 432 | int genphy_startup(struct phy_device *phydev) |
| 433 | { |
| 434 | genphy_update_link(phydev); |
| 435 | genphy_parse_link(phydev); |
| 436 | |
| 437 | return 0; |
| 438 | } |
| 439 | |
| 440 | int genphy_shutdown(struct phy_device *phydev) |
| 441 | { |
| 442 | return 0; |
| 443 | } |
| 444 | |
| 445 | static struct phy_driver genphy_driver = { |
| 446 | .uid = 0xffffffff, |
| 447 | .mask = 0xffffffff, |
| 448 | .name = "Generic PHY", |
Sascha Hauer | 44bc317 | 2016-01-13 16:59:32 +0300 | [diff] [blame] | 449 | .features = PHY_GBIT_FEATURES | SUPPORTED_MII | |
| 450 | SUPPORTED_AUI | SUPPORTED_FIBRE | |
| 451 | SUPPORTED_BNC, |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 452 | .config = genphy_config, |
| 453 | .startup = genphy_startup, |
| 454 | .shutdown = genphy_shutdown, |
| 455 | }; |
| 456 | |
| 457 | static LIST_HEAD(phy_drivers); |
| 458 | |
| 459 | int phy_init(void) |
| 460 | { |
Shaohui Xie | f7c38cf | 2014-12-30 18:32:04 +0800 | [diff] [blame] | 461 | #ifdef CONFIG_PHY_AQUANTIA |
| 462 | phy_aquantia_init(); |
| 463 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 464 | #ifdef CONFIG_PHY_ATHEROS |
| 465 | phy_atheros_init(); |
| 466 | #endif |
| 467 | #ifdef CONFIG_PHY_BROADCOM |
| 468 | phy_broadcom_init(); |
| 469 | #endif |
Shengzhou Liu | 9b18e51 | 2014-11-10 18:32:29 +0800 | [diff] [blame] | 470 | #ifdef CONFIG_PHY_CORTINA |
| 471 | phy_cortina_init(); |
| 472 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 473 | #ifdef CONFIG_PHY_DAVICOM |
| 474 | phy_davicom_init(); |
| 475 | #endif |
Matt Porter | f485c8a | 2013-03-20 05:38:13 +0000 | [diff] [blame] | 476 | #ifdef CONFIG_PHY_ET1011C |
| 477 | phy_et1011c_init(); |
| 478 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 479 | #ifdef CONFIG_PHY_LXT |
| 480 | phy_lxt_init(); |
| 481 | #endif |
| 482 | #ifdef CONFIG_PHY_MARVELL |
| 483 | phy_marvell_init(); |
| 484 | #endif |
| 485 | #ifdef CONFIG_PHY_MICREL |
| 486 | phy_micrel_init(); |
| 487 | #endif |
| 488 | #ifdef CONFIG_PHY_NATSEMI |
| 489 | phy_natsemi_init(); |
| 490 | #endif |
| 491 | #ifdef CONFIG_PHY_REALTEK |
| 492 | phy_realtek_init(); |
| 493 | #endif |
Nobuhiro Iwamatsu | 5751aa2 | 2011-11-23 21:24:15 +0000 | [diff] [blame] | 494 | #ifdef CONFIG_PHY_SMSC |
| 495 | phy_smsc_init(); |
| 496 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 497 | #ifdef CONFIG_PHY_TERANETICS |
| 498 | phy_teranetics_init(); |
| 499 | #endif |
Edgar E. Iglesias | 721aed7 | 2015-09-25 23:46:08 -0700 | [diff] [blame] | 500 | #ifdef CONFIG_PHY_TI |
| 501 | phy_ti_init(); |
| 502 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 503 | #ifdef CONFIG_PHY_VITESSE |
| 504 | phy_vitesse_init(); |
| 505 | #endif |
Siva Durga Prasad Paladugu | ed6fad3 | 2016-02-05 13:22:10 +0530 | [diff] [blame] | 506 | #ifdef CONFIG_PHY_XILINX |
| 507 | phy_xilinx_init(); |
| 508 | #endif |
Andy Fleming | 9082eea | 2011-04-07 21:56:05 -0500 | [diff] [blame] | 509 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 510 | return 0; |
| 511 | } |
| 512 | |
| 513 | int phy_register(struct phy_driver *drv) |
| 514 | { |
| 515 | INIT_LIST_HEAD(&drv->list); |
| 516 | list_add_tail(&drv->list, &phy_drivers); |
| 517 | |
Michal Simek | abbfcbe | 2015-05-13 13:40:40 +0200 | [diff] [blame] | 518 | #ifdef CONFIG_NEEDS_MANUAL_RELOC |
| 519 | if (drv->probe) |
| 520 | drv->probe += gd->reloc_off; |
| 521 | if (drv->config) |
| 522 | drv->config += gd->reloc_off; |
| 523 | if (drv->startup) |
| 524 | drv->startup += gd->reloc_off; |
| 525 | if (drv->shutdown) |
| 526 | drv->shutdown += gd->reloc_off; |
| 527 | if (drv->readext) |
| 528 | drv->readext += gd->reloc_off; |
| 529 | if (drv->writeext) |
| 530 | drv->writeext += gd->reloc_off; |
| 531 | #endif |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 532 | return 0; |
| 533 | } |
| 534 | |
Alexey Brodkin | b18acb0 | 2016-01-13 16:59:34 +0300 | [diff] [blame] | 535 | int phy_set_supported(struct phy_device *phydev, u32 max_speed) |
| 536 | { |
| 537 | /* The default values for phydev->supported are provided by the PHY |
| 538 | * driver "features" member, we want to reset to sane defaults first |
| 539 | * before supporting higher speeds. |
| 540 | */ |
| 541 | phydev->supported &= PHY_DEFAULT_FEATURES; |
| 542 | |
| 543 | switch (max_speed) { |
| 544 | default: |
| 545 | return -ENOTSUPP; |
| 546 | case SPEED_1000: |
| 547 | phydev->supported |= PHY_1000BT_FEATURES; |
| 548 | /* fall through */ |
| 549 | case SPEED_100: |
| 550 | phydev->supported |= PHY_100BT_FEATURES; |
| 551 | /* fall through */ |
| 552 | case SPEED_10: |
| 553 | phydev->supported |= PHY_10BT_FEATURES; |
| 554 | } |
| 555 | |
| 556 | return 0; |
| 557 | } |
| 558 | |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 559 | static int phy_probe(struct phy_device *phydev) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 560 | { |
| 561 | int err = 0; |
| 562 | |
| 563 | phydev->advertising = phydev->supported = phydev->drv->features; |
| 564 | phydev->mmds = phydev->drv->mmds; |
| 565 | |
| 566 | if (phydev->drv->probe) |
| 567 | err = phydev->drv->probe(phydev); |
| 568 | |
| 569 | return err; |
| 570 | } |
| 571 | |
| 572 | static struct phy_driver *generic_for_interface(phy_interface_t interface) |
| 573 | { |
| 574 | #ifdef CONFIG_PHYLIB_10G |
| 575 | if (is_10g_interface(interface)) |
| 576 | return &gen10g_driver; |
| 577 | #endif |
| 578 | |
| 579 | return &genphy_driver; |
| 580 | } |
| 581 | |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 582 | static struct phy_driver *get_phy_driver(struct phy_device *phydev, |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 583 | phy_interface_t interface) |
| 584 | { |
| 585 | struct list_head *entry; |
| 586 | int phy_id = phydev->phy_id; |
| 587 | struct phy_driver *drv = NULL; |
| 588 | |
| 589 | list_for_each(entry, &phy_drivers) { |
| 590 | drv = list_entry(entry, struct phy_driver, list); |
| 591 | if ((drv->uid & drv->mask) == (phy_id & drv->mask)) |
| 592 | return drv; |
| 593 | } |
| 594 | |
| 595 | /* If we made it here, there's no driver for this PHY */ |
| 596 | return generic_for_interface(interface); |
| 597 | } |
| 598 | |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 599 | static struct phy_device *phy_device_create(struct mii_dev *bus, int addr, |
Jörg Krause | 2c171a2 | 2015-07-15 14:58:49 +0200 | [diff] [blame] | 600 | u32 phy_id, |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 601 | phy_interface_t interface) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 602 | { |
| 603 | struct phy_device *dev; |
| 604 | |
| 605 | /* We allocate the device, and initialize the |
| 606 | * default values */ |
| 607 | dev = malloc(sizeof(*dev)); |
| 608 | if (!dev) { |
| 609 | printf("Failed to allocate PHY device for %s:%d\n", |
| 610 | bus->name, addr); |
| 611 | return NULL; |
| 612 | } |
| 613 | |
| 614 | memset(dev, 0, sizeof(*dev)); |
| 615 | |
| 616 | dev->duplex = -1; |
Mugunthan V N | 26d3acd | 2015-09-03 15:50:21 +0530 | [diff] [blame] | 617 | dev->link = 0; |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 618 | dev->interface = interface; |
| 619 | |
| 620 | dev->autoneg = AUTONEG_ENABLE; |
| 621 | |
| 622 | dev->addr = addr; |
| 623 | dev->phy_id = phy_id; |
| 624 | dev->bus = bus; |
| 625 | |
| 626 | dev->drv = get_phy_driver(dev, interface); |
| 627 | |
| 628 | phy_probe(dev); |
| 629 | |
| 630 | bus->phymap[addr] = dev; |
| 631 | |
| 632 | return dev; |
| 633 | } |
| 634 | |
| 635 | /** |
| 636 | * get_phy_id - reads the specified addr for its ID. |
| 637 | * @bus: the target MII bus |
| 638 | * @addr: PHY address on the MII bus |
| 639 | * @phy_id: where to store the ID retrieved. |
| 640 | * |
| 641 | * Description: Reads the ID registers of the PHY at @addr on the |
| 642 | * @bus, stores it in @phy_id and returns zero on success. |
| 643 | */ |
Shengzhou Liu | 5707d5f | 2015-04-07 18:46:32 +0800 | [diff] [blame] | 644 | int __weak get_phy_id(struct mii_dev *bus, int addr, int devad, u32 *phy_id) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 645 | { |
| 646 | int phy_reg; |
| 647 | |
| 648 | /* Grab the bits from PHYIR1, and put them |
| 649 | * in the upper half */ |
| 650 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID1); |
| 651 | |
| 652 | if (phy_reg < 0) |
| 653 | return -EIO; |
| 654 | |
| 655 | *phy_id = (phy_reg & 0xffff) << 16; |
| 656 | |
| 657 | /* Grab the bits from PHYIR2, and put them in the lower half */ |
| 658 | phy_reg = bus->read(bus, addr, devad, MII_PHYSID2); |
| 659 | |
| 660 | if (phy_reg < 0) |
| 661 | return -EIO; |
| 662 | |
| 663 | *phy_id |= (phy_reg & 0xffff); |
| 664 | |
| 665 | return 0; |
| 666 | } |
| 667 | |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 668 | static struct phy_device *create_phy_by_mask(struct mii_dev *bus, |
| 669 | unsigned phy_mask, int devad, phy_interface_t interface) |
| 670 | { |
| 671 | u32 phy_id = 0xffffffff; |
| 672 | while (phy_mask) { |
| 673 | int addr = ffs(phy_mask) - 1; |
| 674 | int r = get_phy_id(bus, addr, devad, &phy_id); |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 675 | /* If the PHY ID is mostly f's, we didn't find anything */ |
Cormier, Jonathan | 08be283 | 2014-05-21 13:08:52 -0400 | [diff] [blame] | 676 | if (r == 0 && (phy_id & 0x1fffffff) != 0x1fffffff) |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 677 | return phy_device_create(bus, addr, phy_id, interface); |
| 678 | phy_mask &= ~(1 << addr); |
| 679 | } |
| 680 | return NULL; |
| 681 | } |
| 682 | |
| 683 | static struct phy_device *search_for_existing_phy(struct mii_dev *bus, |
| 684 | unsigned phy_mask, phy_interface_t interface) |
| 685 | { |
| 686 | /* If we have one, return the existing device, with new interface */ |
| 687 | while (phy_mask) { |
| 688 | int addr = ffs(phy_mask) - 1; |
| 689 | if (bus->phymap[addr]) { |
| 690 | bus->phymap[addr]->interface = interface; |
| 691 | return bus->phymap[addr]; |
| 692 | } |
| 693 | phy_mask &= ~(1 << addr); |
| 694 | } |
| 695 | return NULL; |
| 696 | } |
| 697 | |
| 698 | static struct phy_device *get_phy_device_by_mask(struct mii_dev *bus, |
| 699 | unsigned phy_mask, phy_interface_t interface) |
| 700 | { |
| 701 | int i; |
| 702 | struct phy_device *phydev; |
| 703 | |
| 704 | phydev = search_for_existing_phy(bus, phy_mask, interface); |
| 705 | if (phydev) |
| 706 | return phydev; |
| 707 | /* Try Standard (ie Clause 22) access */ |
| 708 | /* Otherwise we have to try Clause 45 */ |
| 709 | for (i = 0; i < 5; i++) { |
| 710 | phydev = create_phy_by_mask(bus, phy_mask, |
| 711 | i ? i : MDIO_DEVAD_NONE, interface); |
| 712 | if (IS_ERR(phydev)) |
| 713 | return NULL; |
| 714 | if (phydev) |
| 715 | return phydev; |
| 716 | } |
Bin Meng | 3e1949d | 2015-10-07 21:19:30 -0700 | [diff] [blame] | 717 | |
| 718 | debug("\n%s PHY: ", bus->name); |
| 719 | while (phy_mask) { |
| 720 | int addr = ffs(phy_mask) - 1; |
| 721 | debug("%d ", addr); |
| 722 | phy_mask &= ~(1 << addr); |
| 723 | } |
| 724 | debug("not found\n"); |
Bin Meng | 0132b9a | 2015-10-07 21:19:29 -0700 | [diff] [blame] | 725 | |
| 726 | return NULL; |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 727 | } |
| 728 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 729 | /** |
| 730 | * get_phy_device - reads the specified PHY device and returns its @phy_device struct |
| 731 | * @bus: the target MII bus |
| 732 | * @addr: PHY address on the MII bus |
| 733 | * |
| 734 | * Description: Reads the ID registers of the PHY at @addr on the |
| 735 | * @bus, then allocates and returns the phy_device to represent it. |
| 736 | */ |
Kim Phillips | 960d70c | 2012-10-29 13:34:34 +0000 | [diff] [blame] | 737 | static struct phy_device *get_phy_device(struct mii_dev *bus, int addr, |
| 738 | phy_interface_t interface) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 739 | { |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 740 | return get_phy_device_by_mask(bus, 1 << addr, interface); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 741 | } |
| 742 | |
| 743 | int phy_reset(struct phy_device *phydev) |
| 744 | { |
| 745 | int reg; |
| 746 | int timeout = 500; |
| 747 | int devad = MDIO_DEVAD_NONE; |
| 748 | |
Shaohui Xie | ddcd1f3 | 2016-01-28 15:55:46 +0800 | [diff] [blame] | 749 | if (phydev->flags & PHY_FLAG_BROKEN_RESET) |
| 750 | return 0; |
| 751 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 752 | #ifdef CONFIG_PHYLIB_10G |
| 753 | /* If it's 10G, we need to issue reset through one of the MMDs */ |
| 754 | if (is_10g_interface(phydev->interface)) { |
| 755 | if (!phydev->mmds) |
| 756 | gen10g_discover_mmds(phydev); |
| 757 | |
| 758 | devad = ffs(phydev->mmds) - 1; |
| 759 | } |
| 760 | #endif |
| 761 | |
Stefan Agner | a058052 | 2015-12-09 11:21:25 -0800 | [diff] [blame] | 762 | if (phy_write(phydev, devad, MII_BMCR, BMCR_RESET) < 0) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 763 | debug("PHY reset failed\n"); |
| 764 | return -1; |
| 765 | } |
| 766 | |
| 767 | #ifdef CONFIG_PHY_RESET_DELAY |
| 768 | udelay(CONFIG_PHY_RESET_DELAY); /* Intel LXT971A needs this */ |
| 769 | #endif |
| 770 | /* |
| 771 | * Poll the control register for the reset bit to go to 0 (it is |
| 772 | * auto-clearing). This should happen within 0.5 seconds per the |
| 773 | * IEEE spec. |
| 774 | */ |
Stefan Agner | a058052 | 2015-12-09 11:21:25 -0800 | [diff] [blame] | 775 | reg = phy_read(phydev, devad, MII_BMCR); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 776 | while ((reg & BMCR_RESET) && timeout--) { |
| 777 | reg = phy_read(phydev, devad, MII_BMCR); |
| 778 | |
| 779 | if (reg < 0) { |
| 780 | debug("PHY status read failed\n"); |
| 781 | return -1; |
| 782 | } |
| 783 | udelay(1000); |
| 784 | } |
| 785 | |
| 786 | if (reg & BMCR_RESET) { |
| 787 | puts("PHY reset timed out\n"); |
| 788 | return -1; |
| 789 | } |
| 790 | |
| 791 | return 0; |
| 792 | } |
| 793 | |
| 794 | int miiphy_reset(const char *devname, unsigned char addr) |
| 795 | { |
| 796 | struct mii_dev *bus = miiphy_get_dev_by_name(devname); |
| 797 | struct phy_device *phydev; |
| 798 | |
| 799 | /* |
| 800 | * miiphy_reset was only used on standard PHYs, so we'll fake it here. |
| 801 | * If later code tries to connect with the right interface, this will |
| 802 | * be corrected by get_phy_device in phy_connect() |
| 803 | */ |
| 804 | phydev = get_phy_device(bus, addr, PHY_INTERFACE_MODE_MII); |
| 805 | |
| 806 | return phy_reset(phydev); |
| 807 | } |
| 808 | |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 809 | struct phy_device *phy_find_by_mask(struct mii_dev *bus, unsigned phy_mask, |
| 810 | phy_interface_t interface) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 811 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 812 | /* Reset the bus */ |
Jörg Krause | 59370f3 | 2015-07-15 15:18:22 +0200 | [diff] [blame] | 813 | if (bus->reset) { |
Vladimir Zapolskiy | e3a7721 | 2011-09-05 07:24:07 +0000 | [diff] [blame] | 814 | bus->reset(bus); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 815 | |
Jörg Krause | 59370f3 | 2015-07-15 15:18:22 +0200 | [diff] [blame] | 816 | /* Wait 15ms to make sure the PHY has come out of hard reset */ |
| 817 | udelay(15000); |
| 818 | } |
| 819 | |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 820 | return get_phy_device_by_mask(bus, phy_mask, interface); |
| 821 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 822 | |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 823 | #ifdef CONFIG_DM_ETH |
| 824 | void phy_connect_dev(struct phy_device *phydev, struct udevice *dev) |
| 825 | #else |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 826 | void phy_connect_dev(struct phy_device *phydev, struct eth_device *dev) |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 827 | #endif |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 828 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 829 | /* Soft Reset the PHY */ |
| 830 | phy_reset(phydev); |
Bin Meng | 17ecfa9 | 2015-10-07 21:19:31 -0700 | [diff] [blame] | 831 | if (phydev->dev && phydev->dev != dev) { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 832 | printf("%s:%d is connected to %s. Reconnecting to %s\n", |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 833 | phydev->bus->name, phydev->addr, |
| 834 | phydev->dev->name, dev->name); |
| 835 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 836 | phydev->dev = dev; |
Wolfgang Denk | b91a9d9 | 2011-07-24 21:39:10 +0000 | [diff] [blame] | 837 | debug("%s connected to %s\n", dev->name, phydev->drv->name); |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 838 | } |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 839 | |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 840 | #ifdef CONFIG_DM_ETH |
| 841 | struct phy_device *phy_connect(struct mii_dev *bus, int addr, |
| 842 | struct udevice *dev, phy_interface_t interface) |
| 843 | #else |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 844 | struct phy_device *phy_connect(struct mii_dev *bus, int addr, |
| 845 | struct eth_device *dev, phy_interface_t interface) |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 846 | #endif |
Troy Kisky | 1adb406 | 2012-10-22 16:40:43 +0000 | [diff] [blame] | 847 | { |
| 848 | struct phy_device *phydev; |
| 849 | |
| 850 | phydev = phy_find_by_mask(bus, 1 << addr, interface); |
| 851 | if (phydev) |
| 852 | phy_connect_dev(phydev, dev); |
| 853 | else |
| 854 | printf("Could not get PHY for %s: addr %d\n", bus->name, addr); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 855 | return phydev; |
| 856 | } |
| 857 | |
Timur Tabi | 6e5b9ac | 2012-07-05 10:33:18 +0000 | [diff] [blame] | 858 | /* |
| 859 | * Start the PHY. Returns 0 on success, or a negative error code. |
| 860 | */ |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 861 | int phy_startup(struct phy_device *phydev) |
| 862 | { |
| 863 | if (phydev->drv->startup) |
Timur Tabi | 6e5b9ac | 2012-07-05 10:33:18 +0000 | [diff] [blame] | 864 | return phydev->drv->startup(phydev); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 865 | |
| 866 | return 0; |
| 867 | } |
| 868 | |
Jeroen Hofstee | 3c6928f | 2014-10-08 22:57:26 +0200 | [diff] [blame] | 869 | __weak int board_phy_config(struct phy_device *phydev) |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 870 | { |
Troy Kisky | 9fafe7d | 2012-02-07 14:08:49 +0000 | [diff] [blame] | 871 | if (phydev->drv->config) |
| 872 | return phydev->drv->config(phydev); |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 873 | return 0; |
| 874 | } |
| 875 | |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 876 | int phy_config(struct phy_device *phydev) |
| 877 | { |
Andy Fleming | 5f18471 | 2011-04-08 02:10:27 -0500 | [diff] [blame] | 878 | /* Invoke an optional board-specific helper */ |
| 879 | board_phy_config(phydev); |
| 880 | |
| 881 | return 0; |
| 882 | } |
| 883 | |
| 884 | int phy_shutdown(struct phy_device *phydev) |
| 885 | { |
| 886 | if (phydev->drv->shutdown) |
| 887 | phydev->drv->shutdown(phydev); |
| 888 | |
| 889 | return 0; |
| 890 | } |
Simon Glass | c74c8e6 | 2015-04-05 16:07:39 -0600 | [diff] [blame] | 891 | |
| 892 | int phy_get_interface_by_name(const char *str) |
| 893 | { |
| 894 | int i; |
| 895 | |
| 896 | for (i = 0; i < PHY_INTERFACE_MODE_COUNT; i++) { |
| 897 | if (!strcmp(str, phy_interface_strings[i])) |
| 898 | return i; |
| 899 | } |
| 900 | |
| 901 | return -1; |
| 902 | } |