blob: 76917b022ede019176244bdd007b8f3b9b74c8d7 [file] [log] [blame]
Tom Rini4549e782018-05-06 18:27:01 -04001// SPDX-License-Identifier: GPL-2.0+ OR BSD-3-Clause
Patrick Delaunayf8598d92018-03-12 10:46:18 +01002/*
3 * Copyright (C) 2018, STMicroelectronics - All Rights Reserved
Patrick Delaunayf8598d92018-03-12 10:46:18 +01004 */
Patrice Chotard395f1292019-02-12 16:50:40 +01005#include <common.h>
6#include <adc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +01007#include <config.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +02008#include <clk.h>
9#include <dm.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +010010#include <g_dnl.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020011#include <generic-phy.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010012#include <i2c.h>
Patrick Delaunayd461f102019-02-12 11:44:41 +010013#include <led.h>
14#include <misc.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020015#include <phy.h>
16#include <reset.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010017#include <syscon.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010018#include <usb.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020019#include <asm/io.h>
Patrick Delaunay842ebb52019-02-27 17:01:18 +010020#include <asm/gpio.h>
Patrick Delaunay45459742019-02-27 17:01:24 +010021#include <asm/arch/stm32.h>
Patrice Chotard4c834b92018-08-10 17:12:14 +020022#include <power/regulator.h>
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +010023#include <usb/dwc2_udc.h>
Patrick Delaunayf8598d92018-03-12 10:46:18 +010024
Patrick Delaunay45459742019-02-27 17:01:24 +010025/* SYSCFG registers */
26#define SYSCFG_BOOTR 0x00
27#define SYSCFG_PMCSETR 0x04
28#define SYSCFG_IOCTRLSETR 0x18
29#define SYSCFG_ICNR 0x1C
30#define SYSCFG_CMPCR 0x20
31#define SYSCFG_CMPENSETR 0x24
32#define SYSCFG_PMCCLRR 0x44
33
34#define SYSCFG_BOOTR_BOOT_MASK GENMASK(2, 0)
35#define SYSCFG_BOOTR_BOOTPD_SHIFT 4
36
37#define SYSCFG_IOCTRLSETR_HSLVEN_TRACE BIT(0)
38#define SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI BIT(1)
39#define SYSCFG_IOCTRLSETR_HSLVEN_ETH BIT(2)
40#define SYSCFG_IOCTRLSETR_HSLVEN_SDMMC BIT(3)
41#define SYSCFG_IOCTRLSETR_HSLVEN_SPI BIT(4)
42
43#define SYSCFG_CMPCR_SW_CTRL BIT(1)
44#define SYSCFG_CMPCR_READY BIT(8)
45
46#define SYSCFG_CMPENSETR_MPU_EN BIT(0)
47
48#define SYSCFG_PMCSETR_ETH_CLK_SEL BIT(16)
49#define SYSCFG_PMCSETR_ETH_REF_CLK_SEL BIT(17)
50
51#define SYSCFG_PMCSETR_ETH_SELMII BIT(20)
52
53#define SYSCFG_PMCSETR_ETH_SEL_MASK GENMASK(23, 21)
54#define SYSCFG_PMCSETR_ETH_SEL_GMII_MII (0 << 21)
55#define SYSCFG_PMCSETR_ETH_SEL_RGMII (1 << 21)
56#define SYSCFG_PMCSETR_ETH_SEL_RMII (4 << 21)
57
Patrick Delaunayf8598d92018-03-12 10:46:18 +010058/*
59 * Get a global data pointer
60 */
61DECLARE_GLOBAL_DATA_PTR;
62
Patrice Chotard395f1292019-02-12 16:50:40 +010063#define USB_WARNING_LOW_THRESHOLD_UV 660000
64#define USB_START_LOW_THRESHOLD_UV 1230000
65#define USB_START_HIGH_THRESHOLD_UV 2100000
66
Patrick Delaunayd461f102019-02-12 11:44:41 +010067int checkboard(void)
68{
69 int ret;
70 char *mode;
71 u32 otp;
72 struct udevice *dev;
73 const char *fdt_compat;
74 int fdt_compat_len;
75
76 if (IS_ENABLED(CONFIG_STM32MP1_TRUSTED))
77 mode = "trusted";
78 else
79 mode = "basic";
80
81 printf("Board: stm32mp1 in %s mode", mode);
82 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
83 &fdt_compat_len);
84 if (fdt_compat && fdt_compat_len)
85 printf(" (%s)", fdt_compat);
86 puts("\n");
87
88 ret = uclass_get_device_by_driver(UCLASS_MISC,
89 DM_GET_DRIVER(stm32mp_bsec),
90 &dev);
91
92 if (!ret)
93 ret = misc_read(dev, STM32_BSEC_SHADOW(BSEC_OTP_BOARD),
94 &otp, sizeof(otp));
95 if (!ret && otp) {
96 printf("Board: MB%04x Var%d Rev.%c-%02d\n",
97 otp >> 16,
98 (otp >> 12) & 0xF,
99 ((otp >> 8) & 0xF) - 1 + 'A',
100 otp & 0xF);
101 }
102
103 return 0;
104}
105
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100106static void board_key_check(void)
107{
108#if defined(CONFIG_FASTBOOT) || defined(CONFIG_CMD_STM32PROG)
109 ofnode node;
110 struct gpio_desc gpio;
111 enum forced_boot_mode boot_mode = BOOT_NORMAL;
112
113 node = ofnode_path("/config");
114 if (!ofnode_valid(node)) {
115 debug("%s: no /config node?\n", __func__);
116 return;
117 }
118#ifdef CONFIG_FASTBOOT
119 if (gpio_request_by_name_nodev(node, "st,fastboot-gpios", 0,
120 &gpio, GPIOD_IS_IN)) {
121 debug("%s: could not find a /config/st,fastboot-gpios\n",
122 __func__);
123 } else {
124 if (dm_gpio_get_value(&gpio)) {
125 puts("Fastboot key pressed, ");
126 boot_mode = BOOT_FASTBOOT;
127 }
128
129 dm_gpio_free(NULL, &gpio);
130 }
131#endif
132#ifdef CONFIG_CMD_STM32PROG
133 if (gpio_request_by_name_nodev(node, "st,stm32prog-gpios", 0,
134 &gpio, GPIOD_IS_IN)) {
135 debug("%s: could not find a /config/st,stm32prog-gpios\n",
136 __func__);
137 } else {
138 if (dm_gpio_get_value(&gpio)) {
139 puts("STM32Programmer key pressed, ");
140 boot_mode = BOOT_STM32PROG;
141 }
142 dm_gpio_free(NULL, &gpio);
143 }
144#endif
145
146 if (boot_mode != BOOT_NORMAL) {
147 puts("entering download mode...\n");
148 clrsetbits_le32(TAMP_BOOT_CONTEXT,
149 TAMP_BOOT_FORCED_MASK,
150 boot_mode);
151 }
152#endif
153}
154
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100155#if defined(CONFIG_USB_GADGET) && defined(CONFIG_USB_GADGET_DWC2_OTG)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200156
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100157/* STMicroelectronics STUSB1600 Type-C controller */
158#define STUSB1600_CC_CONNECTION_STATUS 0x0E
159
160/* STUSB1600_CC_CONNECTION_STATUS bitfields */
161#define STUSB1600_CC_ATTACH BIT(0)
162
163static int stusb1600_init(struct udevice **dev_stusb1600)
164{
165 ofnode node;
166 struct udevice *dev, *bus;
167 int ret;
168 u32 chip_addr;
169
170 *dev_stusb1600 = NULL;
171
172 /* if node stusb1600 is present, means DK1 or DK2 board */
173 node = ofnode_by_compatible(ofnode_null(), "st,stusb1600");
174 if (!ofnode_valid(node))
175 return -ENODEV;
176
177 ret = ofnode_read_u32(node, "reg", &chip_addr);
178 if (ret)
179 return -EINVAL;
180
181 ret = uclass_get_device_by_ofnode(UCLASS_I2C, ofnode_get_parent(node),
182 &bus);
183 if (ret) {
184 printf("bus for stusb1600 not found\n");
185 return -ENODEV;
186 }
187
188 ret = dm_i2c_probe(bus, chip_addr, 0, &dev);
189 if (!ret)
190 *dev_stusb1600 = dev;
191
192 return ret;
193}
194
195static int stusb1600_cable_connected(struct udevice *dev)
196{
197 u8 status;
198
199 if (dm_i2c_read(dev, STUSB1600_CC_CONNECTION_STATUS, &status, 1))
200 return 0;
201
202 return status & STUSB1600_CC_ATTACH;
203}
204
205#include <usb/dwc2_udc.h>
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100206int g_dnl_board_usb_cable_connected(void)
Patrice Chotard4c834b92018-08-10 17:12:14 +0200207{
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100208 struct udevice *stusb1600;
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100209 struct udevice *dwc2_udc_otg;
Patrice Chotard4c834b92018-08-10 17:12:14 +0200210 int ret;
211
Patrick Delaunay6fe7dd32019-03-29 15:42:24 +0100212 if (!stusb1600_init(&stusb1600))
213 return stusb1600_cable_connected(stusb1600);
214
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100215 ret = uclass_get_device_by_driver(UCLASS_USB_GADGET_GENERIC,
216 DM_GET_DRIVER(dwc2_udc_otg),
217 &dwc2_udc_otg);
218 if (!ret)
219 debug("dwc2_udc_otg init failed\n");
Patrice Chotard4c834b92018-08-10 17:12:14 +0200220
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100221 return dwc2_udc_B_session_valid(dwc2_udc_otg);
Patrice Chotard4c834b92018-08-10 17:12:14 +0200222}
Patrick Delaunayc31000c2019-03-29 15:42:23 +0100223#endif /* CONFIG_USB_GADGET */
Patrice Chotard4c834b92018-08-10 17:12:14 +0200224
Patrice Chotard395f1292019-02-12 16:50:40 +0100225static int get_led(struct udevice **dev, char *led_string)
226{
227 char *led_name;
228 int ret;
229
230 led_name = fdtdec_get_config_string(gd->fdt_blob, led_string);
231 if (!led_name) {
232 pr_debug("%s: could not find %s config string\n",
233 __func__, led_string);
234 return -ENOENT;
235 }
236 ret = led_get_by_label(led_name, dev);
237 if (ret) {
238 debug("%s: get=%d\n", __func__, ret);
239 return ret;
240 }
241
242 return 0;
243}
244
245static int setup_led(enum led_state_t cmd)
246{
247 struct udevice *dev;
248 int ret;
249
250 ret = get_led(&dev, "u-boot,boot-led");
251 if (ret)
252 return ret;
253
254 ret = led_set_state(dev, cmd);
255 return ret;
256}
257
258static int board_check_usb_power(void)
259{
260 struct ofnode_phandle_args adc_args;
261 struct udevice *adc;
262 struct udevice *led;
263 ofnode node;
264 unsigned int raw;
265 int max_uV = 0;
266 int ret, uV, adc_count;
267 u8 i, nb_blink;
268
269 node = ofnode_path("/config");
270 if (!ofnode_valid(node)) {
271 debug("%s: no /config node?\n", __func__);
272 return -ENOENT;
273 }
274
275 /*
276 * Retrieve the ADC channels devices and get measurement
277 * for each of them
278 */
279 adc_count = ofnode_count_phandle_with_args(node, "st,adc_usb_pd",
280 "#io-channel-cells");
281 if (adc_count < 0) {
282 if (adc_count == -ENOENT)
283 return 0;
284
285 pr_err("%s: can't find adc channel (%d)\n", __func__,
286 adc_count);
287
288 return adc_count;
289 }
290
291 for (i = 0; i < adc_count; i++) {
292 if (ofnode_parse_phandle_with_args(node, "st,adc_usb_pd",
293 "#io-channel-cells", 0, i,
294 &adc_args)) {
295 pr_debug("%s: can't find /config/st,adc_usb_pd\n",
296 __func__);
297 return 0;
298 }
299
300 ret = uclass_get_device_by_ofnode(UCLASS_ADC, adc_args.node,
301 &adc);
302
303 if (ret) {
304 pr_err("%s: Can't get adc device(%d)\n", __func__,
305 ret);
306 return ret;
307 }
308
309 ret = adc_channel_single_shot(adc->name, adc_args.args[0],
310 &raw);
311 if (ret) {
312 pr_err("%s: single shot failed for %s[%d]!\n",
313 __func__, adc->name, adc_args.args[0]);
314 return ret;
315 }
316 /* Convert to uV */
317 if (!adc_raw_to_uV(adc, raw, &uV)) {
318 if (uV > max_uV)
319 max_uV = uV;
320 pr_debug("%s: %s[%02d] = %u, %d uV\n", __func__,
321 adc->name, adc_args.args[0], raw, uV);
322 } else {
323 pr_err("%s: Can't get uV value for %s[%d]\n",
324 __func__, adc->name, adc_args.args[0]);
325 }
326 }
327
328 /*
329 * If highest value is inside 1.23 Volts and 2.10 Volts, that means
330 * board is plugged on an USB-C 3A power supply and boot process can
331 * continue.
332 */
333 if (max_uV > USB_START_LOW_THRESHOLD_UV &&
334 max_uV < USB_START_HIGH_THRESHOLD_UV)
335 return 0;
336
337 /* Display warning message and make u-boot,error-led blinking */
338 pr_err("\n*******************************************\n");
339
340 if (max_uV < USB_WARNING_LOW_THRESHOLD_UV) {
341 pr_err("* WARNING 500mA power supply detected *\n");
342 nb_blink = 2;
343 } else {
344 pr_err("* WARNING 1.5A power supply detected *\n");
345 nb_blink = 3;
346 }
347
348 pr_err("* Current too low, use a 3A power supply! *\n");
349 pr_err("*******************************************\n\n");
350
351 ret = get_led(&led, "u-boot,error-led");
352 if (ret)
353 return ret;
354
355 for (i = 0; i < nb_blink * 2; i++) {
356 led_set_state(led, LEDST_TOGGLE);
357 mdelay(125);
358 }
359 led_set_state(led, LEDST_ON);
360
361 return 0;
362}
363
Patrick Delaunay45459742019-02-27 17:01:24 +0100364static void sysconf_init(void)
365{
366#ifndef CONFIG_STM32MP1_TRUSTED
367 u8 *syscfg;
368#ifdef CONFIG_DM_REGULATOR
369 struct udevice *pwr_dev;
370 struct udevice *pwr_reg;
371 struct udevice *dev;
372 int ret;
373 u32 otp = 0;
374#endif
375 u32 bootr;
376
377 syscfg = (u8 *)syscon_get_first_range(STM32MP_SYSCON_SYSCFG);
378
379 /* interconnect update : select master using the port 1 */
380 /* LTDC = AXI_M9 */
381 /* GPU = AXI_M8 */
382 /* today information is hardcoded in U-Boot */
383 writel(BIT(9), syscfg + SYSCFG_ICNR);
384
385 /* disable Pull-Down for boot pin connected to VDD */
386 bootr = readl(syscfg + SYSCFG_BOOTR);
387 bootr &= ~(SYSCFG_BOOTR_BOOT_MASK << SYSCFG_BOOTR_BOOTPD_SHIFT);
388 bootr |= (bootr & SYSCFG_BOOTR_BOOT_MASK) << SYSCFG_BOOTR_BOOTPD_SHIFT;
389 writel(bootr, syscfg + SYSCFG_BOOTR);
390
391#ifdef CONFIG_DM_REGULATOR
392 /* High Speed Low Voltage Pad mode Enable for SPI, SDMMC, ETH, QSPI
393 * and TRACE. Needed above ~50MHz and conditioned by AFMUX selection.
394 * The customer will have to disable this for low frequencies
395 * or if AFMUX is selected but the function not used, typically for
396 * TRACE. Otherwise, impact on power consumption.
397 *
398 * WARNING:
399 * enabling High Speed mode while VDD>2.7V
400 * with the OTP product_below_2v5 (OTP 18, BIT 13)
401 * erroneously set to 1 can damage the IC!
402 * => U-Boot set the register only if VDD < 2.7V (in DT)
403 * but this value need to be consistent with board design
404 */
405 ret = syscon_get_by_driver_data(STM32MP_SYSCON_PWR, &pwr_dev);
406 if (!ret) {
407 ret = uclass_get_device_by_driver(UCLASS_MISC,
408 DM_GET_DRIVER(stm32mp_bsec),
409 &dev);
410 if (ret) {
411 pr_err("Can't find stm32mp_bsec driver\n");
412 return;
413 }
414
415 ret = misc_read(dev, STM32_BSEC_SHADOW(18), &otp, 4);
416 if (!ret)
417 otp = otp & BIT(13);
418
419 /* get VDD = pwr-supply */
420 ret = device_get_supply_regulator(pwr_dev, "pwr-supply",
421 &pwr_reg);
422
423 /* check if VDD is Low Voltage */
424 if (!ret) {
425 if (regulator_get_value(pwr_reg) < 2700000) {
426 writel(SYSCFG_IOCTRLSETR_HSLVEN_TRACE |
427 SYSCFG_IOCTRLSETR_HSLVEN_QUADSPI |
428 SYSCFG_IOCTRLSETR_HSLVEN_ETH |
429 SYSCFG_IOCTRLSETR_HSLVEN_SDMMC |
430 SYSCFG_IOCTRLSETR_HSLVEN_SPI,
431 syscfg + SYSCFG_IOCTRLSETR);
432
433 if (!otp)
434 pr_err("product_below_2v5=0: HSLVEN protected by HW\n");
435 } else {
436 if (otp)
437 pr_err("product_below_2v5=1: HSLVEN update is destructive, no update as VDD>2.7V\n");
438 }
439 } else {
440 debug("VDD unknown");
441 }
442 }
443#endif
444
445 /* activate automatic I/O compensation
446 * warning: need to ensure CSI enabled and ready in clock driver
447 */
448 writel(SYSCFG_CMPENSETR_MPU_EN, syscfg + SYSCFG_CMPENSETR);
449
450 while (!(readl(syscfg + SYSCFG_CMPCR) & SYSCFG_CMPCR_READY))
451 ;
452 clrbits_le32(syscfg + SYSCFG_CMPCR, SYSCFG_CMPCR_SW_CTRL);
453#endif
454}
455
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100456/* board dependent setup after realloc */
457int board_init(void)
458{
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100459 struct udevice *dev;
460
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100461 /* address of boot parameters */
462 gd->bd->bi_boot_params = STM32_DDR_BASE + 0x100;
463
Patrice Chotard8b4afe82019-03-11 11:13:17 +0100464 /* probe all PINCTRL for hog */
465 for (uclass_first_device(UCLASS_PINCTRL, &dev);
466 dev;
467 uclass_next_device(&dev)) {
468 pr_debug("probe pincontrol = %s\n", dev->name);
469 }
470
Patrick Delaunay9a2ba282019-02-27 17:01:20 +0100471 board_key_check();
472
Patrick Delaunay45459742019-02-27 17:01:24 +0100473 sysconf_init();
474
Patrick Delaunay1f5118b2018-07-27 16:37:08 +0200475 if (IS_ENABLED(CONFIG_LED))
476 led_default_state();
477
Patrick Delaunayf8598d92018-03-12 10:46:18 +0100478 return 0;
479}
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100480
481int board_late_init(void)
482{
483#ifdef CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
484 const void *fdt_compat;
485 int fdt_compat_len;
486
487 fdt_compat = fdt_getprop(gd->fdt_blob, 0, "compatible",
488 &fdt_compat_len);
489 if (fdt_compat && fdt_compat_len) {
490 if (strncmp(fdt_compat, "st,", 3) != 0)
491 env_set("board_name", fdt_compat);
492 else
493 env_set("board_name", fdt_compat + 3);
494 }
495#endif
496
Patrice Chotard395f1292019-02-12 16:50:40 +0100497 /* for DK1/DK2 boards */
498 board_check_usb_power();
499
Patrick Delaunayb4ae34b2019-02-27 17:01:11 +0100500 return 0;
501}
Patrice Chotard395f1292019-02-12 16:50:40 +0100502
503void board_quiesce_devices(void)
504{
505 setup_led(LEDST_OFF);
506}