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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0+ */
Sanchayan Maitye7b860f2015-04-15 16:24:26 +05302/*
Marcel Ziswiler9f9ecdf2019-03-25 17:25:01 +01003 * Copyright 2015-2019 Toradex, Inc.
Sanchayan Maitye7b860f2015-04-15 16:24:26 +05304 *
Marcel Ziswilerb891d012016-11-16 17:49:23 +01005 * Configuration settings for the Toradex VF50/VF61 modules.
Sanchayan Maitye7b860f2015-04-15 16:24:26 +05306 *
7 * Based on vf610twr.h:
8 * Copyright 2013 Freescale Semiconductor, Inc.
Sanchayan Maitye7b860f2015-04-15 16:24:26 +05309 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <asm/arch/imx-regs.h>
Marcel Ziswilerc12e4152019-03-25 17:25:02 +010015#include <linux/sizes.h>
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053016
Stefan Agner06487fd2019-03-25 17:25:03 +010017#define MEM_LAYOUT_ENV_SETTINGS \
18 "bootm_size=0x10000000\0" \
19 "fdt_addr_r=0x82000000\0" \
Stefan Agner06487fd2019-03-25 17:25:03 +010020 "kernel_addr_r=0x81000000\0" \
21 "pxefile_addr_r=0x87100000\0" \
22 "ramdisk_addr_r=0x82100000\0" \
23 "scriptaddr=0x87000000\0"
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053024
Igor Opaniuk97c42752019-12-09 12:33:32 +020025#define UBOOT_UPDATE \
26 "update_uboot=nand erase.part u-boot && " \
27 "nand write ${loadaddr} u-boot ${filesize}\0" \
28
Stefan Agner06487fd2019-03-25 17:25:03 +010029#define UBI_BOOTCMD \
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053030 "ubiargs=ubi.mtd=ubi root=ubi0:rootfs rootfstype=ubifs " \
31 "ubi.fm_autoconvert=1\0" \
32 "ubiboot=run setup; " \
33 "setenv bootargs ${defargs} ${ubiargs} ${mtdparts} " \
Philippe Schenker05cc8352022-04-08 10:07:02 +020034 "${setupargs} ${vidargs} ${tdxargs}; echo Booting from NAND...; " \
Sanchayan Maity3ed82d62016-11-25 16:19:17 +053035 "ubi part ubi && " \
36 "ubi read ${kernel_addr_r} kernel && " \
37 "ubi read ${fdt_addr_r} dtb && " \
Sanchayan Maityfaf1e622016-12-02 14:28:27 +053038 "run fdt_fixup && bootz ${kernel_addr_r} - ${fdt_addr_r}\0" \
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053039
Stefan Agner06487fd2019-03-25 17:25:03 +010040#define BOOT_TARGET_DEVICES(func) \
41 func(MMC, mmc, 0) \
42 func(USB, usb, 0) \
43 func(DHCP, dhcp, na)
44#include <config_distro_bootcmd.h>
45#undef BOOTENV_RUN_NET_USB_START
46#define BOOTENV_RUN_NET_USB_START ""
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053047
Sanchayan Maitybba97cd2015-04-17 18:56:42 +053048#define DFU_ALT_NAND_INFO "vf-bcb part 0,1;u-boot part 0,2;ubi part 0,4"
49
Tom Rini0613c362022-12-04 10:03:50 -050050#define CFG_EXTRA_ENV_SETTINGS \
Stefan Agner06487fd2019-03-25 17:25:03 +010051 BOOTENV \
52 MEM_LAYOUT_ENV_SETTINGS \
Stefan Agner06487fd2019-03-25 17:25:03 +010053 UBI_BOOTCMD \
Igor Opaniuk97c42752019-12-09 12:33:32 +020054 UBOOT_UPDATE \
Igor Opaniuk1377a772022-04-13 11:33:27 +020055 "boot_script_dhcp=boot.scr\0" \
Stefan Agner06487fd2019-03-25 17:25:03 +010056 "console=ttyLP0\0" \
Stefan Agner389d6802019-03-25 17:25:07 +010057 "defargs=user_debug=30\0" \
Stefan Agner06487fd2019-03-25 17:25:03 +010058 "dfu_alt_info=" DFU_ALT_NAND_INFO "\0" \
59 "fdt_board=eval-v3\0" \
Stefan Agner06487fd2019-03-25 17:25:03 +010060 "fdt_fixup=;\0" \
Max Krummenacher1fd988a2020-06-16 22:20:05 +030061 "kernel_image=zImage\0" \
Stefan Agner06487fd2019-03-25 17:25:03 +010062 "setsdupdate=mmc rescan && set interface mmc && " \
63 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
64 "source ${loadaddr}\0" \
65 "setup=setenv setupargs console=tty1 console=${console}" \
66 ",${baudrate}n8 ${memargs}\0" \
67 "setupdate=run setsdupdate || run setusbupdate\0" \
68 "setusbupdate=usb start && set interface usb && " \
69 "fatload ${interface} 0:1 ${loadaddr} flash_blk.img && " \
70 "source ${loadaddr}\0" \
71 "splashpos=m,m\0" \
72 "video-mode=dcufb:640x480-16@60,monitor=lcd\0"
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053073
74/* Miscellaneous configurable options */
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053075
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053076/* Physical memory map */
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053077#define PHYS_SDRAM (0x80000000)
Marcel Ziswilerc12e4152019-03-25 17:25:02 +010078#define PHYS_SDRAM_SIZE (256 * SZ_1M)
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053079
Tom Riniaa6e94d2022-11-16 13:10:37 -050080#define CFG_SYS_SDRAM_BASE PHYS_SDRAM
Tom Rini65cc0e22022-11-16 13:10:41 -050081#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
82#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053083
Sanchayan Maitybba97cd2015-04-17 18:56:42 +053084/* USB Host Support */
Sanchayan Maitybba97cd2015-04-17 18:56:42 +053085
Sanchayan Maitybba97cd2015-04-17 18:56:42 +053086/* USB DFU */
Sanchayan Maitybba97cd2015-04-17 18:56:42 +053087
Sanchayan Maitye7b860f2015-04-15 16:24:26 +053088#endif /* __CONFIG_H */