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Troy Kisky0f740cb2013-10-10 15:28:03 -07001/*
2 * Copyright 2011, Marvell Semiconductor Inc.
3 *
4 * Licensed under the GPL-2 or later.
5 */
Marek Vasutf016f8c2014-02-06 02:43:45 +01006#ifndef __GADGET__CI_UDC_H__
7#define __GADGET__CI_UDC_H__
Troy Kisky0f740cb2013-10-10 15:28:03 -07008
9#define NUM_ENDPOINTS 6
10
Marek Vasutf016f8c2014-02-06 02:43:45 +010011struct ci_udc {
Troy Kisky0f740cb2013-10-10 15:28:03 -070012#define MICRO_8FRAME 0x8
13#define USBCMD_ITC(x) ((((x) > 0xff) ? 0xff : x) << 16)
14#define USBCMD_FS2 (1 << 15)
15#define USBCMD_RST (1 << 1)
16#define USBCMD_RUN (1)
17 u32 usbcmd; /* 0x140 */
18#define STS_SLI (1 << 8)
19#define STS_URI (1 << 6)
20#define STS_PCI (1 << 2)
21#define STS_UEI (1 << 1)
22#define STS_UI (1 << 0)
23 u32 usbsts; /* 0x144 */
24 u32 pad1[3];
25 u32 devaddr; /* 0x154 */
26 u32 epinitaddr; /* 0x158 */
27 u32 pad2[10];
28#define PTS_ENABLE 2
29#define PTS(x) (((x) & 0x3) << 30)
30#define PFSC (1 << 24)
31 u32 portsc; /* 0x184 */
32 u32 pad3[8];
33#define USBMODE_DEVICE 2
34 u32 usbmode; /* 0x1a8 */
35 u32 epstat; /* 0x1ac */
36#define EPT_TX(x) (1 << (((x) & 0xffff) + 16))
37#define EPT_RX(x) (1 << ((x) & 0xffff))
38 u32 epprime; /* 0x1b0 */
39 u32 epflush; /* 0x1b4 */
40 u32 pad4;
41 u32 epcomp; /* 0x1bc */
42#define CTRL_TXE (1 << 23)
43#define CTRL_TXR (1 << 22)
44#define CTRL_RXE (1 << 7)
45#define CTRL_RXR (1 << 6)
46#define CTRL_TXT_BULK (2 << 18)
47#define CTRL_RXT_BULK (2 << 2)
48 u32 epctrl[16]; /* 0x1c0 */
49};
50
Marek Vasutf016f8c2014-02-06 02:43:45 +010051struct ci_ep {
Troy Kisky0f740cb2013-10-10 15:28:03 -070052 struct usb_ep ep;
53 struct list_head queue;
54 const struct usb_endpoint_descriptor *desc;
55
56 struct usb_request req;
57 uint8_t *b_buf;
58 uint32_t b_len;
59 uint8_t b_fast[64] __aligned(ARCH_DMA_MINALIGN);
60};
61
Marek Vasutf016f8c2014-02-06 02:43:45 +010062struct ci_drv {
Troy Kisky0f740cb2013-10-10 15:28:03 -070063 struct usb_gadget gadget;
64 struct usb_gadget_driver *driver;
65 struct ehci_ctrl *ctrl;
66 struct ept_queue_head *epts;
67 struct ept_queue_item *items[2 * NUM_ENDPOINTS];
68 uint8_t *items_mem;
Marek Vasutf016f8c2014-02-06 02:43:45 +010069 struct ci_ep ep[NUM_ENDPOINTS];
Troy Kisky0f740cb2013-10-10 15:28:03 -070070};
71
72struct ept_queue_head {
73 unsigned config;
74 unsigned current; /* read-only */
75
76 unsigned next;
77 unsigned info;
78 unsigned page0;
79 unsigned page1;
80 unsigned page2;
81 unsigned page3;
82 unsigned page4;
83 unsigned reserved_0;
84
85 unsigned char setup_data[8];
86
87 unsigned reserved_1;
88 unsigned reserved_2;
89 unsigned reserved_3;
90 unsigned reserved_4;
91};
92
93#define CONFIG_MAX_PKT(n) ((n) << 16)
94#define CONFIG_ZLT (1 << 29) /* stop on zero-len xfer */
95#define CONFIG_IOS (1 << 15) /* IRQ on setup */
96
97struct ept_queue_item {
98 unsigned next;
99 unsigned info;
100 unsigned page0;
101 unsigned page1;
102 unsigned page2;
103 unsigned page3;
104 unsigned page4;
105 unsigned reserved;
106};
107
108#define TERMINATE 1
109#define INFO_BYTES(n) ((n) << 16)
110#define INFO_IOC (1 << 15)
111#define INFO_ACTIVE (1 << 7)
112#define INFO_HALTED (1 << 6)
113#define INFO_BUFFER_ERROR (1 << 5)
114#define INFO_TX_ERROR (1 << 3)
115#endif