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Stefano Babicf9c6fac2011-11-30 23:56:52 +00001/*
2 * Copyright (C) 2011
3 * Stefano Babic, DENX Software Engineering, sbabic@denx.de.
4 *
5 * Copyright (C) 2009 TechNexion Ltd.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Stefano Babicf9c6fac2011-11-30 23:56:52 +00008 */
9
10#ifndef __TAM3517_H
11#define __TAM3517_H
12
13/*
14 * High Level Configuration Options
15 */
16#define CONFIG_OMAP /* in a TI OMAP core */
Marek Vasut308252a2012-07-21 05:02:23 +000017#define CONFIG_OMAP_GPIO
Lokesh Vutla806d2792013-07-30 11:36:30 +053018#define CONFIG_OMAP_COMMON
Jeroen Hofstee457baf52014-07-28 23:34:42 +020019#define CONFIG_SYS_GENERIC_BOARD
Nishanth Menonc6f90e12015-03-09 17:12:08 -050020/* Common ARM Erratas */
21#define CONFIG_ARM_ERRATA_454179
22#define CONFIG_ARM_ERRATA_430973
23#define CONFIG_ARM_ERRATA_621766
Stefano Babicf9c6fac2011-11-30 23:56:52 +000024
25#define CONFIG_SYS_TEXT_BASE 0x80008000
26
27#define CONFIG_SYS_CACHELINE_SIZE 64
28
29#define CONFIG_EMIF4 /* The chip has EMIF4 controller */
30
31#include <asm/arch/cpu.h> /* get chip and board defs */
Nishanth Menon987ec582015-03-09 17:12:04 -050032#include <asm/arch/omap.h>
Stefano Babicf9c6fac2011-11-30 23:56:52 +000033
34/*
35 * Display CPU and Board information
36 */
37#define CONFIG_DISPLAY_CPUINFO
38#define CONFIG_DISPLAY_BOARDINFO
39
40/* Clock Defines */
41#define V_OSCK 26000000 /* Clock output from T2 */
42#define V_SCLK (V_OSCK >> 1)
43
Stefano Babicf9c6fac2011-11-30 23:56:52 +000044#define CONFIG_MISC_INIT_R
45
46#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
47#define CONFIG_SETUP_MEMORY_TAGS
48#define CONFIG_INITRD_TAG
49#define CONFIG_REVISION_TAG
50
51/*
52 * Size of malloc() pool
53 */
54#define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB sector */
55#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10) + \
56 2 * 1024 * 1024)
57/*
58 * DDR related
59 */
60#define CONFIG_OMAP3_MICRON_DDR /* Micron DDR */
61#define CONFIG_SYS_CS0_SIZE (256 * 1024 * 1024)
62
63/*
64 * Hardware drivers
65 */
66
67/*
68 * NS16550 Configuration
69 */
70#define CONFIG_SYS_NS16550
71#define CONFIG_SYS_NS16550_SERIAL
72#define CONFIG_SYS_NS16550_REG_SIZE (-4)
73#define CONFIG_SYS_NS16550_CLK 48000000 /* 48MHz (APLL96/2) */
74
75/*
76 * select serial console configuration
77 */
78#define CONFIG_CONS_INDEX 1
79#define CONFIG_SYS_NS16550_COM1 OMAP34XX_UART1
80#define CONFIG_SERIAL1 /* UART1 */
81
82/* allow to overwrite serial and ethaddr */
83#define CONFIG_ENV_OVERWRITE
84#define CONFIG_BAUDRATE 115200
85#define CONFIG_SYS_BAUDRATE_TABLE {4800, 9600, 19200, 38400, 57600,\
86 115200}
87#define CONFIG_MMC
88#define CONFIG_OMAP_HSMMC
89#define CONFIG_GENERIC_MMC
90#define CONFIG_DOS_PARTITION
91
92/* EHCI */
93#define CONFIG_OMAP3_GPIO_5
94#define CONFIG_USB_EHCI
95#define CONFIG_USB_EHCI_OMAP
Stefano Babic8c589d62012-02-07 23:28:58 +000096#define CONFIG_USB_ULPI
97#define CONFIG_USB_ULPI_VIEWPORT_OMAP
Stefano Babicf9c6fac2011-11-30 23:56:52 +000098#define CONFIG_OMAP_EHCI_PHY1_RESET_GPIO 25
99#define CONFIG_SYS_USB_EHCI_MAX_ROOT_PORTS 3
100#define CONFIG_USB_STORAGE
101
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000102/* commands to include */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000103#define CONFIG_CMD_CACHE
104#define CONFIG_CMD_DHCP
105#define CONFIG_CMD_EXT2 /* EXT2 Support */
106#define CONFIG_CMD_FAT /* FAT support */
107#define CONFIG_CMD_GPIO
108#define CONFIG_CMD_I2C /* I2C serial bus support */
109#define CONFIG_CMD_MII
110#define CONFIG_CMD_MMC /* MMC support */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000111#define CONFIG_CMD_NAND /* NAND support */
112#define CONFIG_CMD_PING
113#define CONFIG_CMD_USB
Stefano Babic8103c6f2012-08-29 01:21:59 +0000114#define CONFIG_CMD_EEPROM
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000115
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000116#define CONFIG_SYS_NO_FLASH
Heiko Schocher6789e842013-10-22 11:03:18 +0200117#define CONFIG_SYS_I2C
118#define CONFIG_SYS_OMAP24_I2C_SPEED 400000
119#define CONFIG_SYS_OMAP24_I2C_SLAVE 1
120#define CONFIG_SYS_I2C_OMAP34XX
Stefano Babic8103c6f2012-08-29 01:21:59 +0000121#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* base address */
122#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1 /* bytes of address */
123#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW 0x07
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000124
125/*
126 * Board NAND Info.
127 */
128#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
129 /* to access */
130 /* nand at CS0 */
131
132#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of */
133 /* NAND devices */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000134
135#define CONFIG_AUTO_COMPLETE
136
137/*
138 * Miscellaneous configurable options
139 */
140#define CONFIG_SYS_LONGHELP /* undef to save memory */
141#define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000142#define CONFIG_CMDLINE_EDITING
143#define CONFIG_AUTO_COMPLETE
144#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
145
146/* Print Buffer Size */
147#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
148 sizeof(CONFIG_SYS_PROMPT) + 16)
149#define CONFIG_SYS_MAXARGS 32 /* max number of command */
150 /* args */
151/* Boot Argument Buffer Size */
152#define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
153/* memtest works on */
154#define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0)
155#define CONFIG_SYS_MEMTEST_END (OMAP34XX_SDRC_CS0 + \
156 0x01F00000) /* 31MB */
157
158#define CONFIG_SYS_LOAD_ADDR (OMAP34XX_SDRC_CS0) /* default load */
159 /* address */
160
161/*
162 * AM3517 has 12 GP timers, they can be driven by the system clock
163 * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
164 * This rate is divided by a local divisor.
165 */
166#define CONFIG_SYS_TIMERBASE OMAP34XX_GPT2
167#define CONFIG_SYS_PTV 2 /* Divisor: 2^(PTV+1) => 8 */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000168
169/*
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000170 * Physical Memory Map
171 */
172#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
173#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000174#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
175
176/*
177 * FLASH and environment organization
178 */
179
180/* **** PISMO SUPPORT *** */
Jeroen Hofstee09700512014-05-31 17:08:30 +0200181#define CONFIG_NAND
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000182#define CONFIG_NAND_OMAP_GPMC
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000183#define CONFIG_ENV_IS_IN_NAND
184#define SMNAND_ENV_OFFSET 0x180000 /* environment starts here */
185
186/* Redundant Environment */
187#define CONFIG_SYS_ENV_SECT_SIZE (128 << 10) /* 128 KiB */
188#define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET
189#define CONFIG_ENV_ADDR SMNAND_ENV_OFFSET
190#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + \
191 2 * CONFIG_SYS_ENV_SECT_SIZE)
192#define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE
193
194#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
195#define CONFIG_SYS_INIT_RAM_ADDR 0x4020f800
196#define CONFIG_SYS_INIT_RAM_SIZE 0x800
197#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
198 CONFIG_SYS_INIT_RAM_SIZE - \
199 GENERATED_GBL_DATA_SIZE)
200
201/*
202 * ethernet support, EMAC
203 *
204 */
205#define CONFIG_DRIVER_TI_EMAC
206#define CONFIG_DRIVER_TI_EMAC_USE_RMII
207#define CONFIG_MII
208#define CONFIG_EMAC_MDIO_PHY_NUM 0
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000209#define CONFIG_BOOTP_DNS
210#define CONFIG_BOOTP_DNS2
211#define CONFIG_BOOTP_SEND_HOSTNAME
212#define CONFIG_NET_RETRY_COUNT 10
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000213
214/* Defines for SPL */
Tom Rini47f7bca2012-08-13 12:03:19 -0700215#define CONFIG_SPL_FRAMEWORK
Tom Rinid7cb93b2012-08-14 12:26:08 -0700216#define CONFIG_SPL_BOARD_INIT
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000217#define CONFIG_SPL_CONSOLE
218#define CONFIG_SPL_NAND_SIMPLE
Jeroen Hofstee8ad59c92013-12-21 18:03:09 +0100219#define CONFIG_SPL_NAND_SOFTECC
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000220#define CONFIG_SPL_NAND_WORKSPACE 0x8f07f000 /* below BSS */
221
222#define CONFIG_SPL_LIBCOMMON_SUPPORT
223#define CONFIG_SPL_LIBDISK_SUPPORT
224#define CONFIG_SPL_I2C_SUPPORT
225#define CONFIG_SPL_LIBGENERIC_SUPPORT
226#define CONFIG_SPL_SERIAL_SUPPORT
Marek Vasut16e41c82012-07-21 05:02:27 +0000227#define CONFIG_SPL_GPIO_SUPPORT
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000228#define CONFIG_SPL_POWER_SUPPORT
229#define CONFIG_SPL_NAND_SUPPORT
Scott Wood6f2f01b2012-09-20 19:09:07 -0500230#define CONFIG_SPL_NAND_BASE
231#define CONFIG_SPL_NAND_DRIVERS
232#define CONFIG_SPL_NAND_ECC
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000233#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
234
235#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
Tom Rinie0820cc2012-05-08 07:29:31 +0000236#define CONFIG_SPL_MAX_SIZE (54 * 1024) /* 8 KB for stack */
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000237
238#define CONFIG_SYS_SPL_MALLOC_START 0x8f000000
239#define CONFIG_SYS_SPL_MALLOC_SIZE 0x80000
240#define CONFIG_SPL_BSS_START_ADDR 0x8f080000 /* end of RAM */
241#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
242
243/* NAND boot config */
Stefano Babic55f1b392015-07-26 15:18:15 +0200244#define CONFIG_SYS_NAND_BUSWIDTH_16BIT
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000245#define CONFIG_SYS_NAND_PAGE_COUNT 64
246#define CONFIG_SYS_NAND_PAGE_SIZE 2048
247#define CONFIG_SYS_NAND_OOBSIZE 64
248#define CONFIG_SYS_NAND_BLOCK_SIZE (128 * 1024)
249#define CONFIG_SYS_NAND_5_ADDR_CYCLE
250#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
251#define CONFIG_SYS_NAND_ECCPOS {40, 41, 42, 43, 44, 45, 46, 47,\
252 48, 49, 50, 51, 52, 53, 54, 55,\
253 56, 57, 58, 59, 60, 61, 62, 63}
254#define CONFIG_SYS_NAND_ECCSIZE 256
255#define CONFIG_SYS_NAND_ECCBYTES 3
pekon gupta3f719062013-11-18 19:03:01 +0530256#define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_SW
Jeroen Hofstee817aa322015-05-30 10:11:25 +0200257#define CONFIG_NAND_OMAP_GPMC_PREFETCH
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000258
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000259#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
260
261#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
262#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x80000
263
264#define CONFIG_OF_LIBFDT
265#define CONFIG_FIT
266#define CONFIG_CMD_UBI
267#define CONFIG_CMD_UBIFS
268#define CONFIG_RBTREE
269#define CONFIG_LZO
270#define CONFIG_MTD_PARTITIONS
271#define CONFIG_MTD_DEVICE
272#define CONFIG_CMD_MTDPARTS
273
274/* Setup MTD for NAND on the SOM */
275#define MTDIDS_DEFAULT "nand0=omap2-nand.0"
276#define MTDPARTS_DEFAULT "mtdparts=omap2-nand.0:512k(MLO)," \
Stefano Babic1fdabed2012-02-07 23:29:34 +0000277 "1m(u-boot),256k(env1)," \
278 "256k(env2),6m(kernel),-(rootfs)"
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000279
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000280#define CONFIG_TAM3517_SETTINGS \
281 "netdev=eth0\0" \
282 "nandargs=setenv bootargs root=${nandroot} " \
283 "rootfstype=${nandrootfstype}\0" \
284 "nfsargs=setenv bootargs root=/dev/nfs rw " \
285 "nfsroot=${serverip}:${rootpath}\0" \
286 "ramargs=setenv bootargs root=/dev/ram rw\0" \
287 "addip_sta=setenv bootargs ${bootargs} " \
288 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \
289 ":${hostname}:${netdev}:off panic=1\0" \
290 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \
291 "addip=if test -n ${ipdyn};then run addip_dyn;" \
292 "else run addip_sta;fi\0" \
293 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \
294 "addtty=setenv bootargs ${bootargs}" \
295 " console=ttyO0,${baudrate}\0" \
296 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \
297 "loadaddr=82000000\0" \
298 "kernel_addr_r=82000000\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200299 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \
300 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000301 "flash_self=run ramargs addip addtty addmtd addmisc;" \
302 "bootm ${kernel_addr} ${ramdisk_addr}\0" \
303 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \
304 "bootm ${kernel_addr}\0" \
305 "nandboot=run nandargs addip addtty addmtd addmisc;" \
306 "nand read ${kernel_addr_r} kernel\0" \
307 "bootm ${kernel_addr_r}\0" \
308 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \
309 "run nfsargs addip addtty addmtd addmisc;" \
310 "bootm ${kernel_addr_r}\0" \
311 "net_self=if run net_self_load;then " \
312 "run ramargs addip addtty addmtd addmisc;" \
313 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \
314 "else echo Images not loades;fi\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200315 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.img\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000316 "load=tftp ${loadaddr} ${u-boot}\0" \
317 "loadmlo=tftp ${loadaddr} ${mlo}\0" \
Marek Vasut93ea89f2012-09-23 17:41:23 +0200318 "mlo=" __stringify(CONFIG_HOSTNAME) "/MLO\0" \
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000319 "uboot_addr=0x80000\0" \
320 "update=nandecc sw;nand erase ${uboot_addr} 100000;" \
321 "nand write ${loadaddr} ${uboot_addr} 80000\0" \
322 "updatemlo=nandecc hw;nand erase 0 20000;" \
323 "nand write ${loadaddr} 0 20000\0" \
324 "upd=if run load;then echo Updating u-boot;if run update;" \
325 "then echo U-Boot updated;" \
326 "else echo Error updating u-boot !;" \
327 "echo Board without bootloader !!;" \
328 "fi;" \
329 "else echo U-Boot not downloaded..exiting;fi\0" \
330
Stefano Babic8103c6f2012-08-29 01:21:59 +0000331
332/*
333 * this is common code for all TAM3517 boards.
334 * MAC address is stored from manufacturer in
335 * I2C EEPROM
336 */
337#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
Stefano Babic8103c6f2012-08-29 01:21:59 +0000338/*
339 * The I2C EEPROM on the TAM3517 contains
340 * mac address and production data
341 */
342struct tam3517_module_info {
343 char customer[48];
344 char product[48];
345
346 /*
347 * bit 0~47 : sequence number
348 * bit 48~55 : week of year, from 0.
349 * bit 56~63 : year
350 */
351 unsigned long long sequence_number;
352
353 /*
354 * bit 0~7 : revision fixed
355 * bit 8~15 : revision major
356 * bit 16~31 : TNxxx
357 */
358 unsigned int revision;
359 unsigned char eth_addr[4][8];
360 unsigned char _rev[100];
361};
362
Stefano Babic31f5b652012-11-23 05:19:25 +0000363#define TAM3517_READ_EEPROM(info, ret) \
364do { \
Heiko Schocher6789e842013-10-22 11:03:18 +0200365 i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE); \
Stefano Babic8103c6f2012-08-29 01:21:59 +0000366 if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, \
Stefano Babic31f5b652012-11-23 05:19:25 +0000367 (void *)info, sizeof(*info))) \
368 ret = 1; \
369 else \
370 ret = 0; \
371} while (0)
372
373#define TAM3517_READ_MAC_FROM_EEPROM(info) \
374do { \
375 char buf[80], ethname[20]; \
376 int i; \
Stefano Babic8103c6f2012-08-29 01:21:59 +0000377 memset(buf, 0, sizeof(buf)); \
Stefano Babic31f5b652012-11-23 05:19:25 +0000378 for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) { \
Stefano Babic8103c6f2012-08-29 01:21:59 +0000379 sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X", \
Stefano Babic31f5b652012-11-23 05:19:25 +0000380 (info)->eth_addr[i][5], \
381 (info)->eth_addr[i][4], \
382 (info)->eth_addr[i][3], \
383 (info)->eth_addr[i][2], \
384 (info)->eth_addr[i][1], \
385 (info)->eth_addr[i][0]); \
Stefano Babic8103c6f2012-08-29 01:21:59 +0000386 \
387 if (i) \
388 sprintf(ethname, "eth%daddr", i); \
389 else \
390 sprintf(ethname, "ethaddr"); \
391 printf("Setting %s from EEPROM with %s\n", ethname, buf);\
392 setenv(ethname, buf); \
393 } \
394} while (0)
Stefano Babic31f5b652012-11-23 05:19:25 +0000395
396/* The following macros are taken from Technexion's documentation */
397#define TAM3517_sequence_number(info) \
398 ((info)->sequence_number % 0x1000000000000LL)
399#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
400#define TAM3517_year(info) ((info)->sequence_number >> 56)
401#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
402#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
403#define TAM3517_revision_tn(info) ((info)->revision >> 16)
404
405#define TAM3517_PRINT_SOM_INFO(info) \
406do { \
407 printf("Vendor:%s\n", (info)->customer); \
408 printf("SOM: %s\n", (info)->product); \
409 printf("SeqNr: %02llu%02llu%012llu\n", \
410 TAM3517_year(info), \
411 TAM3517_week_of_year(info), \
412 TAM3517_sequence_number(info)); \
413 printf("Rev: TN%u %u.%u\n", \
414 TAM3517_revision_tn(info), \
415 TAM3517_revision_major(info), \
416 TAM3517_revision_fixed(info)); \
417} while (0)
418
Stefano Babic8103c6f2012-08-29 01:21:59 +0000419#endif
420
Stefano Babicf9c6fac2011-11-30 23:56:52 +0000421#endif /* __TAM3517_H */