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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / f0600af212301ec121ba6a4afc0a91b6b21a354e / . / arch / arm / dts / exynos5250-spring.dts
blob: 76d5323dc314ab7aedbcd910995fdb09f9aa1345 [file] [log] [blame]
Simon Glassd1de41d2015-08-03 08:19:37 -0600[diff] [blame]1/*
2 * Google Spring board device tree source
3 *
4 * Copyright (c) 2013 Google, Inc
5 * Copyright (c) 2014 SUSE LINUX Products GmbH
6 *
7 * SPDX-License-Identifier: GPL-2.0
8 */
9
10/dts-v1/;
11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/interrupt-controller/irq.h>
13#include <dt-bindings/input/input.h>
14#include "exynos5250.dtsi"
15
16/ {
17 model = "Google Spring";
18 compatible = "google,spring", "samsung,exynos5250", "samsung,exynos5";
19
20 aliases {
21 i2c0 = "/i2c@12C60000";
22 i2c1 = "/i2c@12C70000";
23 i2c2 = "/i2c@12C80000";
24 i2c3 = "/i2c@12C90000";
25 i2c4 = "/i2c@12CA0000";
26 i2c5 = "/i2c@12CB0000";
27 i2c6 = "/i2c@12CC0000";
28 i2c7 = "/i2c@12CD0000";
29 i2c104 = &cros_ec_ldo_tunnel;
30 spi0 = "/spi@12d20000";
31 spi1 = "/spi@12d30000";
32 spi2 = "/spi@12d40000";
33 spi3 = "/spi@131a0000";
34 spi4 = "/spi@131b0000";
35 mmc0 = "/mmc@12000000";
36 serial0 = "/serial@12C30000";
37 console = "/serial@12C30000";
38 i2s = "/sound@3830000";
39 };
40
41 memory {
42 reg = <0x40000000 0x80000000>;
43 };
44
45 flash@0 {
46 spl { /* spl size override */
47 size = <0x8000>;
48 };
49 };
50
51 chosen {
52 bootargs = "console=tty1";
53 stdout-path = "serial3:115200n8";
54 };
55
56 board-rev {
57 compatible = "google,board-revision";
58 google,board-rev-gpios = <&gpy4 0 0>, <&gpy4 1 0>,
59 <&gpy4 2 0>;
60 };
61
62 mmc@12200000 {
63 samsung,bus-width = <8>;
64 samsung,timing = <1 3 3>;
65 samsung,removable = <0>;
66 };
67
68 mmc@12210000 {
69 status = "disabled";
70 };
71
72 mmc@12220000 {
73 /* MMC2 pins are used as GPIO for eDP bridge */
74 status = "disabled";
75 };
76
77 mmc@12230000 {
78 status = "disabled";
79 };
80
81 ehci@12110000 {
82 samsung,vbus-gpio = <&gpx1 1 GPIO_ACTIVE_HIGH>;
83 status = "okay";
84 };
85
86 xhci@12000000 {
87 samsung,vbus-gpio = <&gpx2 7 GPIO_ACTIVE_HIGH>;
88 };
89
90 spi@12d30000 {
91 spi-max-frequency = <50000000>;
92 firmware_storage_spi: flash@0 {
93 compatible = "spi-flash";
94 reg = <0>;
95 };
96 };
97
98 tmu@10060000 {
99 samsung,min-temp = <25>;
100 samsung,max-temp = <125>;
101 samsung,start-warning = <95>;
102 samsung,start-tripping = <105>;
103 samsung,hw-tripping = <110>;
104 samsung,efuse-min-value = <40>;
105 samsung,efuse-value = <55>;
106 samsung,efuse-max-value = <100>;
107 samsung,slope = <274761730>;
108 samsung,dc-value = <25>;
109 };
110
111 fimd@14400000 {
112 samsung,vl-freq = <60>;
113 samsung,vl-col = <1366>;
114 samsung,vl-row = <768>;
115 samsung,vl-width = <1366>;
116 samsung,vl-height = <768>;
117
118 samsung,vl-clkp;
119 samsung,vl-dp;
120 samsung,vl-hsp;
121 samsung,vl-vsp;
122
123 samsung,vl-bpix = <4>;
124
125 samsung,vl-hspw = <32>;
126 samsung,vl-hbpd = <80>;
127 samsung,vl-hfpd = <48>;
128 samsung,vl-vspw = <5>;
129 samsung,vl-vbpd = <14>;
130 samsung,vl-vfpd = <3>;
131 samsung,vl-cmd-allow-len = <0xf>;
132
133 samsung,winid = <0>;
134 samsung,interface-mode = <1>;
135 samsung,dp-enabled = <1>;
136 samsung,dual-lcd-enabled = <0>;
137 };
138
139 dp@145b0000 {
140 samsung,lt-status = <0>;
141
142 samsung,master-mode = <0>;
143 samsung,bist-mode = <0>;
144 samsung,bist-pattern = <0>;
145 samsung,h-sync-polarity = <0>;
146 samsung,v-sync-polarity = <0>;
147 samsung,interlaced = <0>;
148 samsung,color-space = <0>;
149 samsung,dynamic-range = <0>;
150 samsung,ycbcr-coeff = <0>;
151 samsung,color-depth = <1>;
152 };
153};
154
155&i2c_0 {
156 status = "okay";
157 samsung,i2c-sda-delay = <100>;
158 samsung,i2c-max-bus-freq = <378000>;
159
160 s5m8767-pmic@66 {
161 compatible = "samsung,s5m8767-pmic";
162 reg = <0x66>;
163 interrupt-parent = <&gpx3>;
164 wakeup-source;
165
166 s5m8767,pmic-buck-dvs-gpios = <&gpd1 0 GPIO_ACTIVE_LOW>, /* DVS1 */
167 <&gpd1 1 GPIO_ACTIVE_LOW>, /* DVS2 */
168 <&gpd1 2 GPIO_ACTIVE_LOW>; /* DVS3 */
169
170 s5m8767,pmic-buck-ds-gpios = <&gpx2 3 GPIO_ACTIVE_LOW>, /* SET1 */
171 <&gpx2 4 GPIO_ACTIVE_LOW>, /* SET2 */
172 <&gpx2 5 GPIO_ACTIVE_LOW>; /* SET3 */
173
174 /*
175 * The following arrays of DVS voltages are not used, since we are
176 * not using GPIOs to control PMIC bucks, but they must be defined
177 * to please the driver.
178 */
179 s5m8767,pmic-buck2-dvs-voltage = <1350000>, <1300000>,
180 <1250000>, <1200000>,
181 <1150000>, <1100000>,
182 <1000000>, <950000>;
183
184 s5m8767,pmic-buck3-dvs-voltage = <1100000>, <1100000>,
185 <1100000>, <1100000>,
186 <1000000>, <1000000>,
187 <1000000>, <1000000>;
188
189 s5m8767,pmic-buck4-dvs-voltage = <1200000>, <1200000>,
190 <1200000>, <1200000>,
191 <1200000>, <1200000>,
192 <1200000>, <1200000>;
193
194 clocks {
195 compatible = "samsung,s5m8767-clk";
196 #clock-cells = <1>;
197 clock-output-names = "en32khz_ap",
198 "en32khz_cp",
199 "en32khz_bt";
200 };
201
202 regulators {
203 ldo4_reg: LDO4 {
204 regulator-name = "P1.0V_LDO_OUT4";
205 regulator-min-microvolt = <1000000>;
206 regulator-max-microvolt = <1000000>;
207 regulator-always-on;
208 op_mode = <0>;
209 };
210
211 ldo5_reg: LDO5 {
212 regulator-name = "P1.8V_LDO_OUT5";
213 regulator-min-microvolt = <1800000>;
214 regulator-max-microvolt = <1800000>;
215 regulator-always-on;
216 op_mode = <0>;
217 };
218
219 ldo6_reg: LDO6 {
220 regulator-name = "vdd_mydp";
221 regulator-min-microvolt = <1200000>;
222 regulator-max-microvolt = <1200000>;
223 regulator-always-on;
224 op_mode = <3>;
225 };
226
227 ldo7_reg: LDO7 {
228 regulator-name = "P1.1V_LDO_OUT7";
229 regulator-min-microvolt = <1100000>;
230 regulator-max-microvolt = <1100000>;
231 regulator-always-on;
232 op_mode = <3>;
233 };
234
235 ldo8_reg: LDO8 {
236 regulator-name = "P1.0V_LDO_OUT8";
237 regulator-min-microvolt = <1000000>;
238 regulator-max-microvolt = <1000000>;
239 regulator-always-on;
240 op_mode = <3>;
241 };
242
243 ldo10_reg: LDO10 {
244 regulator-name = "P1.8V_LDO_OUT10";
245 regulator-min-microvolt = <1800000>;
246 regulator-max-microvolt = <1800000>;
247 regulator-always-on;
248 op_mode = <3>;
249 };
250
251 ldo11_reg: LDO11 {
252 regulator-name = "P1.8V_LDO_OUT11";
253 regulator-min-microvolt = <1800000>;
254 regulator-max-microvolt = <1800000>;
255 regulator-always-on;
256 op_mode = <0>;
257 };
258
259 ldo12_reg: LDO12 {
260 regulator-name = "P3.0V_LDO_OUT12";
261 regulator-min-microvolt = <3000000>;
262 regulator-max-microvolt = <3000000>;
263 regulator-always-on;
264 op_mode = <3>;
265 };
266
267 ldo13_reg: LDO13 {
268 regulator-name = "P1.8V_LDO_OUT13";
269 regulator-min-microvolt = <1800000>;
270 regulator-max-microvolt = <1800000>;
271 regulator-always-on;
272 op_mode = <0>;
273 };
274
275 ldo14_reg: LDO14 {
276 regulator-name = "P1.8V_LDO_OUT14";
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279 regulator-always-on;
280 op_mode = <3>;
281 };
282
283 ldo15_reg: LDO15 {
284 regulator-name = "P1.0V_LDO_OUT15";
285 regulator-min-microvolt = <1000000>;
286 regulator-max-microvolt = <1000000>;
287 regulator-always-on;
288 op_mode = <3>;
289 };
290
291 ldo16_reg: LDO16 {
292 regulator-name = "P1.8V_LDO_OUT16";
293 regulator-min-microvolt = <1800000>;
294 regulator-max-microvolt = <1800000>;
295 regulator-always-on;
296 op_mode = <3>;
297 };
298
299 ldo17_reg: LDO17 {
300 regulator-name = "P1.2V_LDO_OUT17";
301 regulator-min-microvolt = <1200000>;
302 regulator-max-microvolt = <1200000>;
303 regulator-always-on;
304 op_mode = <0>;
305 };
306
307 ldo25_reg: LDO25 {
308 regulator-name = "vdd_bridge";
309 regulator-min-microvolt = <1200000>;
310 regulator-max-microvolt = <1200000>;
311 regulator-always-on;
312 op_mode = <1>;
313 };
314
315 buck1_reg: BUCK1 {
316 regulator-name = "vdd_mif";
317 regulator-min-microvolt = <950000>;
318 regulator-max-microvolt = <1300000>;
319 regulator-always-on;
320 regulator-boot-on;
321 op_mode = <3>;
322 };
323
324 buck2_reg: BUCK2 {
325 regulator-name = "vdd_arm";
326 regulator-min-microvolt = <850000>;
327 regulator-max-microvolt = <1350000>;
328 regulator-always-on;
329 regulator-boot-on;
330 op_mode = <3>;
331 };
332
333 buck3_reg: BUCK3 {
334 regulator-name = "vdd_int";
335 regulator-min-microvolt = <900000>;
336 regulator-max-microvolt = <1200000>;
337 regulator-always-on;
338 regulator-boot-on;
339 op_mode = <3>;
340 };
341
342 buck4_reg: BUCK4 {
343 regulator-name = "vdd_g3d";
344 regulator-min-microvolt = <850000>;
345 regulator-max-microvolt = <1300000>;
346 regulator-boot-on;
347 op_mode = <3>;
348 };
349
350 buck5_reg: BUCK5 {
351 regulator-name = "P1.8V_BUCK_OUT5";
352 regulator-min-microvolt = <1800000>;
353 regulator-max-microvolt = <1800000>;
354 regulator-always-on;
355 regulator-boot-on;
356 op_mode = <1>;
357 };
358
359 buck6_reg: BUCK6 {
360 regulator-name = "P1.2V_BUCK_OUT6";
361 regulator-min-microvolt = <2050000>;
362 regulator-max-microvolt = <2050000>;
363 regulator-always-on;
364 regulator-boot-on;
365 op_mode = <0>;
366 };
367
368 buck9_reg: BUCK9 {
369 regulator-name = "vdd_ummc";
370 regulator-min-microvolt = <950000>;
371 regulator-max-microvolt = <3000000>;
372 regulator-always-on;
373 regulator-boot-on;
374 op_mode = <3>;
375 };
376 };
377 };
378};
379
380&i2c_1 {
381 status = "okay";
382 samsung,i2c-sda-delay = <100>;
383 samsung,i2c-max-bus-freq = <378000>;
384};
385
386&i2c_2 {
387 status = "okay";
388 samsung,i2c-sda-delay = <100>;
389 samsung,i2c-max-bus-freq = <66000>;
390};
391
392&i2c_3 {
393 status = "okay";
394 samsung,i2c-sda-delay = <100>;
395 samsung,i2c-max-bus-freq = <66000>;
396};
397
398&i2c_4 {
399 status = "okay";
400 samsung,i2c-sda-delay = <100>;
401 samsung,i2c-max-bus-freq = <66000>;
402 clock-frequency = <66000>;
403
404 cros_ec: embedded-controller {
405 compatible = "google,cros-ec-i2c";
406 reg = <0x1e>;
407 interrupts = <6 IRQ_TYPE_NONE>;
408 interrupt-parent = <&gpx1>;
409 wakeup-source;
410 u-boot,i2c-offset-len = <0>;
411 ec-interrupt = <&gpx1 6 GPIO_ACTIVE_LOW>;
412 cros_ec_ldo_tunnel: cros-ec-ldo-tunnel {
413 compatible = "google,cros-ec-ldo-tunnel";
414 #address-cells = <1>;
415 #size-cells = <0>;
416 power-regulator {
417 compatible = "ti,tps65090";
418 reg = <0x48>;
419
420 regulators {
421 dcdc1 {
422 ti,enable-ext-control;
423 };
424 dcdc2 {
425 ti,enable-ext-control;
426 };
427 dcdc3 {
428 ti,enable-ext-control;
429 };
430 fet1: fet1 {
431 regulator-name = "vcd_led";
432 ti,overcurrent-wait = <3>;
433 };
434 tps65090_fet2: fet2 {
435 regulator-name = "video_mid";
436 regulator-always-on;
437 ti,overcurrent-wait = <3>;
438 };
439 fet3 {
440 regulator-name = "wwan_r";
441 regulator-always-on;
442 ti,overcurrent-wait = <3>;
443 };
444 fet4 {
445 regulator-name = "sdcard";
446 ti,overcurrent-wait = <3>;
447 };
448 fet5 {
449 regulator-name = "camout";
450 regulator-always-on;
451 ti,overcurrent-wait = <3>;
452 };
453 fet6: fet6 {
454 regulator-name = "lcd_vdd";
455 ti,overcurrent-wait = <3>;
456 };
457 tps65090_fet7: fet7 {
458 regulator-name = "video_mid_1a";
459 regulator-always-on;
460 ti,overcurrent-wait = <3>;
461 };
462 ldo1 {
463 };
464 ldo2 {
465 };
466 };
467 };
468 };
469 };
470};
471
472&i2c_5 {
473 status = "okay";
474 samsung,i2c-sda-delay = <100>;
475 samsung,i2c-max-bus-freq = <66000>;
476};
477
478&i2c_7 {
479 status = "okay";
480 samsung,i2c-sda-delay = <100>;
481 samsung,i2c-max-bus-freq = <66000>;
482
483 ps8622-bridge@8 {
484 compatible = "parade,ps8622";
485 reg = <0x8>;
486 sleep-gpios = <&gpc3 6 GPIO_ACTIVE_LOW>;
487 reset-gpios = <&gpc3 1 GPIO_ACTIVE_LOW>;
488 hotplug-gpios = <&gpc3 0 GPIO_ACTIVE_HIGH>;
489 power-supply = <&ldo6_reg>;
490 parade,regs = /bits/ 8 <
491 0x02 0xa1 0x01 /* HPD low */
492 /*
493 * SW setting: [1:0] SW output 1.2V voltage is
494 * lower to 96%
495 */
496 0x04 0x14 0x01
497 /* RCO SS setting: [5:4] = b01 0.5%, b10 1%, b11 1.5% */
498 0x04 0xe3 0x20
499 0x04 0xe2 0x80 /* [7] RCO SS enable */
500 /*
501 * RPHY Setting: [3:2] CDR tune wait cycle before
502 * measure for fine tune b00: 1us,
503 * 01: 0.5us, 10:2us, 11:4us
504 */
505 0x04 0x8a 0x0c
506 0x04 0x89 0x08 /* [3] RFD always on */
507 /*
508 * CTN lock in/out: 20000ppm/80000ppm. Lock out 2 times
509 */
510 0x04 0x71 0x2d
511 /* 2.7G CDR settings */
512 0x04 0x7d 0x07 /* NOF=40LSB for HBR CDR setting */
513 0x04 0x7b 0x00 /* [1:0] Fmin=+4bands */
514 0x04 0x7a 0xfd /* [7:5] DCO_FTRNG=+-40% */
515 /*
516 * 1.62G CDR settings:
517 * [5:2]NOF=64LSB [1:0]DCO scale is 2/5
518 */
519 0x04 0xc0 0x12
520 0x04 0xc1 0x92 /* Gitune=-37% */
521 0x04 0xc2 0x1c /* Fbstep=100% */
522 0x04 0x32 0x80 /* [7] LOS signal disable */
523 /* RPIO Setting */
524 /* [7:4] LVDS driver bias current 75% (250mV swing) */
525 0x04 0x00 0xb0
526 /* [7:6] Right-bar GPIO output strength is 8mA */
527 0x04 0x15 0x40
528 /* EQ Training State Machine Setting */
529 0x04 0x54 0x10 /* RCO calibration start */
530 /* [4:0] MAX_LANE_COUNT set to one lane */
531 0x01 0x02 0x81
532 /* [4:0] LANE_COUNT_SET set to one lane */
533 0x01 0x21 0x81
534 0x00 0x52 0x20
535 0x00 0xf1 0x03 /* HPD CP toggle enable */
536 0x00 0x62 0x41
537 /* Counter number add 1ms counter delay */
538 0x00 0xf6 0x01
539 /*
540 * [6]PWM function control by DPCD0040f[7], default
541 * is PWM block always works
542 */
543 0x00 0x77 0x06
544 0x00 0x4c 0x04
545 /*
546 * 04h Adjust VTotal tolerance to fix the 30Hz no-
547 * display issue
548 * DPCD00400='h00 Parade OUI = 'h001cf8
549 */
550 0x01 0xc0 0x00
551 0x01 0xc1 0x1c /* DPCD00401='h1c */
552 0x01 0xc2 0xf8 /* DPCD00402='hf8 */
553 /* DPCD403~408 = ASCII code D2SLV5='h4432534c5635 */
554 0x01 0xc3 0x44
555 0x01 0xc4 0x32 /* DPCD404 */
556 0x01 0xc5 0x53 /* DPCD405 */
557 0x01 0xc6 0x4c /* DPCD406 */
558 0x01 0xc7 0x56 /* DPCD407 */
559 0x01 0xc8 0x35 /* DPCD408 */
560 /* DPCD40A Initial Code major revision '01' */
561 0x01 0xca 0x01
562 /* DPCD40B Initial Code minor revision '05' */
563 0x01 0xcb 0x05
564 0x01 0xa5 0xa0 /* DPCD720, Select internal PWM */
565 /*
566 * 0xff for 100% PWM of brightness, 0h for 0% brightness
567 */
568 0x01 0xa7 0x00
569 /*
570 * Set LVDS output as 6bit-VESA mapping, single LVDS
571 * channel
572 */
573 0x01 0xcc 0x13
574 0x02 0xb1 0x20 /* Enable SSC set by register */
575 /* Set SSC enabled and +/-1% central spreading */
576 0x04 0x10 0x16
577 0x04 0x59 0x60 /* MPU Clock source: LC => RCO */
578 0x04 0x54 0x14 /* LC -> RCO */
579 0x02 0xa1 0x91>; /* HPD high */
580 };
581
582 soundcodec@20 {
583 reg = <0x20>;
584 compatible = "maxim,max98088-codec";
585 };
586};
587
588#include "cros-ec-keyboard.dtsi"