Horatiu Vultur | c75c908 | 2019-01-12 18:57:00 +0100 | [diff] [blame] | 1 | // SPDX-License-Identifier: (GPL-2.0+ OR MIT) |
| 2 | /* |
| 3 | * Copyright (c) 2018 Microsemi Corporation |
| 4 | */ |
| 5 | |
| 6 | #include <common.h> |
Simon Glass | 4d72caa | 2020-05-10 11:40:01 -0600 | [diff] [blame] | 7 | #include <image.h> |
Simon Glass | 5255932 | 2019-11-14 12:57:46 -0700 | [diff] [blame] | 8 | #include <init.h> |
Horatiu Vultur | c75c908 | 2019-01-12 18:57:00 +0100 | [diff] [blame] | 9 | #include <asm/io.h> |
| 10 | #include <led.h> |
Horatiu Vultur | 6aa50ae | 2019-04-03 19:54:46 +0200 | [diff] [blame] | 11 | #include <miiphy.h> |
Simon Glass | c05ed00 | 2020-05-10 11:40:11 -0600 | [diff] [blame] | 12 | #include <linux/delay.h> |
Horatiu Vultur | c75c908 | 2019-01-12 18:57:00 +0100 | [diff] [blame] | 13 | |
| 14 | enum { |
| 15 | BOARD_TYPE_PCB110 = 0xAABBCE00, |
| 16 | BOARD_TYPE_PCB111, |
| 17 | BOARD_TYPE_PCB112, |
| 18 | }; |
| 19 | |
| 20 | int board_early_init_r(void) |
| 21 | { |
| 22 | /* Prepare SPI controller to be used in master mode */ |
| 23 | writel(0, BASE_CFG + ICPU_SW_MODE); |
| 24 | clrsetbits_le32(BASE_CFG + ICPU_GENERAL_CTRL, |
| 25 | ICPU_GENERAL_CTRL_IF_SI_OWNER_M, |
| 26 | ICPU_GENERAL_CTRL_IF_SI_OWNER(2)); |
| 27 | |
| 28 | /* Address of boot parameters */ |
| 29 | gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE; |
| 30 | |
| 31 | /* LED setup */ |
| 32 | if (IS_ENABLED(CONFIG_LED)) |
| 33 | led_default_state(); |
| 34 | |
| 35 | return 0; |
| 36 | } |
| 37 | |
| 38 | static void vcoreiii_gpio_set_alternate(int gpio, int mode) |
| 39 | { |
| 40 | u32 mask; |
| 41 | u32 val0, val1; |
| 42 | void __iomem *reg0, *reg1; |
| 43 | |
| 44 | if (gpio < 32) { |
| 45 | mask = BIT(gpio); |
| 46 | reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(0); |
| 47 | reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT(1); |
| 48 | } else { |
| 49 | gpio -= 32; |
| 50 | mask = BIT(gpio); |
| 51 | reg0 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(0); |
| 52 | reg1 = BASE_DEVCPU_GCB + GPIO_GPIO_ALT1(1); |
| 53 | } |
| 54 | val0 = readl(reg0); |
| 55 | val1 = readl(reg1); |
| 56 | if (mode == 1) { |
| 57 | writel(val0 | mask, reg0); |
| 58 | writel(val1 & ~mask, reg1); |
| 59 | } else if (mode == 2) { |
| 60 | writel(val0 & ~mask, reg0); |
| 61 | writel(val1 | mask, reg1); |
| 62 | } else if (mode == 3) { |
| 63 | writel(val0 | mask, reg0); |
| 64 | writel(val1 | mask, reg1); |
| 65 | } else { |
| 66 | writel(val0 & ~mask, reg0); |
| 67 | writel(val1 & ~mask, reg1); |
| 68 | } |
| 69 | } |
| 70 | |
Horatiu Vultur | 6aa50ae | 2019-04-03 19:54:46 +0200 | [diff] [blame] | 71 | int board_phy_config(struct phy_device *phydev) |
| 72 | { |
| 73 | if (gd->board_type == BOARD_TYPE_PCB110 || |
| 74 | gd->board_type == BOARD_TYPE_PCB112) { |
| 75 | phy_write(phydev, 0, 31, 0x10); |
| 76 | phy_write(phydev, 0, 18, 0x80F0); |
| 77 | while (phy_read(phydev, 0, 18) & 0x8000) |
| 78 | ; |
| 79 | phy_write(phydev, 0, 31, 0); |
| 80 | } |
| 81 | if (gd->board_type == BOARD_TYPE_PCB111) { |
| 82 | phy_write(phydev, 0, 31, 0x10); |
| 83 | phy_write(phydev, 0, 18, 0x80A0); |
| 84 | while (phy_read(phydev, 0, 18) & 0x8000) |
| 85 | ; |
| 86 | phy_write(phydev, 0, 14, 0x800); |
| 87 | phy_write(phydev, 0, 31, 0); |
| 88 | } |
| 89 | |
| 90 | return 0; |
| 91 | } |
| 92 | |
Horatiu Vultur | 45988b1 | 2019-01-29 10:50:16 +0100 | [diff] [blame] | 93 | void board_debug_uart_init(void) |
| 94 | { |
| 95 | /* too early for the pinctrl driver, so configure the UART pins here */ |
| 96 | vcoreiii_gpio_set_alternate(10, 1); |
| 97 | vcoreiii_gpio_set_alternate(11, 1); |
| 98 | } |
| 99 | |
Horatiu Vultur | c75c908 | 2019-01-12 18:57:00 +0100 | [diff] [blame] | 100 | static void do_board_detect(void) |
| 101 | { |
| 102 | int i; |
| 103 | u16 pval; |
| 104 | |
| 105 | /* MIIM 1 + 2 MDC/MDIO */ |
| 106 | for (i = 56; i < 60; i++) |
| 107 | vcoreiii_gpio_set_alternate(i, 1); |
| 108 | |
Horatiu Vultur | 78b5431 | 2019-01-29 10:58:34 +0100 | [diff] [blame] | 109 | /* small delay for settling the pins */ |
| 110 | mdelay(30); |
| 111 | |
Horatiu Vultur | c75c908 | 2019-01-12 18:57:00 +0100 | [diff] [blame] | 112 | if (mscc_phy_rd(0, 0x10, 0x3, &pval) == 0 && |
| 113 | ((pval >> 4) & 0x3F) == 0x3c) { |
| 114 | gd->board_type = BOARD_TYPE_PCB112; /* Serval2-NID */ |
| 115 | } else if (mscc_phy_rd(1, 0x0, 0x3, &pval) == 0 && |
| 116 | ((pval >> 4) & 0x3F) == 0x3c) { |
| 117 | gd->board_type = BOARD_TYPE_PCB110; /* Jr2-24 */ |
| 118 | } else { |
| 119 | /* Fall-back */ |
| 120 | gd->board_type = BOARD_TYPE_PCB111; /* Jr2-48 */ |
| 121 | } |
| 122 | } |
| 123 | |
| 124 | #if defined(CONFIG_MULTI_DTB_FIT) |
| 125 | int board_fit_config_name_match(const char *name) |
| 126 | { |
| 127 | if (gd->board_type == BOARD_TYPE_PCB110 && |
| 128 | strcmp(name, "jr2_pcb110") == 0) |
| 129 | return 0; |
| 130 | |
| 131 | if (gd->board_type == BOARD_TYPE_PCB111 && |
| 132 | strcmp(name, "jr2_pcb111") == 0) |
| 133 | return 0; |
| 134 | |
| 135 | if (gd->board_type == BOARD_TYPE_PCB112 && |
| 136 | strcmp(name, "serval2_pcb112") == 0) |
| 137 | return 0; |
| 138 | |
| 139 | return -1; |
| 140 | } |
| 141 | #endif |
| 142 | |
| 143 | #if defined(CONFIG_DTB_RESELECT) |
| 144 | int embedded_dtb_select(void) |
| 145 | { |
| 146 | do_board_detect(); |
| 147 | fdtdec_setup(); |
| 148 | |
| 149 | return 0; |
| 150 | } |
| 151 | #endif |