blob: 9690757109ecbea82939ec26b5d3af71b5670ee7 [file] [log] [blame]
Bin Menga65b25d2015-05-07 21:34:08 +08001/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/*
8 * board/config.h - configuration options, board specific
9 */
10
11#ifndef __CONFIG_H
12#define __CONFIG_H
13
14#include <configs/x86-common.h>
15
16#define CONFIG_SYS_MONITOR_LEN (1 << 20)
17
Bin Mengb6ff6ce2015-11-12 05:33:06 -080018#define CONFIG_STD_DEVICES_SETTINGS "stdin=serial,i8042-kbd\0" \
Bin Mengfcda8c32016-10-09 04:14:13 -070019 "stdout=serial,vidconsole\0" \
20 "stderr=serial,vidconsole\0"
Bin Menga65b25d2015-05-07 21:34:08 +080021
Bin Meng2aa3a7f2015-05-16 09:33:19 +080022/*
23 * ATA/SATA support for QEMU x86 targets
24 * - Only legacy IDE controller is supported for QEMU '-M pc' target
25 * - AHCI controller is supported for QEMU '-M q35' target
26 *
27 * Default configuraion is to support the QEMU default x86 target
Simon Glassfc843a02017-05-17 03:25:30 -060028 * Undefine CONFIG_IDE to support q35 target
Bin Meng2aa3a7f2015-05-16 09:33:19 +080029 */
Simon Glassfc843a02017-05-17 03:25:30 -060030#ifdef CONFIG_IDE
Bin Meng2aa3a7f2015-05-16 09:33:19 +080031#define CONFIG_SYS_IDE_MAXBUS 2
32#define CONFIG_SYS_IDE_MAXDEVICE 4
33#define CONFIG_SYS_ATA_BASE_ADDR 0
34#define CONFIG_SYS_ATA_DATA_OFFSET 0
35#define CONFIG_SYS_ATA_REG_OFFSET 0
36#define CONFIG_SYS_ATA_ALT_OFFSET 0
37#define CONFIG_SYS_ATA_IDE0_OFFSET 0x1f0
38#define CONFIG_SYS_ATA_IDE1_OFFSET 0x170
39#define CONFIG_ATAPI
40
41#undef CONFIG_SCSI_AHCI
Bin Meng2aa3a7f2015-05-16 09:33:19 +080042#else
Bin Menga65b25d2015-05-07 21:34:08 +080043#define CONFIG_SCSI_DEV_LIST \
Bin Meng2aa3a7f2015-05-16 09:33:19 +080044 {PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_AHCI}
45#endif
Bin Menga65b25d2015-05-07 21:34:08 +080046
47/* GPIO is not supported */
48#undef CONFIG_INTEL_ICH6_GPIO
Bin Menga65b25d2015-05-07 21:34:08 +080049
50/* SPI is not supported */
Bin Menga65b25d2015-05-07 21:34:08 +080051#undef CONFIG_ENV_IS_IN_SPI_FLASH
Bin Menga65b25d2015-05-07 21:34:08 +080052
Bin Meng73d2de22017-01-18 03:33:03 -080053#define CONFIG_SPL_FRAMEWORK
54
55#define CONFIG_SPL_TEXT_BASE 0xfffd0000
56
57#define BOOT_DEVICE_SPI 10
58
59#define CONFIG_SPL_BOARD_LOAD_IMAGE
60#define BOOT_DEVICE_BOARD 11
61
Bin Menga65b25d2015-05-07 21:34:08 +080062#endif /* __CONFIG_H */