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Dirk Eibacha605ea72010-10-21 10:50:05 +02001/*
2 * (C) Copyright 2010
3 * Dirk Eibach, Guntermann & Drunck GmbH, eibach@gdsys.de
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <command.h>
26#include <asm/processor.h>
27#include <asm/io.h>
28#include <asm/ppc4xx-gpio.h>
29
Dirk Eibach2da0fc02011-01-21 09:31:21 +010030#include <gdsys_fpga.h>
Dirk Eibacha605ea72010-10-21 10:50:05 +020031
Dirk Eibach2da0fc02011-01-21 09:31:21 +010032#include "../common/osd.h"
Dirk Eibacha605ea72010-10-21 10:50:05 +020033
34enum {
35 UNITTYPE_MAIN_SERVER = 0,
36 UNITTYPE_MAIN_USER = 1,
37 UNITTYPE_VIDEO_SERVER = 2,
38 UNITTYPE_VIDEO_USER = 3,
39};
40
41enum {
42 HWVER_100 = 0,
43 HWVER_104 = 1,
44 HWVER_110 = 2,
45};
46
47enum {
48 COMPRESSION_NONE = 0,
49 COMPRESSION_TYPE1_DELTA,
50};
51
52enum {
53 AUDIO_NONE = 0,
54 AUDIO_TX = 1,
55 AUDIO_RX = 2,
56 AUDIO_RXTX = 3,
57};
58
59enum {
60 SYSCLK_147456 = 0,
61};
62
63enum {
64 RAM_DDR2_32 = 0,
65};
66
67/*
68 * Check Board Identity:
69 */
70int checkboard(void)
71{
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +000072 char buf[64];
73 int i = getenv_f("serial#", buf, sizeof(buf));
Dirk Eibach2da0fc02011-01-21 09:31:21 +010074 ihs_fpga_t *fpga = (ihs_fpga_t *) CONFIG_SYS_FPGA_BASE(0);
Dirk Eibach2da0fc02011-01-21 09:31:21 +010075 u16 versions = in_le16(&fpga->versions);
76 u16 fpga_version = in_le16(&fpga->fpga_version);
77 u16 fpga_features = in_le16(&fpga->fpga_features);
Dirk Eibacha605ea72010-10-21 10:50:05 +020078 unsigned unit_type;
79 unsigned hardware_version;
80 unsigned feature_compression;
81 unsigned feature_osd;
82 unsigned feature_audio;
83 unsigned feature_sysclock;
84 unsigned feature_ramconfig;
85 unsigned feature_carriers;
86 unsigned feature_video_channels;
87
88 unit_type = (versions & 0xf000) >> 12;
89 hardware_version = versions & 0x000f;
90 feature_compression = (fpga_features & 0xe000) >> 13;
91 feature_osd = fpga_features & (1<<11);
92 feature_audio = (fpga_features & 0x0600) >> 9;
93 feature_sysclock = (fpga_features & 0x0180) >> 7;
94 feature_ramconfig = (fpga_features & 0x0060) >> 5;
95 feature_carriers = (fpga_features & 0x000c) >> 2;
96 feature_video_channels = fpga_features & 0x0003;
97
98 printf("Board: ");
99
100 printf("IoCon");
101
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +0000102 if (i > 0) {
Dirk Eibacha605ea72010-10-21 10:50:05 +0200103 puts(", serial# ");
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +0000104 puts(buf);
Dirk Eibacha605ea72010-10-21 10:50:05 +0200105 }
106 puts("\n ");
107
108 switch (unit_type) {
109 case UNITTYPE_MAIN_USER:
110 printf("Mainchannel");
111 break;
112
113 case UNITTYPE_VIDEO_USER:
114 printf("Videochannel");
115 break;
116
117 default:
118 printf("UnitType %d(not supported)", unit_type);
119 break;
120 }
121
122 switch (hardware_version) {
123 case HWVER_100:
124 printf(" HW-Ver 1.00\n");
125 break;
126
127 case HWVER_104:
128 printf(" HW-Ver 1.04\n");
129 break;
130
131 case HWVER_110:
132 printf(" HW-Ver 1.10\n");
133 break;
134
135 default:
136 printf(" HW-Ver %d(not supported)\n",
137 hardware_version);
138 break;
139 }
140
141 printf(" FPGA V %d.%02d, features:",
142 fpga_version / 100, fpga_version % 100);
143
144
145 switch (feature_compression) {
146 case COMPRESSION_NONE:
147 printf(" no compression");
148 break;
149
150 case COMPRESSION_TYPE1_DELTA:
151 printf(" type1-deltacompression");
152 break;
153
154 default:
155 printf(" compression %d(not supported)", feature_compression);
156 break;
157 }
158
159 printf(", %sosd", feature_osd ? "" : "no ");
160
161 switch (feature_audio) {
162 case AUDIO_NONE:
163 printf(", no audio");
164 break;
165
166 case AUDIO_TX:
167 printf(", audio tx");
168 break;
169
170 case AUDIO_RX:
171 printf(", audio rx");
172 break;
173
174 case AUDIO_RXTX:
175 printf(", audio rx+tx");
176 break;
177
178 default:
179 printf(", audio %d(not supported)", feature_audio);
180 break;
181 }
182
183 puts(",\n ");
184
185 switch (feature_sysclock) {
186 case SYSCLK_147456:
187 printf("clock 147.456 MHz");
188 break;
189
190 default:
191 printf("clock %d(not supported)", feature_sysclock);
192 break;
193 }
194
195 switch (feature_ramconfig) {
196 case RAM_DDR2_32:
197 printf(", RAM 32 bit DDR2");
198 break;
199
200 default:
201 printf(", RAM %d(not supported)", feature_ramconfig);
202 break;
203 }
204
205 printf(", %d carrier(s)", feature_carriers);
206
207 printf(", %d video channel(s)\n", feature_video_channels);
208
209 return 0;
210}
211
212int last_stage_init(void)
213{
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100214 return osd_probe(0);
Dirk Eibacha605ea72010-10-21 10:50:05 +0200215}
216
217/*
218 * provide access to fpga gpios (for I2C bitbang)
219 */
220void fpga_gpio_set(int pin)
221{
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100222 out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x18), pin);
Dirk Eibacha605ea72010-10-21 10:50:05 +0200223}
224
225void fpga_gpio_clear(int pin)
226{
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100227 out_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x16), pin);
Dirk Eibacha605ea72010-10-21 10:50:05 +0200228}
229
230int fpga_gpio_get(int pin)
231{
Dirk Eibach2da0fc02011-01-21 09:31:21 +0100232 return in_le16((void *)(CONFIG_SYS_FPGA0_BASE + 0x14)) & pin;
Dirk Eibacha605ea72010-10-21 10:50:05 +0200233}