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Marcel Ziswiler2bc2f812022-02-07 11:54:13 +01001/* SPDX-License-Identifier: GPL-2.0-or-later */
2/*
3 * Copyright 2022 Toradex
4 */
5
6#ifndef __VERDIN_IMX8MP_H
7#define __VERDIN_IMX8MP_H
8
9#include <asm/arch/imx-regs.h>
10#include <linux/sizes.h>
11
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010012#define CONFIG_SYS_MONITOR_LEN SZ_512K
13#define CONFIG_SYS_UBOOT_BASE \
14 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
15
16#ifdef CONFIG_SPL_BUILD
17/*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010018#define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010019#define CONFIG_SYS_SPL_MALLOC_START 0x42200000
20#define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
21
22/* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
23#define CONFIG_MALLOC_F_ADDR 0x184000
24/* For RAW image gives a error info not panic */
25#define CONFIG_SPL_ABORT_ON_RAW_IMAGE
26
27#define CONFIG_POWER_PCA9450
28
29#define CONFIG_SYS_I2C
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010030#endif /* CONFIG_SPL_BUILD */
31
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010032/* ENET Config */
33/* ENET1 */
34#if defined(CONFIG_CMD_NET)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010035#define CONFIG_FEC_MXC_PHYADDR 7
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010036
37#define PHY_ANEG_TIMEOUT 20000
38#endif /* CONFIG_CMD_NET */
39
40#define MEM_LAYOUT_ENV_SETTINGS \
41 "fdt_addr_r=0x43000000\0" \
42 "kernel_addr_r=0x40000000\0" \
43 "ramdisk_addr_r=0x46400000\0" \
44 "scriptaddr=0x46000000\0"
45
46/* Enable Distro Boot */
47#ifndef CONFIG_SPL_BUILD
48#define BOOT_TARGET_DEVICES(func) \
49 func(MMC, mmc, 1) \
50 func(MMC, mmc, 2) \
51 func(DHCP, dhcp, na)
52#include <config_distro_bootcmd.h>
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010053#else
54#define BOOTENV
55#endif
56
57#if defined(CONFIG_TDX_EASY_INSTALLER)
58# define BOOT_SCRIPT "boot-tezi.scr"
59#else
60# define BOOT_SCRIPT "boot.scr"
61#endif
62
63/* Initial environment variables */
64#define CONFIG_EXTRA_ENV_SETTINGS \
65 BOOTENV \
66 MEM_LAYOUT_ENV_SETTINGS \
67 "bootcmd_mfg=fastboot 0\0" \
68 "boot_file=Image\0" \
69 "boot_scripts=" BOOT_SCRIPT "\0" \
70 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
71 "console=ttymxc2\0" \
72 "fdt_board=dev\0" \
73 "initrd_addr=0x43800000\0" \
74 "initrd_high=0xffffffffffffffff\0" \
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010075 "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
76 "consoleblank=0 earlycon\0" \
77 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
78 "if test \"$confirm\" = \"y\"; then " \
79 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
80 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
81 "${blkcnt}; fi\0"
82
83#define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
84#define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010085
86#define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
87
88/* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
89#define CONFIG_SYS_SDRAM_BASE 0x40000000
90#define PHYS_SDRAM 0x40000000
91#define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
92#define PHYS_SDRAM_2 0x100000000
93#define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
94
95/* UART */
Marek Vasut52b6b482022-04-24 23:44:03 +020096#define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010097
Marcel Ziswiler2bc2f812022-02-07 11:54:13 +010098#endif /* __VERDIN_IMX8MP_H */