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Michael Schwingenea99e8f2008-01-16 19:50:37 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * hardware register definitions for the AcTux-1 board.
6 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02007 * SPDX-License-Identifier: GPL-2.0+
Michael Schwingenea99e8f2008-01-16 19:50:37 +01008 */
9
10#ifndef _ACTUX1_HW_H
11#define _ACTUX1_HW_H
12
13/* 0 = LED off,1 = green, 2 = red, 3 = orange */
14#define ACTUX1_LED1(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 0)
15#define ACTUX1_LED2(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 1)
16#define ACTUX1_LED3(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 2)
17#define ACTUX1_LED4(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 3)
18#define ACTUX1_LED5(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 4)
19#define ACTUX1_LED6(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 5)
20#define ACTUX1_LED7(a) writeb((a)^3, IXP425_EXP_BUS_CS7_BASE_PHYS + 6)
21#define ACTUX1_HS(a) writeb((a), IXP425_EXP_BUS_CS7_BASE_PHYS + 7)
22#define ACTUX1_HS_DCD 0x01
23#define ACTUX1_HS_DSR 0x02
24
25#define ACTUX1_DBG_PORT IXP425_EXP_BUS_CS5_BASE_PHYS
26#define ACTUX1_BOARDREL (readb(IXP425_EXP_BUS_CS6_BASE_PHYS) & 0x0F)
27
28/* GPIO settings */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020029#define CONFIG_SYS_GPIO_PCI1_INTA 2
30#define CONFIG_SYS_GPIO_PCI2_INTA 3
31#define CONFIG_SYS_GPIO_I2C_SDA 4
32#define CONFIG_SYS_GPIO_I2C_SCL 5
33#define CONFIG_SYS_GPIO_DBGJUMPER 9
34#define CONFIG_SYS_GPIO_BUTTON1 10
35#define CONFIG_SYS_GPIO_DBGSENSE 11
36#define CONFIG_SYS_GPIO_DTR 12
37#define CONFIG_SYS_GPIO_IORST 13 /* Out */
38#define CONFIG_SYS_GPIO_PCI_CLK 14 /* Out */
39#define CONFIG_SYS_GPIO_EXTBUS_CLK 15 /* Out */
Michael Schwingenea99e8f2008-01-16 19:50:37 +010040
41#endif