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Siva Durga Prasad Paladuguf1b97b52019-04-10 12:38:10 +05301/* SPDX-License-Identifier: GPL-2.0+ */
2/*
3 * (C) Copyright 2019 Xilinx, Inc.
4 * Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com>
5 */
6
7#ifndef __FRU_H
8#define __FRU_H
9
10struct fru_common_hdr {
11 u8 version;
12 u8 off_internal;
13 u8 off_chassis;
14 u8 off_board;
15 u8 off_product;
16 u8 off_multirec;
17 u8 pad;
18 u8 crc;
19};
20
21#define FRU_BOARD_MAX_LEN 32
22
23struct fru_board_data {
24 u8 ver;
25 u8 len;
26 u8 lang_code;
27 u8 time[3];
28 u8 manufacturer_type_len;
29 u8 manufacturer_name[FRU_BOARD_MAX_LEN];
30 u8 product_name_type_len;
31 u8 product_name[FRU_BOARD_MAX_LEN];
32 u8 serial_number_type_len;
33 u8 serial_number[FRU_BOARD_MAX_LEN];
34 u8 part_number_type_len;
35 u8 part_number[FRU_BOARD_MAX_LEN];
36 u8 file_id_type_len;
37 u8 file_id[FRU_BOARD_MAX_LEN];
38};
39
40struct fru_table {
41 bool captured;
42 struct fru_common_hdr hdr;
43 struct fru_board_data brd;
44};
45
46#define FRU_TYPELEN_CODE_MASK 0xC0
47#define FRU_TYPELEN_LEN_MASK 0x3F
48#define FRU_COMMON_HDR_VER_MASK 0xF
49#define FRU_COMMON_HDR_LEN_MULTIPLIER 8
50#define FRU_LANG_CODE_ENGLISH 0
51#define FRU_LANG_CODE_ENGLISH_1 25
52#define FRU_TYPELEN_EOF 0xC1
53
54/* This should be minimum of fields */
55#define FRU_BOARD_AREA_TOTAL_FIELDS 5
56#define FRU_TYPELEN_TYPE_SHIFT 6
57#define FRU_TYPELEN_TYPE_BINARY 0
58#define FRU_TYPELEN_TYPE_ASCII8 3
59
60int fru_display(int verbose);
61int fru_capture(unsigned long addr);
62u8 fru_checksum(u8 *addr, u8 len);
63
64extern struct fru_table fru_data;
65
66#endif /* FRU_H */