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gerrit.devboardsforandroid.linaro.org / platform / external / u-boot / f30c62bbe8988a8341970cbb7e14bb7a99abb157 / . / board / keymile / common / common.h
blob: 6ce992ac32429786b50dec157d710d7dff4a918b [file] [log] [blame]
Heiko Schocher210c8c02008-11-21 08:29:40 +0100[diff] [blame]1/*
2 * (C) Copyright 2008
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 */
10
11#ifndef __KEYMILE_COMMON_H
12#define __KEYMILE_COMMON_H
13
Heiko Schocherb11f53f2011-03-15 16:52:29 +0100[diff] [blame]14#define WRG_RESET 0x80
15#define H_OPORTS_14 0x40
16#define WRG_LED 0x02
17#define WRL_BOOT 0x01
18
19#define H_OPORTS_SCC4_ENA 0x10
20#define H_OPORTS_SCC4_FD_ENA 0x04
21#define H_OPORTS_FCC1_PW_DWN 0x01
22
23#define PIGGY_PRESENT 0x80
24
25struct km_bec_fpga {
26 unsigned char id;
27 unsigned char rev;
28 unsigned char oprth;
29 unsigned char oprtl;
30 unsigned char res1[3];
31 unsigned char bprth;
32 unsigned char bprtl;
33 unsigned char res2[6];
34 unsigned char prst;
35 unsigned char res3[0xfff0];
36 unsigned char pgy_id;
37 unsigned char pgy_rev;
38 unsigned char pgy_outputs;
39 unsigned char pgy_eth;
40};
41
Huber, Andreasf30c62b2011-05-02 22:56:54 +0000[diff] [blame^]42#define BFTICU_DIPSWITCH_MASK 0x0f
43
44/*
45 * BFTICU FPGA iomap
46 * BFTICU is used on mgcoge and mgocge3ne
47 */
48struct bfticu_iomap {
49 u8 xi_ena; /* General defect enable */
50 u8 pack1[3];
51 u8 en_csn;
52 u8 pack2;
53 u8 safe_mem;
54 u8 pack3;
55 u8 id;
56 u8 pack4;
57 u8 rev;
58 u8 build;
59 u8 p_frc;
60 u8 p_msk;
61 u8 pack5[2];
62 u8 xg_int;
63 u8 pack6[15];
64 u8 s_conf;
65 u8 pack7;
66 u8 dmx_conf12;
67 u8 pack8;
68 u8 s_clkslv;
69 u8 pack9[11];
70 u8 d_conf;
71 u8 d_mask_ca;
72 u8 d_pll_del;
73 u8 pack10[16];
74 u8 t_conf_ca;
75 u8 t_mask_ca;
76 u8 pack11[13];
77 u8 m_def0;
78 u8 m_def1;
79 u8 m_def2;
80 u8 m_def3;
81 u8 m_def4;
82 u8 m_def5;
83 u8 m_def_trap0;
84 u8 m_def_trap1;
85 u8 m_def_trap2;
86 u8 m_def_trap3;
87 u8 m_def_trap4;
88 u8 m_def_trap5;
89 u8 m_mask_def0;
90 u8 m_mask_def1;
91 u8 m_mask_def2;
92 u8 m_mask_def3;
93 u8 m_mask_def4;
94 u8 m_mask_def5;
95 u8 m_def_mask0;
96 u8 m_def_mask1;
97 u8 m_def_mask2;
98 u8 m_def_mask3;
99 u8 m_def_mask4;
100 u8 m_def_mask5;
101 u8 m_def_pri;
102 u8 pack12[11];
103 u8 hw_status;
104 u8 pack13;
105 u8 hw_control1;
106 u8 hw_control2;
107 u8 hw_control3;
108 u8 pack14[7];
109 u8 led_on; /* Leds */
110 u8 pack15;
111 u8 sfp_control; /* SFP modules */
112 u8 pack16;
113 u8 alarm_control; /* Alarm output */
114 u8 pack17;
115 u8 icps; /* ICN clock pulse shaping */
116 u8 mswitch; /* Read mode switch */
117 u8 pack18[6];
118 u8 pb_dbug;
119};
120
Heiko Schocher0d015202011-01-06 10:25:26 +0100[diff] [blame]121#if !defined(CONFIG_PIGGY_MAC_ADRESS_OFFSET)
122#define CONFIG_PIGGY_MAC_ADRESS_OFFSET 0
123#endif
124
Heiko Schocherb11f53f2011-03-15 16:52:29 +0100[diff] [blame]125int ethernet_present(void);
126int ivm_read_eeprom(void);
Heiko Schocher210c8c02008-11-21 08:29:40 +0100[diff] [blame]127
Heiko Schocherf1fef1d2010-04-26 13:07:28 +0200[diff] [blame]128int set_km_env(void);
Heiko Schocherb11f53f2011-03-15 16:52:29 +0100[diff] [blame]129int fdt_set_node_and_value(void *blob,
Heiko Schocherdc71b242009-07-09 12:04:18 +0200[diff] [blame]130 char *nodename,
131 char *regname,
132 void *var,
133 int size);
Heiko Schocherb11f53f2011-03-15 16:52:29 +0100[diff] [blame]134int fdt_get_node_and_value(void *blob,
Heiko Schocherdc71b242009-07-09 12:04:18 +0200[diff] [blame]135 char *nodename,
136 char *propname,
137 void **var);
Heiko Schocherb11f53f2011-03-15 16:52:29 +0100[diff] [blame]138
139int i2c_soft_read_pin(void);
Heiko Schocher210c8c02008-11-21 08:29:40 +0100[diff] [blame]140#endif /* __KEYMILE_COMMON_H */