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wdenk1cb8e982003-03-06 21:55:29 +00001/*
wdenk531716e2003-09-13 19:01:12 +00002 * (C) Copyright 2002, 2003
wdenk1cb8e982003-03-06 21:55:29 +00003 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
Detlev Zundel792a09e2009-05-13 10:54:10 +02005 * Gary Jennejohn <garyj@denx.de>
wdenk1cb8e982003-03-06 21:55:29 +00006 * David Mueller <d.mueller@elsoft.ch>
7 *
8 * Configuation settings for the MPL VCMA9 board.
9 *
10 * See file CREDITS for list of people who contributed to this
11 * project.
12 *
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
27 */
28
29#ifndef __CONFIG_H
30#define __CONFIG_H
31
32/*
wdenk1cb8e982003-03-06 21:55:29 +000033 * High Level Configuration Options
34 * (easy to change)
35 */
kevin.morfitt@fearnside-systems.co.ukac678042009-11-17 18:30:34 +090036#define CONFIG_ARM920T 1 /* This is an ARM920T Core */
37#define CONFIG_S3C24X0 1 /* in a SAMSUNG S3C24x0-type SoC */
38#define CONFIG_S3C2410 1 /* specifically a SAMSUNG S3C2410 SoC */
39#define CONFIG_VCMA9 1 /* on a MPL VCMA9 Board */
wdenk1cb8e982003-03-06 21:55:29 +000040
David Müller (ELSOFT AG)0bf42fe2011-05-01 21:52:49 +000041#define CONFIG_SYS_TEXT_BASE 0x0
42
wdenk1cb8e982003-03-06 21:55:29 +000043/* input clock of PLL */
44#define CONFIG_SYS_CLK_FREQ 12000000/* VCMA9 has 12MHz input clock */
45
46#define USE_920T_MMU 1
47#undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
48
Wolfgang Denk53677ef2008-05-20 16:00:29 +020049#define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
wdenk1cb8e982003-03-06 21:55:29 +000050#define CONFIG_SETUP_MEMORY_TAGS 1
51#define CONFIG_INITRD_TAG 1
52
wdenk1cb8e982003-03-06 21:55:29 +000053
Jon Loeligera5562902007-07-08 15:31:57 -050054/*
Jon Loeligera1aa0bb2007-07-10 09:22:23 -050055 * BOOTP options
56 */
57#define CONFIG_BOOTP_BOOTFILESIZE
58#define CONFIG_BOOTP_BOOTPATH
59#define CONFIG_BOOTP_GATEWAY
60#define CONFIG_BOOTP_HOSTNAME
61
62
63/*
Jon Loeligera5562902007-07-08 15:31:57 -050064 * Command line configuration.
65 */
66#include <config_cmd_default.h>
67
68#define CONFIG_CMD_CACHE
69#define CONFIG_CMD_EEPROM
70#define CONFIG_CMD_I2C
71#define CONFIG_CMD_USB
72#define CONFIG_CMD_REGINFO
73#define CONFIG_CMD_FAT
74#define CONFIG_CMD_DATE
75#define CONFIG_CMD_ELF
76#define CONFIG_CMD_DHCP
77#define CONFIG_CMD_PING
78#define CONFIG_CMD_BSP
79
wdenk1cb8e982003-03-06 21:55:29 +000080
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020081#define CONFIG_SYS_HUSH_PARSER
82#define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
wdenk1cb8e982003-03-06 21:55:29 +000083/***********************************************************
84 * I2C stuff:
85 * the MPL VCMA9 is equipped with an ATMEL 24C256 EEPROM at
86 * address 0x50 with 16bit addressing
87 ***********************************************************/
88#define CONFIG_HARD_I2C /* I2C with hardware support */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020089#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
90#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave addr */
wdenk1cb8e982003-03-06 21:55:29 +000091
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020092#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
93#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
Jean-Christophe PLAGNIOL-VILLARDbb1f8b42008-09-05 09:19:30 +020094#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +020095#define CONFIG_ENV_OFFSET 0x000 /* environment starts at offset 0 */
96#define CONFIG_ENV_SIZE 0x800 /* 2KB should be more than enough */
wdenk1cb8e982003-03-06 21:55:29 +000097
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +020098#undef CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW
99#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 6 /* 64 bytes page write mode on 24C256 */
100#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
wdenk1cb8e982003-03-06 21:55:29 +0000101
102/*
103 * Size of malloc() pool
104 */
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200105/*#define CONFIG_MALLOC_SIZE (CONFIG_ENV_SIZE + 128*1024)*/
wdenk1cb8e982003-03-06 21:55:29 +0000106
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200107#define CONFIG_SYS_MONITOR_LEN (256 * 1024)
David Müller (ELSOFT AG)6d754842011-05-01 21:52:50 +0000108#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200109#define CONFIG_SYS_MALLOC_LEN (1024 * 1024) /* BUNZIP2 needs a lot of RAM */
wdenk1cb8e982003-03-06 21:55:29 +0000110
111/*
112 * Hardware drivers
113 */
Ben Warrenb1c0eaa2009-08-25 13:09:37 -0700114#define CONFIG_NET_MULTI
115#define CONFIG_CS8900 /* we have a CS8900 on-board */
116#define CONFIG_CS8900_BASE 0x20000300
117#define CONFIG_CS8900_BUS16 /* the Linux driver does accesses as shorts */
wdenk1cb8e982003-03-06 21:55:29 +0000118
119#define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
120
121/*
122 * select serial console configuration
123 */
Jean-Christophe PLAGNIOL-VILLARD300f99f2009-03-30 18:58:39 +0200124#define CONFIG_S3C24X0_SERIAL
wdenk1cb8e982003-03-06 21:55:29 +0000125#define CONFIG_SERIAL1 1 /* we use SERIAL 1 on VCMA9 */
126
wdenk48b42612003-06-19 23:01:32 +0000127/************************************************************
128 * USB support
129 ************************************************************/
wdenka2663ea2003-12-07 18:32:37 +0000130#define CONFIG_USB_OHCI 1
131#define CONFIG_USB_KEYBOARD 1
132#define CONFIG_USB_STORAGE 1
133#define CONFIG_DOS_PARTITION 1
wdenk48b42612003-06-19 23:01:32 +0000134
135/* Enable needed helper functions */
Jean-Christophe PLAGNIOL-VILLARD52cb4d42009-05-16 12:14:54 +0200136#define CONFIG_SYS_STDIO_DEREGISTER /* needs stdio_deregister */
wdenk48b42612003-06-19 23:01:32 +0000137
138/************************************************************
139 * RTC
140 ************************************************************/
141#define CONFIG_RTC_S3C24X0 1
142
143
wdenk1cb8e982003-03-06 21:55:29 +0000144/* allow to overwrite serial and ethaddr */
145#define CONFIG_ENV_OVERWRITE
146
147#define CONFIG_BAUDRATE 9600
148
wdenka2663ea2003-12-07 18:32:37 +0000149#define CONFIG_BOOTDELAY 5
150/* autoboot (do NOT change this set environment variable "bootdelay" to -1 instead) */
Wolfgang Denk2893ecb2005-08-14 01:52:14 +0200151/* #define CONFIG_BOOT_RETRY_TIME -10 /XXX* feature is available but not enabled */
Wolfgang Denk53677ef2008-05-20 16:00:29 +0200152#define CONFIG_ZERO_BOOTDELAY_CHECK /* check console even if bootdelay = 0 */
wdenka2663ea2003-12-07 18:32:37 +0000153
wdenk1cb8e982003-03-06 21:55:29 +0000154#define CONFIG_NETMASK 255.255.255.0
155#define CONFIG_IPADDR 10.0.0.110
156#define CONFIG_SERVERIP 10.0.0.1
157
Jon Loeligera5562902007-07-08 15:31:57 -0500158#if defined(CONFIG_CMD_KGDB)
wdenk1cb8e982003-03-06 21:55:29 +0000159#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
160/* what's this ? it's not used anywhere */
161#define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
162#endif
163
164/*
165 * Miscellaneous configurable options
166 */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200167#define CONFIG_SYS_LONGHELP /* undef to save memory */
168#define CONFIG_SYS_PROMPT "VCMA9 # " /* Monitor Command Prompt */
169#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
170#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
171#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
172#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
wdenk1cb8e982003-03-06 21:55:29 +0000173
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200174#define CONFIG_SYS_MEMTEST_START 0x30000000 /* memtest works on */
175#define CONFIG_SYS_MEMTEST_END 0x30F80000 /* 15.5 MB in DRAM */
wdenk531716e2003-09-13 19:01:12 +0000176
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200177#define CONFIG_SYS_ALT_MEMTEST
178#define CONFIG_SYS_LOAD_ADDR 0x30800000 /* default load address */
wdenk1cb8e982003-03-06 21:55:29 +0000179
wdenk1cb8e982003-03-06 21:55:29 +0000180/* we configure PWM Timer 4 to 1us ~ 1MHz */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200181/*#define CONFIG_SYS_HZ 1000000 */
182#define CONFIG_SYS_HZ 1562500
wdenk1cb8e982003-03-06 21:55:29 +0000183
184/* valid baudrates */
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200185#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
wdenk1cb8e982003-03-06 21:55:29 +0000186
wdenka2663ea2003-12-07 18:32:37 +0000187/* support BZIP2 compression */
188#define CONFIG_BZIP2 1
189
wdenk48b42612003-06-19 23:01:32 +0000190/************************************************************
191 * Ident
192 ************************************************************/
193/*#define VERSION_TAG "released"*/
194#define VERSION_TAG "unstable"
195#define CONFIG_IDENT_STRING "\n(c) 2003 by MPL AG Switzerland, MEV-10080-001 " VERSION_TAG
196
wdenk1cb8e982003-03-06 21:55:29 +0000197/*-----------------------------------------------------------------------
198 * Stack sizes
199 *
200 * The stack sizes are set up in start.S using the settings below
201 */
202#define CONFIG_STACKSIZE (128*1024) /* regular stack */
203#ifdef CONFIG_USE_IRQ
204#define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
205#define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
206#endif
207
208/*-----------------------------------------------------------------------
209 * Physical Memory Map
210 */
211#define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
212#define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
wdenk1cb8e982003-03-06 21:55:29 +0000213#define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
214
David Müller (ELSOFT AG)6d754842011-05-01 21:52:50 +0000215#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
wdenk1cb8e982003-03-06 21:55:29 +0000216
217/*-----------------------------------------------------------------------
218 * FLASH and environment organization
219 */
220
David Müller (ELSOFT AG)6d754842011-05-01 21:52:50 +0000221#define CONFIG_SYS_FLASH_CFI
222#define CONFIG_FLASH_CFI_DRIVER
223#define CONFIG_FLASH_CFI_LEGACY
224#define CONFIG_SYS_FLASH_LEGACY_512Kx16
225#define CONFIG_FLASH_SHOW_PROGRESS 45
wdenk1cb8e982003-03-06 21:55:29 +0000226
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200227#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
David Müller (ELSOFT AG)6d754842011-05-01 21:52:50 +0000228#define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
229#define CONFIG_SYS_MAX_FLASH_SECT (19)
wdenk1cb8e982003-03-06 21:55:29 +0000230
231#if 0
Jean-Christophe PLAGNIOL-VILLARD5a1aceb2008-09-10 22:48:04 +0200232#define CONFIG_ENV_IS_IN_FLASH 1
Jean-Christophe PLAGNIOL-VILLARD0e8d1582008-09-10 22:48:06 +0200233#define CONFIG_ENV_SIZE 0x10000 /* Total Size of Environment Sector */
wdenk1cb8e982003-03-06 21:55:29 +0000234#endif
235
wdenk48b42612003-06-19 23:01:32 +0000236
Jean-Christophe PLAGNIOL-VILLARD6d0f6bc2008-10-16 15:01:15 +0200237#define CONFIG_SYS_JFFS2_FIRST_BANK 0
238#define CONFIG_SYS_JFFS2_NUM_BANKS 1
wdenk48b42612003-06-19 23:01:32 +0000239
240#define MULTI_PURPOSE_SOCKET_ADDR 0x08000000
241
David Müller (ELSOFT AG)d2d94572011-05-01 21:52:48 +0000242#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
243#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x1000 - \
244 GENERATED_GBL_DATA_SIZE)
245
246
wdenk1cb8e982003-03-06 21:55:29 +0000247#endif /* __CONFIG_H */