blob: 9040a098deb0b33c113899200cdd107e1502c6fd [file] [log] [blame]
Michael Schwingenaebf00f2008-01-16 19:51:14 +01001/*
2 * (C) Copyright 2007
3 * Michael Schwingen, michael@schwingen.org
4 *
5 * (C) Copyright 2006
6 * Stefan Roese, DENX Software Engineering, sr@denx.de.
7 *
8 * (C) Copyright 2002
9 * Kyle Harris, Nexus Technologies, Inc. kharris@nexus-tech.net
10 *
11 * (C) Copyright 2002
12 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
13 * Marius Groeger <mgroeger@sysgo.de>
14 *
15 * See file CREDITS for list of people who contributed to this
16 * project.
17 *
18 * This program is free software; you can redistribute it and/or
19 * modify it under the terms of the GNU General Public License as
20 * published by the Free Software Foundation; either version 2 of
21 * the License, or (at your option) any later version.
22 *
23 * This program is distributed in the hope that it will be useful,
24 * but WITHOUT ANY WARRANTY; without even the implied warranty of
25 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 * GNU General Public License for more details.
27 *
28 * You should have received a copy of the GNU General Public License
29 * along with this program; if not, write to the Free Software
30 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
31 * MA 02111-1307 USA
32 */
33
34#include <common.h>
35#include <command.h>
36#include <malloc.h>
37#include <asm/arch/ixp425.h>
38#include <asm/io.h>
39
40#include <miiphy.h>
41
42#include "actux2_hw.h"
43
44DECLARE_GLOBAL_DATA_PTR;
45
Michael Schwingenaf050482011-05-23 00:00:05 +020046int board_early_init_f(void)
47{
48 /* CS1: IPAC-X */
49 writel(0x94d10013, IXP425_EXP_CS1);
50 /* CS5: Debug port */
51 writel(0x9d520003, IXP425_EXP_CS5);
52 /* CS6: HW release register */
53 writel(0x81860001, IXP425_EXP_CS6);
54 /* CS7: LEDs */
55 writel(0x80900003, IXP425_EXP_CS7);
56
57 return 0;
58}
59
60int board_init(void)
Michael Schwingenaebf00f2008-01-16 19:51:14 +010061{
62 gd->bd->bi_arch_number = MACH_TYPE_ACTUX2;
63
64 /* adress of boot parameters */
65 gd->bd->bi_boot_params = 0x00000100;
66
Michael Schwingenaf050482011-05-23 00:00:05 +020067 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_IORST);
68 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_ETHRST);
69 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DSR);
70 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_DCD);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010071
Michael Schwingenaf050482011-05-23 00:00:05 +020072 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_IORST);
73 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_ETHRST);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010074
Michael Schwingenaf050482011-05-23 00:00:05 +020075 GPIO_OUTPUT_CLEAR(CONFIG_SYS_GPIO_DSR);
76 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_DCD);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010077
Michael Schwingenaf050482011-05-23 00:00:05 +020078 /* Setup GPIOs for Interrupt inputs */
79 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_DBGINT);
80 GPIO_OUTPUT_DISABLE(CONFIG_SYS_GPIO_ETHINT);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010081
Michael Schwingenaf050482011-05-23 00:00:05 +020082 /* Setup GPIOs for 33MHz clock output */
83 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_PCI_CLK);
84 GPIO_OUTPUT_ENABLE(CONFIG_SYS_GPIO_EXTBUS_CLK);
85 writel(0x011001FF, IXP425_GPIO_GPCLKR);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010086
Michael Schwingenaf050482011-05-23 00:00:05 +020087 udelay(533);
88 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_IORST);
89 GPIO_OUTPUT_SET(CONFIG_SYS_GPIO_ETHRST);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010090
Michael Schwingenaf050482011-05-23 00:00:05 +020091 ACTUX2_LED1(1);
92 ACTUX2_LED2(0);
93 ACTUX2_LED3(0);
94 ACTUX2_LED4(0);
Michael Schwingenaebf00f2008-01-16 19:51:14 +010095
96 return 0;
97}
98
99/*
100 * Check Board Identity
101 */
Michael Schwingenaf050482011-05-23 00:00:05 +0200102int checkboard(void)
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100103{
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +0000104 char buf[64];
105 int i = getenv_f("serial#", buf, sizeof(buf));
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100106
Michael Schwingenaf050482011-05-23 00:00:05 +0200107 puts("Board: AcTux-2 rev.");
108 putc(ACTUX2_BOARDREL + 'A' - 1);
Jean-Christophe PLAGNIOL-VILLARDc9bcf752008-02-25 00:03:10 +0100109
Wolfgang Denkf0c0b3a2011-05-04 10:32:28 +0000110 if (i > 0) {
111 puts(", serial# ");
112 puts(buf);
Jean-Christophe PLAGNIOL-VILLARDc9bcf752008-02-25 00:03:10 +0100113 }
Michael Schwingenaf050482011-05-23 00:00:05 +0200114 putc('\n');
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100115
Michael Schwingenaf050482011-05-23 00:00:05 +0200116 return 0;
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100117}
118
Michael Schwingenaf050482011-05-23 00:00:05 +0200119int dram_init(void)
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100120{
Michael Schwingenaf050482011-05-23 00:00:05 +0200121 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE, 128<<20);
122 return 0;
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100123}
124
125/*************************************************************************
126 * get_board_rev() - setup to pass kernel board revision information
127 * 0 = reserved
128 * 1 = Rev. A
129 * 2 = Rev. B
130 *************************************************************************/
Michael Schwingenaf050482011-05-23 00:00:05 +0200131u32 get_board_rev(void)
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100132{
133 return ACTUX2_BOARDREL;
134}
135
Michael Schwingenaf050482011-05-23 00:00:05 +0200136void reset_phy(void)
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100137{
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100138 /* init IcPlus IP175C ethernet switch to native IP175C mode */
Michael Schwingenaf050482011-05-23 00:00:05 +0200139 miiphy_write("NPE0", 29, 31, 0x175C);
Michael Schwingenaebf00f2008-01-16 19:51:14 +0100140}