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Tom Rini83d290c2018-05-06 17:58:06 -04001/* SPDX-License-Identifier: GPL-2.0 */
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +09002/*
3 * include/configs/alt.h
4 * This file is alt board configuration.
5 *
6 * Copyright (C) 2014 Renesas Electronics Corporation
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +09007 */
8
9#ifndef __ALT_H
10#define __ALT_H
11
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090012#include "rcar-gen2-common.h"
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090013
Marek Vasutbb6d2ff2018-04-23 20:24:16 +020014#define CONFIG_SYS_INIT_SP_ADDR 0x4f000000
15#define STACK_AREA_SIZE 0x00100000
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090016#define LOW_LEVEL_MERAM_STACK \
17 (CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
18
19/* MEMORY */
Nobuhiro Iwamatsu5ca6dfe2014-11-10 14:34:07 +090020#define RCAR_GEN2_SDRAM_BASE 0x40000000
21#define RCAR_GEN2_SDRAM_SIZE (1024u * 1024 * 1024)
22#define RCAR_GEN2_UBOOT_SDRAM_SIZE (512 * 1024 * 1024)
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090023
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090024/* FLASH */
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090025#define CONFIG_SPI_FLASH_QUAD
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090026
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090027/* SH Ether */
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090028#define CONFIG_SH_ETHER_USE_PORT 0
29#define CONFIG_SH_ETHER_PHY_ADDR 0x1
30#define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
31#define CONFIG_SH_ETHER_CACHE_WRITEBACK
32#define CONFIG_SH_ETHER_CACHE_INVALIDATE
Marek Vasutbb6d2ff2018-04-23 20:24:16 +020033#define CONFIG_SH_ETHER_ALIGNE_SIZE 64
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090034#define CONFIG_BITBANGMII
35#define CONFIG_BITBANGMII_MULTI
36
37/* Board Clock */
Marek Vasutbb6d2ff2018-04-23 20:24:16 +020038#define RMOBILE_XTAL_CLK 20000000u
39#define CONFIG_SYS_CLK_FREQ RMOBILE_XTAL_CLK
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090040
Marek Vasutbb6d2ff2018-04-23 20:24:16 +020041#define CONFIG_EXTRA_ENV_SETTINGS \
42 "fdt_high=0xffffffff\0" \
43 "initrd_high=0xffffffff\0"
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090044
Marek Vasutbb6d2ff2018-04-23 20:24:16 +020045/* SPL support */
46#define CONFIG_SPL_TEXT_BASE 0xe6300000
47#define CONFIG_SPL_STACK 0xe6340000
48#define CONFIG_SPL_MAX_SIZE 0x4000
49#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x140000
50#ifdef CONFIG_SPL_BUILD
51#define CONFIG_CONS_SCIF2
52#define CONFIG_SH_SCIF_CLK_FREQ 65000000
53#endif
Nobuhiro Iwamatsu25f96132014-11-19 14:26:33 +090054
Nobuhiro Iwamatsucff2f5f2014-06-26 10:23:30 +090055#endif /* __ALT_H */