Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2007 |
| 3 | * Stefan Roese, DENX Software Engineering, sr@denx.de. |
| 4 | * |
| 5 | * See file CREDITS for list of people who contributed to this |
| 6 | * project. |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or |
| 9 | * modify it under the terms of the GNU General Public License as |
| 10 | * published by the Free Software Foundation; either version 2 of |
| 11 | * the License, or (at your option) any later version. |
| 12 | * |
| 13 | * This program is distributed in the hope that it will be useful, |
| 14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | * GNU General Public License for more details. |
| 17 | * |
| 18 | * You should have received a copy of the GNU General Public License |
| 19 | * along with this program; if not, write to the Free Software |
| 20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
| 21 | * MA 02111-1307 USA |
| 22 | */ |
| 23 | |
| 24 | #include <common.h> |
| 25 | #include <asm/processor.h> |
| 26 | |
| 27 | extern void board_pll_init_f(void); |
| 28 | |
Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 29 | void liveoak_gpio_init(void) |
| 30 | { |
| 31 | /* |
| 32 | * GPIO0 setup (select GPIO or alternate function) |
| 33 | */ |
| 34 | out32(GPIO0_OSRL, CFG_GPIO0_OSRL); |
| 35 | out32(GPIO0_OSRH, CFG_GPIO0_OSRH); /* output select */ |
| 36 | out32(GPIO0_ISR1L, CFG_GPIO0_ISR1L); |
| 37 | out32(GPIO0_ISR1H, CFG_GPIO0_ISR1H); /* input select */ |
| 38 | out32(GPIO0_TSRL, CFG_GPIO0_TSRL); |
| 39 | out32(GPIO0_TSRH, CFG_GPIO0_TSRH); /* three-state select */ |
| 40 | out32(GPIO0_TCR, CFG_GPIO0_TCR); /* enable output driver for outputs */ |
| 41 | |
| 42 | /* |
| 43 | * Ultra (405EZ) was nice enough to add another GPIO controller |
| 44 | */ |
| 45 | out32(GPIO1_OSRH, CFG_GPIO1_OSRH); /* output select */ |
| 46 | out32(GPIO1_OSRL, CFG_GPIO1_OSRL); |
| 47 | out32(GPIO1_ISR1H, CFG_GPIO1_ISR1H); /* input select */ |
| 48 | out32(GPIO1_ISR1L, CFG_GPIO1_ISR1L); |
| 49 | out32(GPIO1_TSRH, CFG_GPIO1_TSRH); /* three-state select */ |
| 50 | out32(GPIO1_TSRL, CFG_GPIO1_TSRL); |
| 51 | out32(GPIO1_TCR, CFG_GPIO1_TCR); /* enable output driver for outputs */ |
| 52 | } |
| 53 | |
Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 54 | int board_early_init_f(void) |
| 55 | { |
| 56 | unsigned int reg; |
| 57 | |
Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 58 | board_pll_init_f(); |
| 59 | liveoak_gpio_init(); |
Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 60 | |
| 61 | /* USB Host core needs this bit set */ |
| 62 | mfsdr(sdrultra1, reg); |
| 63 | mtsdr(sdrultra1, reg | SDR_ULTRA1_LEDNENABLE); |
| 64 | |
| 65 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 66 | mtdcr(uicer, 0x00000000); /* disable all ints */ |
| 67 | mtdcr(uiccr, 0x00000010); |
| 68 | mtdcr(uicpr, 0xFE7FFFF0); /* set int polarities */ |
| 69 | mtdcr(uictr, 0x00000010); /* set int trigger levels */ |
| 70 | mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */ |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | |
| 75 | int misc_init_f(void) |
| 76 | { |
| 77 | /* Set EPLD to take PHY out of reset */ |
Stefan Roese | 3cb86f3 | 2007-03-24 15:45:34 +0100 | [diff] [blame] | 78 | out8(CFG_CPLD_BASE + 0x05, 0x00); |
Stefan Roese | 16c0cc1 | 2007-03-21 13:39:57 +0100 | [diff] [blame] | 79 | udelay(100000); |
| 80 | |
| 81 | return 0; |
| 82 | } |
| 83 | |
| 84 | /* |
| 85 | * Check Board Identity: |
| 86 | */ |
| 87 | int checkboard(void) |
| 88 | { |
| 89 | char *s = getenv("serial#"); |
| 90 | |
| 91 | printf("Board: Acadia - AMCC PPC405EZ Evaluation Board"); |
| 92 | if (s != NULL) { |
| 93 | puts(", serial# "); |
| 94 | puts(s); |
| 95 | } |
| 96 | putc('\n'); |
| 97 | |
| 98 | return (0); |
| 99 | } |