blob: e43667dc920ac86d49bf677dbdef048a29673ea8 [file] [log] [blame]
wdenkf39748a2004-06-09 13:37:52 +00001/*
2 * See file CREDITS for list of people who contributed to this
3 * project.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
18 * MA 02111-1307 USA
19 */
20
21/*
22 * lh7a400 SoC interface
23 */
24
25#ifndef __LH7A400_H__
26#define __LH7A400_H__
27
28#include "lh7a40x.h"
29
30/* Interrupt Controller (userguide 8.2.1) */
31typedef struct {
32 volatile u32 intsr;
33 volatile u32 intrsr;
34 volatile u32 intens;
35 volatile u32 intenc;
36 volatile u32 rsvd1;
37 volatile u32 rsvd2;
38 volatile u32 rsvd3;
39} /*__attribute__((__packed__))*/ lh7a400_interrupt_t;
40#define LH7A400_INTERRUPT_BASE (0x80000500)
41#define LH7A400_INTERRUPT_PTR(name) lh7a400_interrupt_t* name = (lh7a400_interrupt_t*) LH7A400_INTERRUPT_BASE
42
43/* (DMA) Direct Memory Access Controller (userguide 9.2.1) */
44typedef struct {
45 volatile u32 maxcnt;
46 volatile u32 base;
47 volatile u32 current;
48 volatile u32 rsvd1;
49} lh7a400_dmabuf_t;
50
51typedef struct {
52 volatile u32 control;
53 volatile u32 interrupt;
54 volatile u32 rsvd1;
55 volatile u32 status;
56 volatile u32 rsvd2;
57 volatile u32 remain;
58 volatile u32 rsvd3;
59 volatile u32 rsvd4;
60 lh7a400_dmabuf_t buf[2];
61} /*__attribute__((__packed__))*/ lh7a400_dmachan_t;
62
63typedef struct {
64 lh7a400_dmachan_t chan[15];
65 volatile u32 glblint;
66 volatile u32 rsvd1;
67 volatile u32 rsvd2;
68 volatile u32 rsvd3;
69} /*__attribute__((__packed__))*/ lh7a400_dma_t;
70#define LH7A400_DMA_BASE (0x80002800)
71#define DMA_USBTX_OFFSET (0x000)
72#define DMA_USBRX_OFFSET (0x040)
73#define DMA_MMCTX_OFFSET (0x080)
74#define DMA_MMCRX_OFFSET (0x0C0)
75#define DMA_AC97_BASE (0x80002A00)
76
77#define LH7A400_DMA_PTR(name) lh7a400_dma_t* name = (lh7a400_dma_t*) LH7A400_DMA_BASE
78#define LH7A400_DMA_USBTX(name) \
79 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_USBTX_OFFSET)
80#define LH7A400_DMA_USBRX(name) \
81 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_USBRX_OFFSET)
82#define LH7A400_DMA_MMCTX(name) \
83 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_MMCTX_OFFSET)
84#define LH7A400_DMA_MMCRX(name) \
85 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_DMA_BASE + DMA_MMCRX_OFFSET)
86#define LH7A400_AC97RX(name,n) \
87 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_AC97_BASE + \
88 ((2*n) * sizeof(lh7a400_dmachan_t)))
89#define LH7A400_AC97TX(name,n) \
90 lh7a400_dmachan_t* name = (lh7a400_dmachan_t*) (LH7A400_AC97_BASE + \
91 (((2*n)+1) * sizeof(lh7a400_dmachan_t)))
92
93#endif /* __LH7A400_H__ */