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Stefan Roese2bae75a2015-04-25 06:29:56 +02001/*
2 * Copyright (C) 2014 Stefan Roese <sr@denx.de>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#ifndef _CONFIG_DB_88F6820_GP_H
8#define _CONFIG_DB_88F6820_GP_H
9
10/*
11 * High Level Configuration Options (easy to change)
12 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020013
Stefan Roese2923c2d2015-08-06 14:27:36 +020014/*
15 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed
16 * for DDR ECC byte filling in the SPL before loading the main
17 * U-Boot into it.
18 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020019#define CONFIG_SYS_TCLK 250000000 /* 250MHz */
20
21/*
22 * Commands configuration
23 */
Stefan Roese2bae75a2015-04-25 06:29:56 +020024
25/* I2C */
26#define CONFIG_SYS_I2C
27#define CONFIG_SYS_I2C_MVTWSI
28#define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE
29#define CONFIG_SYS_I2C_SLAVE 0x0
30#define CONFIG_SYS_I2C_SPEED 100000
31
32/* SPI NOR flash default params, used by sf commands */
33#define CONFIG_SF_DEFAULT_SPEED 1000000
34#define CONFIG_SF_DEFAULT_MODE SPI_MODE_3
Stefan Roese2bae75a2015-04-25 06:29:56 +020035
Stefan Roesee80f1e82015-06-29 14:58:11 +020036/*
37 * SDIO/MMC Card Configuration
38 */
Stefan Roesee80f1e82015-06-29 14:58:11 +020039#define CONFIG_SYS_MMC_BASE MVEBU_SDIO_BASE
40
Stefan Roese7cbaff92015-06-29 14:58:14 +020041/*
42 * SATA/SCSI/AHCI configuration
43 */
Stefan Roese7cbaff92015-06-29 14:58:14 +020044#define CONFIG_SCSI_AHCI_PLAT
45#define CONFIG_SYS_SCSI_MAX_SCSI_ID 2
46#define CONFIG_SYS_SCSI_MAX_LUN 1
47#define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \
48 CONFIG_SYS_SCSI_MAX_LUN)
49
Stefan Roese59565732015-06-29 14:58:16 +020050/* USB/EHCI configuration */
Stefan Roese59565732015-06-29 14:58:16 +020051#define CONFIG_EHCI_IS_TDI
52
Stefan Roese2bae75a2015-04-25 06:29:56 +020053/* Environment in SPI NOR flash */
Stefan Roese2bae75a2015-04-25 06:29:56 +020054#define CONFIG_ENV_OFFSET (1 << 20) /* 1MiB in */
55#define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */
56#define CONFIG_ENV_SECT_SIZE (256 << 10) /* 256KiB sectors */
57
58#define CONFIG_PHY_MARVELL /* there is a marvell phy */
Stefan Roese2bae75a2015-04-25 06:29:56 +020059#define PHY_ANEG_TIMEOUT 8000 /* PHY needs a longer aneg time */
60
Stefan Roesece2cb1d2015-08-11 12:50:58 +020061/* PCIe support */
Stefan Roese64512232015-11-25 07:37:00 +010062#ifndef CONFIG_SPL_BUILD
Stefan Roesece2cb1d2015-08-11 12:50:58 +020063#define CONFIG_PCI_MVEBU
Stefan Roesece2cb1d2015-08-11 12:50:58 +020064#define CONFIG_PCI_SCAN_SHOW
Stefan Roese64512232015-11-25 07:37:00 +010065#endif
Stefan Roesece2cb1d2015-08-11 12:50:58 +020066
Kevin Smith3fd38af2015-05-18 16:09:46 +000067/* Keep device tree and initrd in lower memory so the kernel can access them */
68#define CONFIG_EXTRA_ENV_SETTINGS \
69 "fdt_high=0x10000000\0" \
70 "initrd_high=0x10000000\0"
71
Stefan Roese9e30b312015-03-25 13:35:15 +010072/* SPL */
Stefan Roese7853c502015-07-20 11:20:40 +020073/*
74 * Select the boot device here
75 *
76 * Currently supported are:
77 * SPL_BOOT_SPI_NOR_FLASH - Booting via SPI NOR flash
78 * SPL_BOOT_SDIO_MMC_CARD - Booting via SDIO/MMC card (partition 1)
79 */
80#define SPL_BOOT_SPI_NOR_FLASH 1
81#define SPL_BOOT_SDIO_MMC_CARD 2
82#define CONFIG_SPL_BOOT_DEVICE SPL_BOOT_SPI_NOR_FLASH
83
Stefan Roese9e30b312015-03-25 13:35:15 +010084/* Defines for SPL */
Stefan Roese9e30b312015-03-25 13:35:15 +010085#define CONFIG_SPL_SIZE (140 << 10)
86#define CONFIG_SPL_TEXT_BASE 0x40000030
87#define CONFIG_SPL_MAX_SIZE (CONFIG_SPL_SIZE - 0x0030)
88
89#define CONFIG_SPL_BSS_START_ADDR (0x40000000 + CONFIG_SPL_SIZE)
90#define CONFIG_SPL_BSS_MAX_SIZE (16 << 10)
91
Stefan Roese64512232015-11-25 07:37:00 +010092#ifdef CONFIG_SPL_BUILD
93#define CONFIG_SYS_MALLOC_SIMPLE
94#endif
Stefan Roese9e30b312015-03-25 13:35:15 +010095
96#define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10))
97#define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4)
98
Stefan Roese7853c502015-07-20 11:20:40 +020099#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SPI_NOR_FLASH
Stefan Roese9e30b312015-03-25 13:35:15 +0100100/* SPL related SPI defines */
Stefan Roese09a54c02015-11-20 13:51:57 +0100101#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000
Stefan Roese7853c502015-07-20 11:20:40 +0200102#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_SPI_U_BOOT_OFFS
103#endif
104
105#if CONFIG_SPL_BOOT_DEVICE == SPL_BOOT_SDIO_MMC_CARD
106/* SPL related MMC defines */
Stefan Roese7853c502015-07-20 11:20:40 +0200107#define CONFIG_SYS_MMC_U_BOOT_OFFS (160 << 10)
108#define CONFIG_SYS_U_BOOT_OFFS CONFIG_SYS_MMC_U_BOOT_OFFS
Stefan Roese7853c502015-07-20 11:20:40 +0200109#ifdef CONFIG_SPL_BUILD
110#define CONFIG_FIXED_SDHCI_ALIGNED_BUFFER 0x00180000 /* in SDRAM */
111#endif
112#endif
Stefan Roese9e30b312015-03-25 13:35:15 +0100113
Stefan Roese2bae75a2015-04-25 06:29:56 +0200114/*
115 * mv-common.h should be defined after CMD configs since it used them
116 * to enable certain macros
117 */
118#include "mv-common.h"
119
120#endif /* _CONFIG_DB_88F6820_GP_H */