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Tom Rini83d290c2018-05-06 17:58:06 -04001// SPDX-License-Identifier: GPL-2.0+
wdenke2211742002-11-02 23:30:20 +00002/*
3 * (C) Copyright 2002
4 * Rich Ireland, Enterasys Networks, rireland@enterasys.com.
wdenke2211742002-11-02 23:30:20 +00005 */
6
Michal Simekf6555d92013-04-26 08:46:56 +02007/* Generic FPGA support */
wdenke2211742002-11-02 23:30:20 +00008#include <common.h> /* core U-Boot definitions */
Simon Glass691d7192020-05-10 11:40:02 -06009#include <init.h>
Simon Glassf7ae49f2020-05-10 11:40:05 -060010#include <log.h>
wdenke2211742002-11-02 23:30:20 +000011#include <xilinx.h> /* xilinx specific definitions */
12#include <altera.h> /* altera specific definitions */
Stefano Babic3b8ac462010-06-29 11:47:48 +020013#include <lattice.h>
Simon Glass336d4612020-02-03 07:36:16 -070014#include <dm/device_compat.h>
wdenke2211742002-11-02 23:30:20 +000015
wdenke2211742002-11-02 23:30:20 +000016/* Local static data */
wdenke2211742002-11-02 23:30:20 +000017static int next_desc = FPGA_INVALID_DEVICE;
18static fpga_desc desc_table[CONFIG_MAX_FPGA_DEVICES];
19
Michal Simekf6555d92013-04-26 08:46:56 +020020/*
21 * fpga_no_sup
wdenke2211742002-11-02 23:30:20 +000022 * 'no support' message function
23 */
Michal Simekf6555d92013-04-26 08:46:56 +020024static void fpga_no_sup(char *fn, char *msg)
wdenke2211742002-11-02 23:30:20 +000025{
Michal Simekf6555d92013-04-26 08:46:56 +020026 if (fn && msg)
27 printf("%s: No support for %s.\n", fn, msg);
28 else if (msg)
29 printf("No support for %s.\n", msg);
30 else
Robert P. J. Day62a3b7d2016-07-15 13:44:45 -040031 printf("No FPGA support!\n");
wdenke2211742002-11-02 23:30:20 +000032}
33
34
35/* fpga_get_desc
36 * map a device number to a descriptor
37 */
Michal Simekebd322d2015-01-13 16:09:53 +010038const fpga_desc *const fpga_get_desc(int devnum)
wdenke2211742002-11-02 23:30:20 +000039{
Michal Simekf6555d92013-04-26 08:46:56 +020040 fpga_desc *desc = (fpga_desc *)NULL;
wdenke2211742002-11-02 23:30:20 +000041
Michal Simekf6555d92013-04-26 08:46:56 +020042 if ((devnum >= 0) && (devnum < next_desc)) {
wdenke2211742002-11-02 23:30:20 +000043 desc = &desc_table[devnum];
Michal Simekf6555d92013-04-26 08:46:56 +020044 debug("%s: found fpga descriptor #%d @ 0x%p\n",
45 __func__, devnum, desc);
wdenke2211742002-11-02 23:30:20 +000046 }
47
48 return desc;
49}
50
Michal Simekf6555d92013-04-26 08:46:56 +020051/*
52 * fpga_validate
wdenke2211742002-11-02 23:30:20 +000053 * generic parameter checking code
54 */
Michal Simek6631db42013-04-26 15:04:48 +020055const fpga_desc *const fpga_validate(int devnum, const void *buf,
56 size_t bsize, char *fn)
wdenke2211742002-11-02 23:30:20 +000057{
Michal Simekf6555d92013-04-26 08:46:56 +020058 const fpga_desc *desc = fpga_get_desc(devnum);
wdenke2211742002-11-02 23:30:20 +000059
Michal Simekf6555d92013-04-26 08:46:56 +020060 if (!desc)
61 printf("%s: Invalid device number %d\n", fn, devnum);
wdenke2211742002-11-02 23:30:20 +000062
Michal Simekf6555d92013-04-26 08:46:56 +020063 if (!buf) {
64 printf("%s: Null buffer.\n", fn);
wdenke2211742002-11-02 23:30:20 +000065 return (fpga_desc * const)NULL;
66 }
wdenke2211742002-11-02 23:30:20 +000067 return desc;
68}
69
Michal Simekf6555d92013-04-26 08:46:56 +020070/*
71 * fpga_dev_info
wdenke2211742002-11-02 23:30:20 +000072 * generic multiplexing code
73 */
Michal Simekf6555d92013-04-26 08:46:56 +020074static int fpga_dev_info(int devnum)
wdenke2211742002-11-02 23:30:20 +000075{
Michal Simekf6555d92013-04-26 08:46:56 +020076 int ret_val = FPGA_FAIL; /* assume failure */
77 const fpga_desc * const desc = fpga_get_desc(devnum);
wdenke2211742002-11-02 23:30:20 +000078
Michal Simekf6555d92013-04-26 08:46:56 +020079 if (desc) {
80 debug("%s: Device Descriptor @ 0x%p\n",
81 __func__, desc->devdesc);
wdenke2211742002-11-02 23:30:20 +000082
Michal Simekf6555d92013-04-26 08:46:56 +020083 switch (desc->devtype) {
wdenke2211742002-11-02 23:30:20 +000084 case fpga_xilinx:
Matthias Fuchs01335022007-12-27 17:12:34 +010085#if defined(CONFIG_FPGA_XILINX)
Michal Simekf6555d92013-04-26 08:46:56 +020086 printf("Xilinx Device\nDescriptor @ 0x%p\n", desc);
87 ret_val = xilinx_info(desc->devdesc);
wdenke2211742002-11-02 23:30:20 +000088#else
Michal Simekf6555d92013-04-26 08:46:56 +020089 fpga_no_sup((char *)__func__, "Xilinx devices");
wdenke2211742002-11-02 23:30:20 +000090#endif
91 break;
92 case fpga_altera:
Matthias Fuchs01335022007-12-27 17:12:34 +010093#if defined(CONFIG_FPGA_ALTERA)
Michal Simekf6555d92013-04-26 08:46:56 +020094 printf("Altera Device\nDescriptor @ 0x%p\n", desc);
95 ret_val = altera_info(desc->devdesc);
wdenke2211742002-11-02 23:30:20 +000096#else
Michal Simekf6555d92013-04-26 08:46:56 +020097 fpga_no_sup((char *)__func__, "Altera devices");
wdenke2211742002-11-02 23:30:20 +000098#endif
99 break;
Stefano Babic3b8ac462010-06-29 11:47:48 +0200100 case fpga_lattice:
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200101#if defined(CONFIG_FPGA_LATTICE)
Stefano Babic3b8ac462010-06-29 11:47:48 +0200102 printf("Lattice Device\nDescriptor @ 0x%p\n", desc);
103 ret_val = lattice_info(desc->devdesc);
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200104#else
Michal Simekf6555d92013-04-26 08:46:56 +0200105 fpga_no_sup((char *)__func__, "Lattice devices");
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200106#endif
Stefano Babic3b8ac462010-06-29 11:47:48 +0200107 break;
wdenke2211742002-11-02 23:30:20 +0000108 default:
Michal Simekf6555d92013-04-26 08:46:56 +0200109 printf("%s: Invalid or unsupported device type %d\n",
110 __func__, desc->devtype);
wdenke2211742002-11-02 23:30:20 +0000111 }
112 } else {
Michal Simekf6555d92013-04-26 08:46:56 +0200113 printf("%s: Invalid device number %d\n", __func__, devnum);
wdenke2211742002-11-02 23:30:20 +0000114 }
115
116 return ret_val;
117}
118
Michal Simekf6555d92013-04-26 08:46:56 +0200119/*
Michal Simek905bca62016-05-17 14:32:00 +0200120 * fpga_init is usually called from misc_init_r() and MUST be called
wdenke2211742002-11-02 23:30:20 +0000121 * before any of the other fpga functions are used.
122 */
Peter Tyser6385b282009-09-21 11:20:32 -0500123void fpga_init(void)
wdenke2211742002-11-02 23:30:20 +0000124{
wdenke2211742002-11-02 23:30:20 +0000125 next_desc = 0;
Michal Simekf6555d92013-04-26 08:46:56 +0200126 memset(desc_table, 0, sizeof(desc_table));
wdenke2211742002-11-02 23:30:20 +0000127
Michal Simekee976c12013-04-26 09:38:26 +0200128 debug("%s\n", __func__);
wdenke2211742002-11-02 23:30:20 +0000129}
130
Michal Simekf6555d92013-04-26 08:46:56 +0200131/*
132 * fpga_count
wdenke2211742002-11-02 23:30:20 +0000133 * Basic interface function to get the current number of devices available.
134 */
Michal Simekf6555d92013-04-26 08:46:56 +0200135int fpga_count(void)
wdenke2211742002-11-02 23:30:20 +0000136{
137 return next_desc;
138}
139
Michal Simekf6555d92013-04-26 08:46:56 +0200140/*
141 * fpga_add
Peter Tyser6385b282009-09-21 11:20:32 -0500142 * Add the device descriptor to the device table.
wdenke2211742002-11-02 23:30:20 +0000143 */
Michal Simekf6555d92013-04-26 08:46:56 +0200144int fpga_add(fpga_type devtype, void *desc)
wdenke2211742002-11-02 23:30:20 +0000145{
146 int devnum = FPGA_INVALID_DEVICE;
147
Michal Simekcda1e3f2018-01-26 13:17:04 +0100148 if (!desc) {
149 printf("%s: NULL device descriptor\n", __func__);
150 return devnum;
151 }
152
Michal Simekf6555d92013-04-26 08:46:56 +0200153 if (next_desc < 0) {
154 printf("%s: FPGA support not initialized!\n", __func__);
155 } else if ((devtype > fpga_min_type) && (devtype < fpga_undefined)) {
Michal Simekcda1e3f2018-01-26 13:17:04 +0100156 if (next_desc < CONFIG_MAX_FPGA_DEVICES) {
157 devnum = next_desc;
158 desc_table[next_desc].devtype = devtype;
159 desc_table[next_desc++].devdesc = desc;
wdenke2211742002-11-02 23:30:20 +0000160 } else {
Michal Simekcda1e3f2018-01-26 13:17:04 +0100161 printf("%s: Exceeded Max FPGA device count\n",
162 __func__);
wdenke2211742002-11-02 23:30:20 +0000163 }
164 } else {
Michal Simekf6555d92013-04-26 08:46:56 +0200165 printf("%s: Unsupported FPGA type %d\n", __func__, devtype);
wdenke2211742002-11-02 23:30:20 +0000166 }
167
168 return devnum;
169}
170
171/*
Goldschmidt Simon8b93a922017-11-10 14:17:41 +0000172 * Return 1 if the fpga data is partial.
173 * This is only required for fpga drivers that support bitstream_type.
174 */
175int __weak fpga_is_partial_data(int devnum, size_t img_len)
176{
177 return 0;
178}
179
180/*
Michal Simek52c20642013-04-26 13:12:07 +0200181 * Convert bitstream data and load into the fpga
182 */
Michal Simek7a78bd22014-05-02 14:09:30 +0200183int __weak fpga_loadbitstream(int devnum, char *fpgadata, size_t size,
184 bitstream_type bstype)
Michal Simek52c20642013-04-26 13:12:07 +0200185{
186 printf("Bitstream support not implemented for this FPGA device\n");
187 return FPGA_FAIL;
188}
189
Siva Durga Prasad Paladugu1a897662014-03-14 16:35:37 +0530190#if defined(CONFIG_CMD_FPGA_LOADFS)
191int fpga_fsload(int devnum, const void *buf, size_t size,
192 fpga_fs_info *fpga_fsinfo)
193{
194 int ret_val = FPGA_FAIL; /* assume failure */
195 const fpga_desc *desc = fpga_validate(devnum, buf, size,
196 (char *)__func__);
197
198 if (desc) {
199 switch (desc->devtype) {
200 case fpga_xilinx:
201#if defined(CONFIG_FPGA_XILINX)
202 ret_val = xilinx_loadfs(desc->devdesc, buf, size,
203 fpga_fsinfo);
204#else
205 fpga_no_sup((char *)__func__, "Xilinx devices");
206#endif
207 break;
208 default:
209 printf("%s: Invalid or unsupported device type %d\n",
210 __func__, desc->devtype);
211 }
212 }
213
214 return ret_val;
215}
216#endif
217
Oleksandr Suvorovfb2b8852022-07-22 17:16:02 +0300218#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
Siva Durga Prasad Paladugucedd48e2018-05-31 15:10:22 +0530219int fpga_loads(int devnum, const void *buf, size_t size,
220 struct fpga_secure_info *fpga_sec_info)
221{
222 int ret_val = FPGA_FAIL;
223
224 const fpga_desc *desc = fpga_validate(devnum, buf, size,
225 (char *)__func__);
226
227 if (desc) {
228 switch (desc->devtype) {
229 case fpga_xilinx:
230#if defined(CONFIG_FPGA_XILINX)
231 ret_val = xilinx_loads(desc->devdesc, buf, size,
232 fpga_sec_info);
233#else
234 fpga_no_sup((char *)__func__, "Xilinx devices");
235#endif
236 break;
237 default:
238 printf("%s: Invalid or unsupported device type %d\n",
239 __func__, desc->devtype);
240 }
241 }
242
243 return ret_val;
244}
245#endif
246
Christian Taedckea1190b42023-07-20 09:27:24 +0200247static int fpga_load_event_notify(const void *buf, size_t bsize, int result)
248{
249 if (CONFIG_IS_ENABLED(EVENT)) {
250 struct event_fpga_load load = {
251 .buf = buf,
252 .bsize = bsize,
253 .result = result
254 };
255
256 return event_notify(EVT_FPGA_LOAD, &load, sizeof(load));
257 }
258
259 return 0;
260}
261
Michal Simek52c20642013-04-26 13:12:07 +0200262/*
Michal Simekf6555d92013-04-26 08:46:56 +0200263 * Generic multiplexing code
wdenke2211742002-11-02 23:30:20 +0000264 */
Oleksandr Suvorov282eed52022-07-22 17:16:07 +0300265int fpga_load(int devnum, const void *buf, size_t bsize, bitstream_type bstype,
266 int flags)
wdenke2211742002-11-02 23:30:20 +0000267{
268 int ret_val = FPGA_FAIL; /* assume failure */
Christian Taedckea1190b42023-07-20 09:27:24 +0200269 int ret_notify;
Michal Simekf6555d92013-04-26 08:46:56 +0200270 const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
271 (char *)__func__);
wdenke2211742002-11-02 23:30:20 +0000272
Michal Simekf6555d92013-04-26 08:46:56 +0200273 if (desc) {
274 switch (desc->devtype) {
wdenke2211742002-11-02 23:30:20 +0000275 case fpga_xilinx:
Matthias Fuchs01335022007-12-27 17:12:34 +0100276#if defined(CONFIG_FPGA_XILINX)
Michal Simek7a78bd22014-05-02 14:09:30 +0200277 ret_val = xilinx_load(desc->devdesc, buf, bsize,
Oleksandr Suvorov282eed52022-07-22 17:16:07 +0300278 bstype, flags);
wdenke2211742002-11-02 23:30:20 +0000279#else
Michal Simekf6555d92013-04-26 08:46:56 +0200280 fpga_no_sup((char *)__func__, "Xilinx devices");
wdenke2211742002-11-02 23:30:20 +0000281#endif
282 break;
283 case fpga_altera:
Matthias Fuchs01335022007-12-27 17:12:34 +0100284#if defined(CONFIG_FPGA_ALTERA)
Michal Simekf6555d92013-04-26 08:46:56 +0200285 ret_val = altera_load(desc->devdesc, buf, bsize);
wdenke2211742002-11-02 23:30:20 +0000286#else
Michal Simekf6555d92013-04-26 08:46:56 +0200287 fpga_no_sup((char *)__func__, "Altera devices");
wdenke2211742002-11-02 23:30:20 +0000288#endif
289 break;
Stefano Babic3b8ac462010-06-29 11:47:48 +0200290 case fpga_lattice:
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200291#if defined(CONFIG_FPGA_LATTICE)
Stefano Babic3b8ac462010-06-29 11:47:48 +0200292 ret_val = lattice_load(desc->devdesc, buf, bsize);
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200293#else
Michal Simekf6555d92013-04-26 08:46:56 +0200294 fpga_no_sup((char *)__func__, "Lattice devices");
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200295#endif
Stefano Babic3b8ac462010-06-29 11:47:48 +0200296 break;
wdenke2211742002-11-02 23:30:20 +0000297 default:
Michal Simekf6555d92013-04-26 08:46:56 +0200298 printf("%s: Invalid or unsupported device type %d\n",
299 __func__, desc->devtype);
wdenke2211742002-11-02 23:30:20 +0000300 }
301 }
302
Christian Taedckea1190b42023-07-20 09:27:24 +0200303 ret_notify = fpga_load_event_notify(buf, bsize, ret_val);
304 if (ret_notify)
305 return ret_notify;
306
wdenke2211742002-11-02 23:30:20 +0000307 return ret_val;
308}
309
Michal Simekf6555d92013-04-26 08:46:56 +0200310/*
311 * fpga_dump
wdenke2211742002-11-02 23:30:20 +0000312 * generic multiplexing code
313 */
Wolfgang Denke6a857d2011-07-30 13:33:49 +0000314int fpga_dump(int devnum, const void *buf, size_t bsize)
wdenke2211742002-11-02 23:30:20 +0000315{
316 int ret_val = FPGA_FAIL; /* assume failure */
Michal Simekf6555d92013-04-26 08:46:56 +0200317 const fpga_desc *desc = fpga_validate(devnum, buf, bsize,
318 (char *)__func__);
wdenke2211742002-11-02 23:30:20 +0000319
Michal Simekf6555d92013-04-26 08:46:56 +0200320 if (desc) {
321 switch (desc->devtype) {
wdenke2211742002-11-02 23:30:20 +0000322 case fpga_xilinx:
Matthias Fuchs01335022007-12-27 17:12:34 +0100323#if defined(CONFIG_FPGA_XILINX)
Michal Simekf6555d92013-04-26 08:46:56 +0200324 ret_val = xilinx_dump(desc->devdesc, buf, bsize);
wdenke2211742002-11-02 23:30:20 +0000325#else
Michal Simekf6555d92013-04-26 08:46:56 +0200326 fpga_no_sup((char *)__func__, "Xilinx devices");
wdenke2211742002-11-02 23:30:20 +0000327#endif
328 break;
329 case fpga_altera:
Matthias Fuchs01335022007-12-27 17:12:34 +0100330#if defined(CONFIG_FPGA_ALTERA)
Michal Simekf6555d92013-04-26 08:46:56 +0200331 ret_val = altera_dump(desc->devdesc, buf, bsize);
wdenke2211742002-11-02 23:30:20 +0000332#else
Michal Simekf6555d92013-04-26 08:46:56 +0200333 fpga_no_sup((char *)__func__, "Altera devices");
wdenke2211742002-11-02 23:30:20 +0000334#endif
335 break;
Stefano Babic3b8ac462010-06-29 11:47:48 +0200336 case fpga_lattice:
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200337#if defined(CONFIG_FPGA_LATTICE)
Stefano Babic3b8ac462010-06-29 11:47:48 +0200338 ret_val = lattice_dump(desc->devdesc, buf, bsize);
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200339#else
Michal Simekf6555d92013-04-26 08:46:56 +0200340 fpga_no_sup((char *)__func__, "Lattice devices");
Wolfgang Denk439f6f72010-10-18 21:32:14 +0200341#endif
Stefano Babic3b8ac462010-06-29 11:47:48 +0200342 break;
wdenke2211742002-11-02 23:30:20 +0000343 default:
Michal Simekf6555d92013-04-26 08:46:56 +0200344 printf("%s: Invalid or unsupported device type %d\n",
345 __func__, desc->devtype);
wdenke2211742002-11-02 23:30:20 +0000346 }
347 }
348
349 return ret_val;
350}
351
Michal Simekf6555d92013-04-26 08:46:56 +0200352/*
353 * fpga_info
wdenke2211742002-11-02 23:30:20 +0000354 * front end to fpga_dev_info. If devnum is invalid, report on all
355 * available devices.
356 */
Michal Simekf6555d92013-04-26 08:46:56 +0200357int fpga_info(int devnum)
wdenke2211742002-11-02 23:30:20 +0000358{
Michal Simekf6555d92013-04-26 08:46:56 +0200359 if (devnum == FPGA_INVALID_DEVICE) {
360 if (next_desc > 0) {
wdenke2211742002-11-02 23:30:20 +0000361 int dev;
362
Michal Simekf6555d92013-04-26 08:46:56 +0200363 for (dev = 0; dev < next_desc; dev++)
364 fpga_dev_info(dev);
365
wdenke2211742002-11-02 23:30:20 +0000366 return FPGA_SUCCESS;
367 } else {
Michal Simekf6555d92013-04-26 08:46:56 +0200368 printf("%s: No FPGA devices available.\n", __func__);
wdenke2211742002-11-02 23:30:20 +0000369 return FPGA_FAIL;
370 }
371 }
wdenke2211742002-11-02 23:30:20 +0000372
Michal Simekf6555d92013-04-26 08:46:56 +0200373 return fpga_dev_info(devnum);
374}
Oleksandr Suvorov2c605142022-07-22 17:16:08 +0300375
376#if CONFIG_IS_ENABLED(FPGA_LOAD_SECURE)
377int fpga_compatible2flag(int devnum, const char *compatible)
378{
379 const fpga_desc * const desc = fpga_get_desc(devnum);
380
381 if (!desc)
382 return 0;
383
384 switch (desc->devtype) {
385#if defined(CONFIG_FPGA_XILINX)
386 case fpga_xilinx:
387 {
388 xilinx_desc *xdesc = (xilinx_desc *)desc->devdesc;
389
390 if (xdesc->operations && xdesc->operations->str2flag)
391 return xdesc->operations->str2flag(xdesc, compatible);
392 }
393#endif
394 default:
395 break;
396 }
397
398 return 0;
399}
400#endif