Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 2 | /* |
| 3 | * Copyright (C) Marvell International Ltd. and its affiliates |
| 4 | * Written-by: Prafulla Wadaskar <prafulla@marvell.com> |
| 5 | * |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 6 | * Copyright (C) 2015 Stefan Roese <sr@denx.de> |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 7 | */ |
| 8 | |
| 9 | #include <common.h> |
Simon Glass | 691d719 | 2020-05-10 11:40:02 -0600 | [diff] [blame] | 10 | #include <init.h> |
Lei Wen | a7efd71 | 2011-10-18 20:11:42 +0530 | [diff] [blame] | 11 | #include <asm/io.h> |
Stefan Roese | 3dc23f7 | 2014-10-22 12:13:06 +0200 | [diff] [blame] | 12 | #include <asm/arch/soc.h> |
Simon Glass | cd93d62 | 2020-05-10 11:40:13 -0600 | [diff] [blame] | 13 | #include <linux/bitops.h> |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 14 | |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 15 | #define TIMER_LOAD_VAL 0xffffffff |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 16 | |
Stefan Roese | 787ddb7 | 2015-09-03 12:47:07 +0200 | [diff] [blame] | 17 | static int init_done __attribute__((section(".data"))) = 0; |
Stefan Roese | ade741b | 2015-07-15 15:36:52 +0200 | [diff] [blame] | 18 | |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 19 | /* |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 20 | * Timer initialization |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 21 | */ |
| 22 | int timer_init(void) |
| 23 | { |
Stefan Roese | ade741b | 2015-07-15 15:36:52 +0200 | [diff] [blame] | 24 | /* Only init the timer once */ |
| 25 | if (init_done) |
| 26 | return 0; |
| 27 | init_done = 1; |
| 28 | |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 29 | /* load value into timer */ |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 30 | writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x10); |
| 31 | writel(TIMER_LOAD_VAL, MVEBU_TIMER_BASE + 0x14); |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 32 | |
Stefan Roese | 81e33f4 | 2015-12-21 13:56:33 +0100 | [diff] [blame] | 33 | #if defined(CONFIG_ARCH_MVEBU) |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 34 | /* On Armada XP / 38x ..., the 25MHz clock source needs to be enabled */ |
| 35 | setbits_le32(MVEBU_TIMER_BASE + 0x00, BIT(11)); |
| 36 | #endif |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 37 | /* enable timer in auto reload mode */ |
Stefan Roese | 2fbc18f | 2015-10-22 12:36:31 +0200 | [diff] [blame] | 38 | setbits_le32(MVEBU_TIMER_BASE + 0x00, 0x3); |
Prafulla Wadaskar | 4efb77d | 2009-06-20 11:01:53 +0200 | [diff] [blame] | 39 | |
| 40 | return 0; |
| 41 | } |