Tom Rini | 83d290c | 2018-05-06 17:58:06 -0400 | [diff] [blame] | 1 | // SPDX-License-Identifier: GPL-2.0+ |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 2 | /* |
| 3 | * (C) Copyright 2000, 2001 |
| 4 | * Rich Ireland, Enterasys Networks, rireland@enterasys.com. |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 5 | */ |
| 6 | |
| 7 | /* |
| 8 | * FPGA support |
| 9 | */ |
| 10 | #include <common.h> |
| 11 | #include <command.h> |
wdenk | 8bde7f7 | 2003-06-27 21:31:46 +0000 | [diff] [blame] | 12 | #include <fpga.h> |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 13 | #include <fs.h> |
wdenk | c3d2b4b | 2005-01-22 18:13:04 +0000 | [diff] [blame] | 14 | #include <malloc.h> |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 15 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 16 | /* Local functions */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 17 | static int fpga_get_op(char *opstr); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 18 | |
| 19 | /* Local defines */ |
Michal Simek | 5cf2228 | 2017-01-06 11:20:54 +0100 | [diff] [blame] | 20 | enum { |
| 21 | FPGA_NONE = -1, |
| 22 | FPGA_INFO, |
| 23 | FPGA_LOAD, |
| 24 | FPGA_LOADB, |
| 25 | FPGA_DUMP, |
| 26 | FPGA_LOADMK, |
| 27 | FPGA_LOADP, |
| 28 | FPGA_LOADBP, |
| 29 | FPGA_LOADFS, |
| 30 | }; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 31 | |
| 32 | /* ------------------------------------------------------------------------- */ |
| 33 | /* command form: |
| 34 | * fpga <op> <device number> <data addr> <datasize> |
| 35 | * where op is 'load', 'dump', or 'info' |
| 36 | * If there is no device number field, the fpga environment variable is used. |
| 37 | * If there is no data addr field, the fpgadata environment variable is used. |
| 38 | * The info command requires no data address field. |
| 39 | */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 40 | int do_fpga(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 41 | { |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 42 | int op, dev = FPGA_INVALID_DEVICE; |
| 43 | size_t data_size = 0; |
| 44 | void *fpga_data = NULL; |
Simon Glass | 00caae6 | 2017-08-03 12:22:12 -0600 | [diff] [blame] | 45 | char *devstr = env_get("fpga"); |
| 46 | char *datastr = env_get("fpgadata"); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 47 | int rc = FPGA_FAIL; |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 48 | int wrong_parms = 0; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 49 | #if defined(CONFIG_FIT) |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 50 | const char *fit_uname = NULL; |
| 51 | ulong fit_addr; |
| 52 | #endif |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 53 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 54 | fpga_fs_info fpga_fsinfo; |
| 55 | fpga_fsinfo.fstype = FS_TYPE_ANY; |
| 56 | #endif |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 57 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 58 | if (devstr) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 59 | dev = (int) simple_strtoul(devstr, NULL, 16); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 60 | if (datastr) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 61 | fpga_data = (void *)simple_strtoul(datastr, NULL, 16); |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 62 | |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame^] | 63 | if (argc > 9 || argc < 2) { |
| 64 | debug("%s: Too many or too few args (%d)\n", __func__, argc); |
| 65 | return CMD_RET_USAGE; |
| 66 | } |
| 67 | |
| 68 | op = (int)fpga_get_op(argv[1]); |
| 69 | |
| 70 | switch (op) { |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 71 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame^] | 72 | case FPGA_LOADFS: |
| 73 | if (argc < 9) |
| 74 | return CMD_RET_USAGE; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 75 | fpga_fsinfo.blocksize = (unsigned int) |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame^] | 76 | simple_strtoul(argv[5], NULL, 16); |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 77 | fpga_fsinfo.interface = argv[6]; |
| 78 | fpga_fsinfo.dev_part = argv[7]; |
| 79 | fpga_fsinfo.filename = argv[8]; |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame^] | 80 | argc = 5; |
| 81 | break; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 82 | #endif |
Siva Durga Prasad Paladugu | f595361 | 2018-05-31 15:10:21 +0530 | [diff] [blame^] | 83 | default: |
| 84 | break; |
| 85 | } |
| 86 | |
| 87 | switch (argc) { |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 88 | case 5: /* fpga <op> <dev> <data> <datasize> */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 89 | data_size = simple_strtoul(argv[4], NULL, 16); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 90 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 91 | case 4: /* fpga <op> <dev> <data> */ |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 92 | #if defined(CONFIG_FIT) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 93 | if (fit_parse_subimage(argv[3], (ulong)fpga_data, |
| 94 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 95 | fpga_data = (void *)fit_addr; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 96 | debug("* fpga: subimage '%s' from FIT image ", |
| 97 | fit_uname); |
| 98 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 99 | } else |
| 100 | #endif |
| 101 | { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 102 | fpga_data = (void *)simple_strtoul(argv[3], NULL, 16); |
Stefano Babic | 06297db | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 103 | debug("* fpga: cmdline image address = 0x%08lx\n", |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 104 | (ulong)fpga_data); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 105 | } |
Michal Simek | 455ad58 | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 106 | debug("%s: fpga_data = 0x%lx\n", __func__, (ulong)fpga_data); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 107 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 108 | case 3: /* fpga <op> <dev | data addr> */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 109 | dev = (int)simple_strtoul(argv[2], NULL, 16); |
Stefano Babic | 06297db | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 110 | debug("%s: device = %d\n", __func__, dev); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 111 | /* FIXME - this is a really weak test */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 112 | if ((argc == 3) && (dev > fpga_count())) { |
| 113 | /* must be buffer ptr */ |
Stefano Babic | 06297db | 2011-12-28 06:47:01 +0000 | [diff] [blame] | 114 | debug("%s: Assuming buffer pointer in arg 3\n", |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 115 | __func__); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 116 | |
| 117 | #if defined(CONFIG_FIT) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 118 | if (fit_parse_subimage(argv[2], (ulong)fpga_data, |
| 119 | &fit_addr, &fit_uname)) { |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 120 | fpga_data = (void *)fit_addr; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 121 | debug("* fpga: subimage '%s' from FIT image ", |
| 122 | fit_uname); |
| 123 | debug("at 0x%08lx\n", fit_addr); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 124 | } else |
| 125 | #endif |
| 126 | { |
Michal Simek | 455ad58 | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 127 | fpga_data = (void *)(uintptr_t)dev; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 128 | debug("* fpga: cmdline image addr = 0x%08lx\n", |
| 129 | (ulong)fpga_data); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 130 | } |
| 131 | |
Michal Simek | 455ad58 | 2016-01-05 13:51:48 +0100 | [diff] [blame] | 132 | debug("%s: fpga_data = 0x%lx\n", |
| 133 | __func__, (ulong)fpga_data); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 134 | dev = FPGA_INVALID_DEVICE; /* reset device num */ |
| 135 | } |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 136 | } |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 137 | |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 138 | if (dev == FPGA_INVALID_DEVICE) { |
| 139 | puts("FPGA device not specified\n"); |
| 140 | op = FPGA_NONE; |
| 141 | } |
| 142 | |
| 143 | switch (op) { |
| 144 | case FPGA_NONE: |
| 145 | case FPGA_INFO: |
| 146 | break; |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 147 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 148 | case FPGA_LOADFS: |
| 149 | /* Blocksize can be zero */ |
| 150 | if (!fpga_fsinfo.interface || !fpga_fsinfo.dev_part || |
| 151 | !fpga_fsinfo.filename) |
| 152 | wrong_parms = 1; |
| 153 | #endif |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 154 | case FPGA_LOAD: |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 155 | case FPGA_LOADP: |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 156 | case FPGA_LOADB: |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 157 | case FPGA_LOADBP: |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 158 | case FPGA_DUMP: |
| 159 | if (!fpga_data || !data_size) |
| 160 | wrong_parms = 1; |
| 161 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 162 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 163 | case FPGA_LOADMK: |
| 164 | if (!fpga_data) |
| 165 | wrong_parms = 1; |
| 166 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 167 | #endif |
Stefano Babic | a790b5b | 2010-10-19 09:22:52 +0200 | [diff] [blame] | 168 | } |
| 169 | |
| 170 | if (wrong_parms) { |
| 171 | puts("Wrong parameters for FPGA request\n"); |
| 172 | op = FPGA_NONE; |
| 173 | } |
| 174 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 175 | switch (op) { |
| 176 | case FPGA_NONE: |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 177 | return CMD_RET_USAGE; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 178 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 179 | case FPGA_INFO: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 180 | rc = fpga_info(dev); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 181 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 182 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 183 | case FPGA_LOAD: |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 184 | rc = fpga_load(dev, fpga_data, data_size, BIT_FULL); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 185 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 186 | |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 187 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 188 | case FPGA_LOADP: |
| 189 | rc = fpga_load(dev, fpga_data, data_size, BIT_PARTIAL); |
| 190 | break; |
| 191 | #endif |
| 192 | |
wdenk | 30ce5ab | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 193 | case FPGA_LOADB: |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 194 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_FULL); |
wdenk | 30ce5ab | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 195 | break; |
| 196 | |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 197 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 198 | case FPGA_LOADBP: |
| 199 | rc = fpga_loadbitstream(dev, fpga_data, data_size, BIT_PARTIAL); |
| 200 | break; |
| 201 | #endif |
| 202 | |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 203 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 204 | case FPGA_LOADFS: |
| 205 | rc = fpga_fsload(dev, fpga_data, data_size, &fpga_fsinfo); |
| 206 | break; |
| 207 | #endif |
| 208 | |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 209 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 210 | case FPGA_LOADMK: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 211 | switch (genimg_get_format(fpga_data)) { |
Heiko Schocher | 21d29f7 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 212 | #if defined(CONFIG_IMAGE_FORMAT_LEGACY) |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 213 | case IMAGE_FORMAT_LEGACY: |
| 214 | { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 215 | image_header_t *hdr = |
| 216 | (image_header_t *)fpga_data; |
| 217 | ulong data; |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 218 | uint8_t comp; |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 219 | |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 220 | comp = image_get_comp(hdr); |
| 221 | if (comp == IH_COMP_GZIP) { |
Michal Simek | 1b63aaa | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 222 | #if defined(CONFIG_GZIP) |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 223 | ulong image_buf = image_get_data(hdr); |
| 224 | data = image_get_load(hdr); |
| 225 | ulong image_size = ~0UL; |
| 226 | |
| 227 | if (gunzip((void *)data, ~0UL, |
| 228 | (void *)image_buf, |
| 229 | &image_size) != 0) { |
| 230 | puts("GUNZIP: error\n"); |
| 231 | return 1; |
| 232 | } |
| 233 | data_size = image_size; |
Michal Simek | 1b63aaa | 2014-07-16 10:30:50 +0200 | [diff] [blame] | 234 | #else |
| 235 | puts("Gunzip image is not supported\n"); |
| 236 | return 1; |
| 237 | #endif |
Michal Simek | 32d7cdd | 2013-10-04 10:51:01 +0200 | [diff] [blame] | 238 | } else { |
| 239 | data = (ulong)image_get_data(hdr); |
| 240 | data_size = image_get_data_size(hdr); |
| 241 | } |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 242 | rc = fpga_load(dev, (void *)data, data_size, |
| 243 | BIT_FULL); |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 244 | } |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 245 | break; |
Heiko Schocher | 21d29f7 | 2014-05-28 11:33:33 +0200 | [diff] [blame] | 246 | #endif |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 247 | #if defined(CONFIG_FIT) |
| 248 | case IMAGE_FORMAT_FIT: |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 249 | { |
| 250 | const void *fit_hdr = (const void *)fpga_data; |
| 251 | int noffset; |
Wolfgang Denk | e6a857d | 2011-07-30 13:33:49 +0000 | [diff] [blame] | 252 | const void *fit_data; |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 253 | |
| 254 | if (fit_uname == NULL) { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 255 | puts("No FIT subimage unit name\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 256 | return 1; |
| 257 | } |
| 258 | |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 259 | if (!fit_check_format(fit_hdr)) { |
| 260 | puts("Bad FIT image format\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 261 | return 1; |
| 262 | } |
| 263 | |
| 264 | /* get fpga component image node offset */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 265 | noffset = fit_image_get_node(fit_hdr, |
| 266 | fit_uname); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 267 | if (noffset < 0) { |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 268 | printf("Can't find '%s' FIT subimage\n", |
| 269 | fit_uname); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 270 | return 1; |
| 271 | } |
| 272 | |
| 273 | /* verify integrity */ |
Simon Glass | b8da836 | 2013-05-07 06:11:57 +0000 | [diff] [blame] | 274 | if (!fit_image_verify(fit_hdr, noffset)) { |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 275 | puts ("Bad Data Hash\n"); |
| 276 | return 1; |
| 277 | } |
| 278 | |
| 279 | /* get fpga subimage data address and length */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 280 | if (fit_image_get_data(fit_hdr, noffset, |
| 281 | &fit_data, &data_size)) { |
| 282 | puts("Fpga subimage data not found\n"); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 283 | return 1; |
| 284 | } |
| 285 | |
Michal Simek | 7a78bd2 | 2014-05-02 14:09:30 +0200 | [diff] [blame] | 286 | rc = fpga_load(dev, fit_data, data_size, |
| 287 | BIT_FULL); |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 288 | } |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 289 | break; |
| 290 | #endif |
| 291 | default: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 292 | puts("** Unknown image type\n"); |
Marian Balakowicz | d5934ad | 2008-02-04 08:28:09 +0100 | [diff] [blame] | 293 | rc = FPGA_FAIL; |
| 294 | break; |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 295 | } |
| 296 | break; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 297 | #endif |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 298 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 299 | case FPGA_DUMP: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 300 | rc = fpga_dump(dev, fpga_data, data_size); |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 301 | break; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 302 | |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 303 | default: |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 304 | printf("Unknown operation\n"); |
Simon Glass | 4c12eeb | 2011-12-10 08:44:01 +0000 | [diff] [blame] | 305 | return CMD_RET_USAGE; |
wdenk | d4ca31c | 2004-01-02 14:00:00 +0000 | [diff] [blame] | 306 | } |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 307 | return rc; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 308 | } |
| 309 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 310 | /* |
| 311 | * Map op to supported operations. We don't use a table since we |
| 312 | * would just have to relocate it from flash anyway. |
| 313 | */ |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 314 | static int fpga_get_op(char *opstr) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 315 | { |
| 316 | int op = FPGA_NONE; |
| 317 | |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 318 | if (!strcmp("info", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 319 | op = FPGA_INFO; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 320 | else if (!strcmp("loadb", opstr)) |
wdenk | 30ce5ab | 2005-01-09 18:12:51 +0000 | [diff] [blame] | 321 | op = FPGA_LOADB; |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 322 | else if (!strcmp("load", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 323 | op = FPGA_LOAD; |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 324 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 325 | else if (!strcmp("loadp", opstr)) |
| 326 | op = FPGA_LOADP; |
| 327 | #endif |
| 328 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 329 | else if (!strcmp("loadbp", opstr)) |
| 330 | op = FPGA_LOADBP; |
| 331 | #endif |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 332 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 333 | else if (!strcmp("loadfs", opstr)) |
| 334 | op = FPGA_LOADFS; |
| 335 | #endif |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 336 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 337 | else if (!strcmp("loadmk", opstr)) |
Stefan Roese | f0ff469 | 2006-08-15 14:15:51 +0200 | [diff] [blame] | 338 | op = FPGA_LOADMK; |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 339 | #endif |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 340 | else if (!strcmp("dump", opstr)) |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 341 | op = FPGA_DUMP; |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 342 | |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 343 | if (op == FPGA_NONE) |
| 344 | printf("Unknown fpga operation \"%s\"\n", opstr); |
| 345 | |
wdenk | 4a9cbbe | 2002-08-27 09:48:53 +0000 | [diff] [blame] | 346 | return op; |
| 347 | } |
| 348 | |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 349 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 350 | U_BOOT_CMD(fpga, 9, 1, do_fpga, |
| 351 | #else |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 352 | U_BOOT_CMD(fpga, 6, 1, do_fpga, |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 353 | #endif |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 354 | "loadable FPGA image support", |
| 355 | "[operation type] [device number] [image address] [image size]\n" |
| 356 | "fpga operations:\n" |
Michal Simek | 2d73f0d | 2015-01-26 08:52:27 +0100 | [diff] [blame] | 357 | " dump\t[dev] [address] [size]\tLoad device to memory buffer\n" |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 358 | " info\t[dev]\t\t\tlist known device information\n" |
| 359 | " load\t[dev] [address] [size]\tLoad device from memory buffer\n" |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 360 | #if defined(CONFIG_CMD_FPGA_LOADP) |
| 361 | " loadp\t[dev] [address] [size]\t" |
| 362 | "Load device from memory buffer with partial bitstream\n" |
| 363 | #endif |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 364 | " loadb\t[dev] [address] [size]\t" |
| 365 | "Load device from bitstream buffer (Xilinx only)\n" |
Michal Simek | 6719386 | 2014-05-02 13:43:39 +0200 | [diff] [blame] | 366 | #if defined(CONFIG_CMD_FPGA_LOADBP) |
| 367 | " loadbp\t[dev] [address] [size]\t" |
| 368 | "Load device from bitstream buffer with partial bitstream" |
| 369 | "(Xilinx only)\n" |
| 370 | #endif |
Siva Durga Prasad Paladugu | 1a89766 | 2014-03-14 16:35:37 +0530 | [diff] [blame] | 371 | #if defined(CONFIG_CMD_FPGA_LOADFS) |
| 372 | "Load device from filesystem (FAT by default) (Xilinx only)\n" |
| 373 | " loadfs [dev] [address] [image size] [blocksize] <interface>\n" |
| 374 | " [<dev[:part]>] <filename>\n" |
| 375 | #endif |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 376 | #if defined(CONFIG_CMD_FPGA_LOADMK) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 377 | " loadmk [dev] [address]\tLoad device generated with mkimage" |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 378 | #if defined(CONFIG_FIT) |
Michal Simek | fc59841 | 2013-04-26 13:10:07 +0200 | [diff] [blame] | 379 | "\n" |
| 380 | "\tFor loadmk operating on FIT format uImage address must include\n" |
| 381 | "\tsubimage unit name in the form of addr:<subimg_uname>" |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 382 | #endif |
Siva Durga Prasad Paladugu | 64e809a | 2014-03-14 16:35:38 +0530 | [diff] [blame] | 383 | #endif |
Marian Balakowicz | c28c4d1 | 2008-03-12 10:33:01 +0100 | [diff] [blame] | 384 | ); |