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Maxime Ripard6a3a2262017-02-27 18:22:14 +01001/*
2 * Copyright 2016 Mylène Josserand
3 *
4 * Mylène Josserand <mylene.josserand@free-electrons.com>
5 *
6 * This file is dual-licensed: you can use it either under the terms
7 * of the GPL or the X11 license, at your option. Note that this dual
8 * licensing only applies to this file, and not this project as a
9 * whole.
10 *
11 * a) This library is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License as
13 * published by the Free Software Foundation; either version 2 of the
14 * License, or (at your option) any later version.
15 *
16 * This library is distributed in the hope that it will be useful,
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
20 *
21 * Or, alternatively,
22 *
23 * b) Permission is hereby granted, free of charge, to any person
24 * obtaining a copy of this software and associated documentation
25 * files (the "Software"), to deal in the Software without
26 * restriction, including without limitation the rights to use,
27 * copy, modify, merge, publish, distribute, sublicense, and/or
28 * sell copies of the Software, and to permit persons to whom the
29 * Software is furnished to do so, subject to the following
30 * conditions:
31 *
32 * The above copyright notice and this permission notice shall be
33 * included in all copies or substantial portions of the Software.
34 *
35 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
36 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
37 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
38 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
39 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
40 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
42 * OTHER DEALINGS IN THE SOFTWARE.
43 */
44
Jagan Teki13b36fa2018-08-05 00:40:08 +053045#include "sun5i.dtsi"
46
47#include <dt-bindings/clock/sun5i-ccu.h>
Maxime Ripard6a3a2262017-02-27 18:22:14 +010048#include <dt-bindings/dma/sun4i-a10.h>
Jagan Teki13b36fa2018-08-05 00:40:08 +053049#include <dt-bindings/reset/sun5i-ccu.h>
Maxime Ripard6a3a2262017-02-27 18:22:14 +010050
51/ {
Maxime Ripard6a3a2262017-02-27 18:22:14 +010052 display-engine {
53 compatible = "allwinner,sun5i-a13-display-engine";
54 allwinner,pipelines = <&fe0>;
55 };
56
Jagan Teki13b36fa2018-08-05 00:40:08 +053057 soc@1c00000 {
58 pwm: pwm@1c20e00 {
Maxime Ripard6a3a2262017-02-27 18:22:14 +010059 compatible = "allwinner,sun5i-a10s-pwm";
60 reg = <0x01c20e00 0xc>;
Jagan Teki13b36fa2018-08-05 00:40:08 +053061 clocks = <&ccu CLK_HOSC>;
Maxime Ripard6a3a2262017-02-27 18:22:14 +010062 #pwm-cells = <3>;
63 status = "disabled";
64 };
65
Jagan Teki13b36fa2018-08-05 00:40:08 +053066 spdif: spdif@1c21000 {
Maxime Ripard6a3a2262017-02-27 18:22:14 +010067 #sound-dai-cells = <0>;
68 compatible = "allwinner,sun4i-a10-spdif";
69 reg = <0x01c21000 0x400>;
70 interrupts = <13>;
Jagan Teki13b36fa2018-08-05 00:40:08 +053071 clocks = <&ccu CLK_APB0_SPDIF>, <&ccu CLK_SPDIF>;
Maxime Ripard6a3a2262017-02-27 18:22:14 +010072 clock-names = "apb", "spdif";
73 dmas = <&dma SUN4I_DMA_NORMAL 2>,
74 <&dma SUN4I_DMA_NORMAL 2>;
75 dma-names = "rx", "tx";
76 status = "disabled";
77 };
78
Jagan Teki13b36fa2018-08-05 00:40:08 +053079 i2s0: i2s@1c22400 {
Maxime Ripard6a3a2262017-02-27 18:22:14 +010080 #sound-dai-cells = <0>;
81 compatible = "allwinner,sun4i-a10-i2s";
82 reg = <0x01c22400 0x400>;
83 interrupts = <16>;
Jagan Teki13b36fa2018-08-05 00:40:08 +053084 clocks = <&ccu CLK_APB0_I2S>, <&ccu CLK_I2S>;
Maxime Ripard6a3a2262017-02-27 18:22:14 +010085 clock-names = "apb", "mod";
86 dmas = <&dma SUN4I_DMA_NORMAL 3>,
87 <&dma SUN4I_DMA_NORMAL 3>;
88 dma-names = "rx", "tx";
89 status = "disabled";
90 };
Jagan Teki13b36fa2018-08-05 00:40:08 +053091 };
92};
Maxime Ripard6a3a2262017-02-27 18:22:14 +010093
Jagan Teki13b36fa2018-08-05 00:40:08 +053094&ccu {
95 compatible = "nextthing,gr8-ccu";
96};
Maxime Ripard6a3a2262017-02-27 18:22:14 +010097
Jagan Teki13b36fa2018-08-05 00:40:08 +053098&pio {
99 compatible = "nextthing,gr8-pinctrl";
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100100
Jagan Teki13b36fa2018-08-05 00:40:08 +0530101 i2s0_data_pins_a: i2s0-data@0 {
102 pins = "PB6", "PB7", "PB8", "PB9";
103 function = "i2s0";
104 };
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100105
Jagan Teki13b36fa2018-08-05 00:40:08 +0530106 i2s0_mclk_pins_a: i2s0-mclk@0 {
107 pins = "PB5";
108 function = "i2s0";
109 };
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100110
Jagan Teki13b36fa2018-08-05 00:40:08 +0530111 pwm1_pins: pwm1 {
112 pins = "PG13";
113 function = "pwm1";
114 };
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100115
Jagan Teki13b36fa2018-08-05 00:40:08 +0530116 spdif_tx_pins_a: spdif@0 {
117 pins = "PB10";
118 function = "spdif";
119 bias-pull-up;
120 };
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100121
Jagan Teki13b36fa2018-08-05 00:40:08 +0530122 uart1_cts_rts_pins_a: uart1-cts-rts@0 {
123 pins = "PG5", "PG6";
124 function = "uart1";
Maxime Ripard6a3a2262017-02-27 18:22:14 +0100125 };
126};