Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 1 | /* |
| 2 | * (C) Copyright 2012-2013 Henrik Nordstrom <henrik@henriknordstrom.net> |
| 3 | * (C) Copyright 2013 Luke Kenneth Casson Leighton <lkcl@lkcl.net> |
| 4 | * |
| 5 | * (C) Copyright 2007-2011 |
| 6 | * Allwinner Technology Co., Ltd. <www.allwinnertech.com> |
| 7 | * Tom Cubie <tangliang@allwinnertech.com> |
| 8 | * |
| 9 | * Some board init for the Allwinner A10-evb board. |
| 10 | * |
| 11 | * SPDX-License-Identifier: GPL-2.0+ |
| 12 | */ |
| 13 | |
| 14 | #include <common.h> |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 15 | #include <mmc.h> |
Hans de Goede | 2428920 | 2014-06-13 22:55:51 +0200 | [diff] [blame] | 16 | #ifdef CONFIG_AXP152_POWER |
| 17 | #include <axp152.h> |
| 18 | #endif |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 19 | #ifdef CONFIG_AXP209_POWER |
| 20 | #include <axp209.h> |
| 21 | #endif |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 22 | #ifdef CONFIG_AXP221_POWER |
| 23 | #include <axp221.h> |
| 24 | #endif |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 25 | #include <asm/arch/clock.h> |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 26 | #include <asm/arch/cpu.h> |
Luc Verhaegen | 2d7a084 | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 27 | #include <asm/arch/display.h> |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 28 | #include <asm/arch/dram.h> |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 29 | #include <asm/arch/gpio.h> |
| 30 | #include <asm/arch/mmc.h> |
Hans de Goede | 2aacc42 | 2015-04-27 15:05:10 +0200 | [diff] [blame] | 31 | #include <asm/arch/usb_phy.h> |
Hans de Goede | 4f7e01c | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 32 | #include <asm/gpio.h> |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 33 | #include <asm/io.h> |
Hans de Goede | f62bfa5 | 2015-08-15 11:55:26 +0200 | [diff] [blame^] | 34 | #include <nand.h> |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 35 | #include <net.h> |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 36 | |
Hans de Goede | 5541008 | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 37 | #if defined CONFIG_VIDEO_LCD_PANEL_I2C && !(defined CONFIG_SPL_BUILD) |
| 38 | /* So that we can use pin names in Kconfig and sunxi_name_to_gpio() */ |
| 39 | int soft_i2c_gpio_sda; |
| 40 | int soft_i2c_gpio_scl; |
Hans de Goede | 4f7e01c | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 41 | |
| 42 | static int soft_i2c_board_init(void) |
| 43 | { |
| 44 | int ret; |
| 45 | |
| 46 | soft_i2c_gpio_sda = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SDA); |
| 47 | if (soft_i2c_gpio_sda < 0) { |
| 48 | printf("Error invalid soft i2c sda pin: '%s', err %d\n", |
| 49 | CONFIG_VIDEO_LCD_PANEL_I2C_SDA, soft_i2c_gpio_sda); |
| 50 | return soft_i2c_gpio_sda; |
| 51 | } |
| 52 | ret = gpio_request(soft_i2c_gpio_sda, "soft-i2c-sda"); |
| 53 | if (ret) { |
| 54 | printf("Error requesting soft i2c sda pin: '%s', err %d\n", |
| 55 | CONFIG_VIDEO_LCD_PANEL_I2C_SDA, ret); |
| 56 | return ret; |
| 57 | } |
| 58 | |
| 59 | soft_i2c_gpio_scl = sunxi_name_to_gpio(CONFIG_VIDEO_LCD_PANEL_I2C_SCL); |
| 60 | if (soft_i2c_gpio_scl < 0) { |
| 61 | printf("Error invalid soft i2c scl pin: '%s', err %d\n", |
| 62 | CONFIG_VIDEO_LCD_PANEL_I2C_SCL, soft_i2c_gpio_scl); |
| 63 | return soft_i2c_gpio_scl; |
| 64 | } |
| 65 | ret = gpio_request(soft_i2c_gpio_scl, "soft-i2c-scl"); |
| 66 | if (ret) { |
| 67 | printf("Error requesting soft i2c scl pin: '%s', err %d\n", |
| 68 | CONFIG_VIDEO_LCD_PANEL_I2C_SCL, ret); |
| 69 | return ret; |
| 70 | } |
| 71 | |
| 72 | return 0; |
| 73 | } |
| 74 | #else |
| 75 | static int soft_i2c_board_init(void) { return 0; } |
Hans de Goede | 5541008 | 2015-02-16 17:23:25 +0100 | [diff] [blame] | 76 | #endif |
| 77 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 78 | DECLARE_GLOBAL_DATA_PTR; |
| 79 | |
| 80 | /* add board specific code here */ |
| 81 | int board_init(void) |
| 82 | { |
Hans de Goede | 2fcf033 | 2015-04-25 17:25:14 +0200 | [diff] [blame] | 83 | int id_pfr1, ret; |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 84 | |
| 85 | gd->bd->bi_boot_params = (PHYS_SDRAM_0 + 0x100); |
| 86 | |
| 87 | asm volatile("mrc p15, 0, %0, c0, c1, 1" : "=r"(id_pfr1)); |
| 88 | debug("id_pfr1: 0x%08x\n", id_pfr1); |
| 89 | /* Generic Timer Extension available? */ |
| 90 | if ((id_pfr1 >> 16) & 0xf) { |
| 91 | debug("Setting CNTFRQ\n"); |
| 92 | /* CNTFRQ == 24 MHz */ |
| 93 | asm volatile("mcr p15, 0, %0, c14, c0, 0" : : "r"(24000000)); |
| 94 | } |
| 95 | |
Hans de Goede | 2fcf033 | 2015-04-25 17:25:14 +0200 | [diff] [blame] | 96 | ret = axp_gpio_init(); |
| 97 | if (ret) |
| 98 | return ret; |
| 99 | |
Hans de Goede | 4f7e01c | 2015-04-23 23:23:50 +0200 | [diff] [blame] | 100 | /* Uses dm gpio code so do this here and not in i2c_init_board() */ |
| 101 | return soft_i2c_board_init(); |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 102 | } |
| 103 | |
| 104 | int dram_init(void) |
| 105 | { |
| 106 | gd->ram_size = get_ram_size((long *)PHYS_SDRAM_0, PHYS_SDRAM_0_SIZE); |
| 107 | |
| 108 | return 0; |
| 109 | } |
| 110 | |
Karol Gugala | ad00829 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 111 | #if defined(CONFIG_SPL_NAND_SUNXI) && defined(CONFIG_SPL_BUILD) |
| 112 | static void nand_pinmux_setup(void) |
| 113 | { |
| 114 | unsigned int pin; |
| 115 | for (pin = SUNXI_GPC(0); pin <= SUNXI_GPC(6); pin++) |
| 116 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); |
| 117 | |
| 118 | for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(22); pin++) |
| 119 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_NAND); |
| 120 | |
| 121 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_NAND); |
| 122 | } |
| 123 | |
| 124 | static void nand_clock_setup(void) |
| 125 | { |
| 126 | struct sunxi_ccm_reg *const ccm = |
| 127 | (struct sunxi_ccm_reg *)SUNXI_CCM_BASE; |
| 128 | setbits_le32(&ccm->ahb_gate0, (CLK_GATE_OPEN << AHB_GATE_OFFSET_NAND0)); |
| 129 | setbits_le32(&ccm->nand0_clk_cfg, CCM_NAND_CTRL_ENABLE | AHB_DIV_1); |
| 130 | } |
Hans de Goede | f62bfa5 | 2015-08-15 11:55:26 +0200 | [diff] [blame^] | 131 | |
| 132 | void board_nand_init(void) |
| 133 | { |
| 134 | nand_pinmux_setup(); |
| 135 | nand_clock_setup(); |
| 136 | } |
Karol Gugala | ad00829 | 2015-07-23 14:33:01 +0200 | [diff] [blame] | 137 | #endif |
| 138 | |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 139 | #ifdef CONFIG_GENERIC_MMC |
| 140 | static void mmc_pinmux_setup(int sdc) |
| 141 | { |
| 142 | unsigned int pin; |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 143 | __maybe_unused int pins; |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 144 | |
| 145 | switch (sdc) { |
| 146 | case 0: |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 147 | /* SDC0: PF0-PF5 */ |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 148 | for (pin = SUNXI_GPF(0); pin <= SUNXI_GPF(5); pin++) { |
Paul Kocialkowski | 487b327 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 149 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPF_SDC0); |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 150 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 151 | sunxi_gpio_set_drv(pin, 2); |
| 152 | } |
| 153 | break; |
| 154 | |
| 155 | case 1: |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 156 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC1_PINS); |
| 157 | |
| 158 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 159 | if (pins == SUNXI_GPIO_H) { |
| 160 | /* SDC1: PH22-PH-27 */ |
| 161 | for (pin = SUNXI_GPH(22); pin <= SUNXI_GPH(27); pin++) { |
| 162 | sunxi_gpio_set_cfgpin(pin, SUN4I_GPH_SDC1); |
| 163 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 164 | sunxi_gpio_set_drv(pin, 2); |
| 165 | } |
| 166 | } else { |
| 167 | /* SDC1: PG0-PG5 */ |
| 168 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 169 | sunxi_gpio_set_cfgpin(pin, SUN4I_GPG_SDC1); |
| 170 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 171 | sunxi_gpio_set_drv(pin, 2); |
| 172 | } |
| 173 | } |
| 174 | #elif defined(CONFIG_MACH_SUN5I) |
| 175 | /* SDC1: PG3-PG8 */ |
Hans de Goede | bbff84b | 2014-10-03 16:44:57 +0200 | [diff] [blame] | 176 | for (pin = SUNXI_GPG(3); pin <= SUNXI_GPG(8); pin++) { |
Paul Kocialkowski | 487b327 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 177 | sunxi_gpio_set_cfgpin(pin, SUN5I_GPG_SDC1); |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 178 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 179 | sunxi_gpio_set_drv(pin, 2); |
| 180 | } |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 181 | #elif defined(CONFIG_MACH_SUN6I) |
| 182 | /* SDC1: PG0-PG5 */ |
| 183 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 184 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPG_SDC1); |
| 185 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 186 | sunxi_gpio_set_drv(pin, 2); |
| 187 | } |
| 188 | #elif defined(CONFIG_MACH_SUN8I) |
| 189 | if (pins == SUNXI_GPIO_D) { |
| 190 | /* SDC1: PD2-PD7 */ |
| 191 | for (pin = SUNXI_GPD(2); pin <= SUNXI_GPD(7); pin++) { |
| 192 | sunxi_gpio_set_cfgpin(pin, SUN8I_GPD_SDC1); |
| 193 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 194 | sunxi_gpio_set_drv(pin, 2); |
| 195 | } |
| 196 | } else { |
| 197 | /* SDC1: PG0-PG5 */ |
| 198 | for (pin = SUNXI_GPG(0); pin <= SUNXI_GPG(5); pin++) { |
| 199 | sunxi_gpio_set_cfgpin(pin, SUN8I_GPG_SDC1); |
| 200 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 201 | sunxi_gpio_set_drv(pin, 2); |
| 202 | } |
| 203 | } |
| 204 | #endif |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 205 | break; |
| 206 | |
| 207 | case 2: |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 208 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC2_PINS); |
| 209 | |
| 210 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 211 | /* SDC2: PC6-PC11 */ |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 212 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(11); pin++) { |
Paul Kocialkowski | 487b327 | 2015-03-22 18:12:22 +0100 | [diff] [blame] | 213 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 214 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 215 | sunxi_gpio_set_drv(pin, 2); |
| 216 | } |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 217 | #elif defined(CONFIG_MACH_SUN5I) |
| 218 | if (pins == SUNXI_GPIO_E) { |
| 219 | /* SDC2: PE4-PE9 */ |
| 220 | for (pin = SUNXI_GPE(4); pin <= SUNXI_GPD(9); pin++) { |
| 221 | sunxi_gpio_set_cfgpin(pin, SUN5I_GPE_SDC2); |
| 222 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 223 | sunxi_gpio_set_drv(pin, 2); |
| 224 | } |
| 225 | } else { |
| 226 | /* SDC2: PC6-PC15 */ |
| 227 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 228 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 229 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 230 | sunxi_gpio_set_drv(pin, 2); |
| 231 | } |
| 232 | } |
| 233 | #elif defined(CONFIG_MACH_SUN6I) |
| 234 | if (pins == SUNXI_GPIO_A) { |
| 235 | /* SDC2: PA9-PA14 */ |
| 236 | for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { |
| 237 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC2); |
| 238 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 239 | sunxi_gpio_set_drv(pin, 2); |
| 240 | } |
| 241 | } else { |
| 242 | /* SDC2: PC6-PC15, PC24 */ |
| 243 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 244 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 245 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 246 | sunxi_gpio_set_drv(pin, 2); |
| 247 | } |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 248 | |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 249 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUNXI_GPC_SDC2); |
| 250 | sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); |
| 251 | sunxi_gpio_set_drv(SUNXI_GPC(24), 2); |
| 252 | } |
| 253 | #elif defined(CONFIG_MACH_SUN8I) |
| 254 | /* SDC2: PC5-PC6, PC8-PC16 */ |
| 255 | for (pin = SUNXI_GPC(5); pin <= SUNXI_GPC(6); pin++) { |
| 256 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 257 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 258 | sunxi_gpio_set_drv(pin, 2); |
| 259 | } |
Paul Kocialkowski | 8deacca | 2015-03-22 18:12:23 +0100 | [diff] [blame] | 260 | |
| 261 | for (pin = SUNXI_GPC(8); pin <= SUNXI_GPC(16); pin++) { |
| 262 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPC_SDC2); |
| 263 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 264 | sunxi_gpio_set_drv(pin, 2); |
| 265 | } |
| 266 | #endif |
| 267 | break; |
| 268 | |
| 269 | case 3: |
| 270 | pins = sunxi_name_to_gpio_bank(CONFIG_MMC3_PINS); |
| 271 | |
| 272 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 273 | /* SDC3: PI4-PI9 */ |
| 274 | for (pin = SUNXI_GPI(4); pin <= SUNXI_GPI(9); pin++) { |
| 275 | sunxi_gpio_set_cfgpin(pin, SUNXI_GPI_SDC3); |
| 276 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 277 | sunxi_gpio_set_drv(pin, 2); |
| 278 | } |
| 279 | #elif defined(CONFIG_MACH_SUN6I) |
| 280 | if (pins == SUNXI_GPIO_A) { |
| 281 | /* SDC3: PA9-PA14 */ |
| 282 | for (pin = SUNXI_GPA(9); pin <= SUNXI_GPA(14); pin++) { |
| 283 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPA_SDC3); |
| 284 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 285 | sunxi_gpio_set_drv(pin, 2); |
| 286 | } |
| 287 | } else { |
| 288 | /* SDC3: PC6-PC15, PC24 */ |
| 289 | for (pin = SUNXI_GPC(6); pin <= SUNXI_GPC(15); pin++) { |
| 290 | sunxi_gpio_set_cfgpin(pin, SUN6I_GPC_SDC3); |
| 291 | sunxi_gpio_set_pull(pin, SUNXI_GPIO_PULL_UP); |
| 292 | sunxi_gpio_set_drv(pin, 2); |
| 293 | } |
| 294 | |
| 295 | sunxi_gpio_set_cfgpin(SUNXI_GPC(24), SUN6I_GPC_SDC3); |
| 296 | sunxi_gpio_set_pull(SUNXI_GPC(24), SUNXI_GPIO_PULL_UP); |
| 297 | sunxi_gpio_set_drv(SUNXI_GPC(24), 2); |
| 298 | } |
| 299 | #endif |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 300 | break; |
| 301 | |
| 302 | default: |
| 303 | printf("sunxi: invalid MMC slot %d for pinmux setup\n", sdc); |
| 304 | break; |
| 305 | } |
| 306 | } |
| 307 | |
| 308 | int board_mmc_init(bd_t *bis) |
| 309 | { |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 310 | __maybe_unused struct mmc *mmc0, *mmc1; |
| 311 | __maybe_unused char buf[512]; |
| 312 | |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 313 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT); |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 314 | mmc0 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT); |
| 315 | if (!mmc0) |
| 316 | return -1; |
| 317 | |
Hans de Goede | 2ccfac0 | 2014-10-02 20:43:50 +0200 | [diff] [blame] | 318 | #if CONFIG_MMC_SUNXI_SLOT_EXTRA != -1 |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 319 | mmc_pinmux_setup(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 320 | mmc1 = sunxi_mmc_init(CONFIG_MMC_SUNXI_SLOT_EXTRA); |
| 321 | if (!mmc1) |
| 322 | return -1; |
| 323 | #endif |
| 324 | |
Daniel Kochmański | bf5b9b1 | 2015-05-29 17:21:00 +0200 | [diff] [blame] | 325 | #if !defined(CONFIG_SPL_BUILD) && CONFIG_MMC_SUNXI_SLOT_EXTRA == 2 |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 326 | /* |
Daniel Kochmański | bf5b9b1 | 2015-05-29 17:21:00 +0200 | [diff] [blame] | 327 | * On systems with an emmc (mmc2), figure out if we are booting from |
| 328 | * the emmc and if we are make it "mmc dev 0" so that boot.scr, etc. |
| 329 | * are searched there first. Note we only do this for u-boot proper, |
| 330 | * not for the SPL, see spl_boot_device(). |
Hans de Goede | e79c7c8 | 2014-10-02 21:13:54 +0200 | [diff] [blame] | 331 | */ |
Daniel Kochmański | bf5b9b1 | 2015-05-29 17:21:00 +0200 | [diff] [blame] | 332 | if (!sunxi_mmc_has_egon_boot_signature(mmc0) && |
| 333 | sunxi_mmc_has_egon_boot_signature(mmc1)) { |
| 334 | /* Booting from emmc / mmc2, swap */ |
| 335 | mmc0->block_dev.dev = 1; |
| 336 | mmc1->block_dev.dev = 0; |
| 337 | } |
Ian Campbell | e24ea55 | 2014-05-05 14:42:31 +0100 | [diff] [blame] | 338 | #endif |
| 339 | |
| 340 | return 0; |
| 341 | } |
| 342 | #endif |
| 343 | |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 344 | void i2c_init_board(void) |
| 345 | { |
Paul Kocialkowski | 6c739c5 | 2015-04-10 23:09:52 +0200 | [diff] [blame] | 346 | #ifdef CONFIG_I2C0_ENABLE |
| 347 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN5I) || defined(CONFIG_MACH_SUN7I) |
| 348 | sunxi_gpio_set_cfgpin(SUNXI_GPB(0), SUN4I_GPB_TWI0); |
| 349 | sunxi_gpio_set_cfgpin(SUNXI_GPB(1), SUN4I_GPB_TWI0); |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 350 | clock_twi_onoff(0, 1); |
Paul Kocialkowski | 6c739c5 | 2015-04-10 23:09:52 +0200 | [diff] [blame] | 351 | #elif defined(CONFIG_MACH_SUN6I) |
| 352 | sunxi_gpio_set_cfgpin(SUNXI_GPH(14), SUN6I_GPH_TWI0); |
| 353 | sunxi_gpio_set_cfgpin(SUNXI_GPH(15), SUN6I_GPH_TWI0); |
| 354 | clock_twi_onoff(0, 1); |
| 355 | #elif defined(CONFIG_MACH_SUN8I) |
| 356 | sunxi_gpio_set_cfgpin(SUNXI_GPH(2), SUN8I_GPH_TWI0); |
| 357 | sunxi_gpio_set_cfgpin(SUNXI_GPH(3), SUN8I_GPH_TWI0); |
| 358 | clock_twi_onoff(0, 1); |
| 359 | #endif |
| 360 | #endif |
| 361 | |
| 362 | #ifdef CONFIG_I2C1_ENABLE |
| 363 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 364 | sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN4I_GPB_TWI1); |
| 365 | sunxi_gpio_set_cfgpin(SUNXI_GPB(19), SUN4I_GPB_TWI1); |
| 366 | clock_twi_onoff(1, 1); |
| 367 | #elif defined(CONFIG_MACH_SUN5I) |
| 368 | sunxi_gpio_set_cfgpin(SUNXI_GPB(15), SUN5I_GPB_TWI1); |
| 369 | sunxi_gpio_set_cfgpin(SUNXI_GPB(16), SUN5I_GPB_TWI1); |
| 370 | clock_twi_onoff(1, 1); |
| 371 | #elif defined(CONFIG_MACH_SUN6I) |
| 372 | sunxi_gpio_set_cfgpin(SUNXI_GPH(16), SUN6I_GPH_TWI1); |
| 373 | sunxi_gpio_set_cfgpin(SUNXI_GPH(17), SUN6I_GPH_TWI1); |
| 374 | clock_twi_onoff(1, 1); |
| 375 | #elif defined(CONFIG_MACH_SUN8I) |
| 376 | sunxi_gpio_set_cfgpin(SUNXI_GPH(4), SUN8I_GPH_TWI1); |
| 377 | sunxi_gpio_set_cfgpin(SUNXI_GPH(5), SUN8I_GPH_TWI1); |
| 378 | clock_twi_onoff(1, 1); |
| 379 | #endif |
| 380 | #endif |
| 381 | |
| 382 | #ifdef CONFIG_I2C2_ENABLE |
| 383 | #if defined(CONFIG_MACH_SUN4I) || defined(CONFIG_MACH_SUN7I) |
| 384 | sunxi_gpio_set_cfgpin(SUNXI_GPB(20), SUN4I_GPB_TWI2); |
| 385 | sunxi_gpio_set_cfgpin(SUNXI_GPB(21), SUN4I_GPB_TWI2); |
| 386 | clock_twi_onoff(2, 1); |
| 387 | #elif defined(CONFIG_MACH_SUN5I) |
| 388 | sunxi_gpio_set_cfgpin(SUNXI_GPB(17), SUN5I_GPB_TWI2); |
| 389 | sunxi_gpio_set_cfgpin(SUNXI_GPB(18), SUN5I_GPB_TWI2); |
| 390 | clock_twi_onoff(2, 1); |
| 391 | #elif defined(CONFIG_MACH_SUN6I) |
| 392 | sunxi_gpio_set_cfgpin(SUNXI_GPH(18), SUN6I_GPH_TWI2); |
| 393 | sunxi_gpio_set_cfgpin(SUNXI_GPH(19), SUN6I_GPH_TWI2); |
| 394 | clock_twi_onoff(2, 1); |
| 395 | #elif defined(CONFIG_MACH_SUN8I) |
| 396 | sunxi_gpio_set_cfgpin(SUNXI_GPE(12), SUN8I_GPE_TWI2); |
| 397 | sunxi_gpio_set_cfgpin(SUNXI_GPE(13), SUN8I_GPE_TWI2); |
| 398 | clock_twi_onoff(2, 1); |
| 399 | #endif |
| 400 | #endif |
| 401 | |
| 402 | #ifdef CONFIG_I2C3_ENABLE |
| 403 | #if defined(CONFIG_MACH_SUN6I) |
| 404 | sunxi_gpio_set_cfgpin(SUNXI_GPG(10), SUN6I_GPG_TWI3); |
| 405 | sunxi_gpio_set_cfgpin(SUNXI_GPG(11), SUN6I_GPG_TWI3); |
| 406 | clock_twi_onoff(3, 1); |
| 407 | #elif defined(CONFIG_MACH_SUN7I) |
| 408 | sunxi_gpio_set_cfgpin(SUNXI_GPI(0), SUN7I_GPI_TWI3); |
| 409 | sunxi_gpio_set_cfgpin(SUNXI_GPI(1), SUN7I_GPI_TWI3); |
| 410 | clock_twi_onoff(3, 1); |
| 411 | #endif |
| 412 | #endif |
| 413 | |
| 414 | #ifdef CONFIG_I2C4_ENABLE |
| 415 | #if defined(CONFIG_MACH_SUN7I) |
| 416 | sunxi_gpio_set_cfgpin(SUNXI_GPI(2), SUN7I_GPI_TWI4); |
| 417 | sunxi_gpio_set_cfgpin(SUNXI_GPI(3), SUN7I_GPI_TWI4); |
| 418 | clock_twi_onoff(4, 1); |
| 419 | #endif |
| 420 | #endif |
Hans de Goede | 6620377 | 2014-06-13 22:55:49 +0200 | [diff] [blame] | 421 | } |
| 422 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 423 | #ifdef CONFIG_SPL_BUILD |
| 424 | void sunxi_board_init(void) |
| 425 | { |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 426 | int power_failed = 0; |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 427 | unsigned long ramsize; |
| 428 | |
Hans de Goede | 2428920 | 2014-06-13 22:55:51 +0200 | [diff] [blame] | 429 | #ifdef CONFIG_AXP152_POWER |
| 430 | power_failed = axp152_init(); |
| 431 | power_failed |= axp152_set_dcdc2(1400); |
| 432 | power_failed |= axp152_set_dcdc3(1500); |
| 433 | power_failed |= axp152_set_dcdc4(1250); |
| 434 | power_failed |= axp152_set_ldo2(3000); |
| 435 | #endif |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 436 | #ifdef CONFIG_AXP209_POWER |
| 437 | power_failed |= axp209_init(); |
| 438 | power_failed |= axp209_set_dcdc2(1400); |
| 439 | power_failed |= axp209_set_dcdc3(1250); |
| 440 | power_failed |= axp209_set_ldo2(3000); |
| 441 | power_failed |= axp209_set_ldo3(2800); |
| 442 | power_failed |= axp209_set_ldo4(2800); |
| 443 | #endif |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 444 | #ifdef CONFIG_AXP221_POWER |
| 445 | power_failed = axp221_init(); |
Hans de Goede | 1262a85 | 2014-12-13 14:12:06 +0100 | [diff] [blame] | 446 | power_failed |= axp221_set_dcdc1(CONFIG_AXP221_DCDC1_VOLT); |
Hans de Goede | 7a0bbe6 | 2015-08-14 16:19:34 +0200 | [diff] [blame] | 447 | power_failed |= axp221_set_dcdc2(CONFIG_AXP221_DCDC2_VOLT); |
Hans de Goede | d3a96f7 | 2014-12-13 14:20:09 +0100 | [diff] [blame] | 448 | power_failed |= axp221_set_dcdc3(1200); /* VDD-CPU */ |
| 449 | #ifdef CONFIG_MACH_SUN6I |
| 450 | power_failed |= axp221_set_dcdc4(1200); /* A31:VDD-SYS */ |
| 451 | #else |
| 452 | power_failed |= axp221_set_dcdc4(0); /* A23:unused */ |
| 453 | #endif |
| 454 | power_failed |= axp221_set_dcdc5(1500); /* VCC-DRAM */ |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 455 | power_failed |= axp221_set_dldo1(CONFIG_AXP221_DLDO1_VOLT); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 456 | power_failed |= axp221_set_dldo4(CONFIG_AXP221_DLDO4_VOLT); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 457 | power_failed |= axp221_set_aldo1(CONFIG_AXP221_ALDO1_VOLT); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 458 | power_failed |= axp221_set_aldo2(CONFIG_AXP221_ALDO2_VOLT); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 459 | power_failed |= axp221_set_aldo3(CONFIG_AXP221_ALDO3_VOLT); |
Siarhei Siamashka | 6906df1 | 2015-01-19 05:23:30 +0200 | [diff] [blame] | 460 | power_failed |= axp221_set_eldo(3, CONFIG_AXP221_ELDO3_VOLT); |
Oliver Schinagl | 5c7f10f | 2013-07-26 12:56:58 +0200 | [diff] [blame] | 461 | #endif |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 462 | |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 463 | printf("DRAM:"); |
| 464 | ramsize = sunxi_dram_init(); |
| 465 | printf(" %lu MiB\n", ramsize >> 20); |
| 466 | if (!ramsize) |
| 467 | hang(); |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 468 | |
| 469 | /* |
| 470 | * Only clock up the CPU to full speed if we are reasonably |
| 471 | * assured it's being powered with suitable core voltage |
| 472 | */ |
| 473 | if (!power_failed) |
Iain Paton | e71b422 | 2015-03-28 10:26:38 +0000 | [diff] [blame] | 474 | clock_set_pll1(CONFIG_SYS_CLK_FREQ); |
Henrik Nordstrom | 14bc66b | 2014-06-13 22:55:50 +0200 | [diff] [blame] | 475 | else |
| 476 | printf("Failed to set core voltage! Can't set CPU frequency\n"); |
Ian Campbell | cba69ee | 2014-05-05 11:52:26 +0100 | [diff] [blame] | 477 | } |
| 478 | #endif |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 479 | |
Paul Kocialkowski | f1df758 | 2015-03-22 18:07:13 +0100 | [diff] [blame] | 480 | #ifdef CONFIG_USB_GADGET |
| 481 | int g_dnl_board_usb_cable_connected(void) |
| 482 | { |
Paul Kocialkowski | 5bfdca0 | 2015-05-16 19:52:10 +0200 | [diff] [blame] | 483 | return sunxi_usb_phy_vbus_detect(0); |
Paul Kocialkowski | f1df758 | 2015-03-22 18:07:13 +0100 | [diff] [blame] | 484 | } |
| 485 | #endif |
| 486 | |
Paul Kocialkowski | 9f85221 | 2015-03-28 18:35:36 +0100 | [diff] [blame] | 487 | #ifdef CONFIG_SERIAL_TAG |
| 488 | void get_board_serial(struct tag_serialnr *serialnr) |
| 489 | { |
| 490 | char *serial_string; |
| 491 | unsigned long long serial; |
| 492 | |
| 493 | serial_string = getenv("serial#"); |
| 494 | |
| 495 | if (serial_string) { |
| 496 | serial = simple_strtoull(serial_string, NULL, 16); |
| 497 | |
| 498 | serialnr->high = (unsigned int) (serial >> 32); |
| 499 | serialnr->low = (unsigned int) (serial & 0xffffffff); |
| 500 | } else { |
| 501 | serialnr->high = 0; |
| 502 | serialnr->low = 0; |
| 503 | } |
| 504 | } |
| 505 | #endif |
| 506 | |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 507 | #ifdef CONFIG_MISC_INIT_R |
| 508 | int misc_init_r(void) |
| 509 | { |
Paul Kocialkowski | 8c81657 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 510 | char serial_string[17] = { 0 }; |
Hans de Goede | cac5b1c | 2014-11-26 00:04:24 +0100 | [diff] [blame] | 511 | unsigned int sid[4]; |
Paul Kocialkowski | 8c81657 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 512 | uint8_t mac_addr[6]; |
| 513 | int ret; |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 514 | |
Paul Kocialkowski | 8c81657 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 515 | ret = sunxi_get_sid(sid); |
| 516 | if (ret == 0 && sid[0] != 0 && sid[3] != 0) { |
| 517 | if (!getenv("ethaddr")) { |
| 518 | /* Non OUI / registered MAC address */ |
| 519 | mac_addr[0] = 0x02; |
| 520 | mac_addr[1] = (sid[0] >> 0) & 0xff; |
| 521 | mac_addr[2] = (sid[3] >> 24) & 0xff; |
| 522 | mac_addr[3] = (sid[3] >> 16) & 0xff; |
| 523 | mac_addr[4] = (sid[3] >> 8) & 0xff; |
| 524 | mac_addr[5] = (sid[3] >> 0) & 0xff; |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 525 | |
Paul Kocialkowski | 8c81657 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 526 | eth_setenv_enetaddr("ethaddr", mac_addr); |
| 527 | } |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 528 | |
Paul Kocialkowski | 8c81657 | 2015-03-28 18:35:35 +0100 | [diff] [blame] | 529 | if (!getenv("serial#")) { |
| 530 | snprintf(serial_string, sizeof(serial_string), |
| 531 | "%08x%08x", sid[0], sid[3]); |
| 532 | |
| 533 | setenv("serial#", serial_string); |
| 534 | } |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 535 | } |
| 536 | |
Hans de Goede | 1871a8c | 2015-01-13 19:25:06 +0100 | [diff] [blame] | 537 | #ifndef CONFIG_MACH_SUN9I |
Hans de Goede | e13afee | 2015-04-27 16:50:04 +0200 | [diff] [blame] | 538 | ret = sunxi_usb_phy_probe(); |
| 539 | if (ret) |
| 540 | return ret; |
Hans de Goede | 1871a8c | 2015-01-13 19:25:06 +0100 | [diff] [blame] | 541 | #endif |
Hans de Goede | d42faf3 | 2015-06-17 15:49:26 +0200 | [diff] [blame] | 542 | sunxi_musb_board_init(); |
| 543 | |
Jonathan Liu | b41d7d0 | 2014-06-14 08:59:09 +0200 | [diff] [blame] | 544 | return 0; |
| 545 | } |
| 546 | #endif |
Luc Verhaegen | 2d7a084 | 2014-08-13 07:55:07 +0200 | [diff] [blame] | 547 | |
| 548 | #ifdef CONFIG_OF_BOARD_SETUP |
| 549 | int ft_board_setup(void *blob, bd_t *bd) |
| 550 | { |
| 551 | #ifdef CONFIG_VIDEO_DT_SIMPLEFB |
| 552 | return sunxi_simplefb_setup(blob); |
| 553 | #endif |
| 554 | } |
| 555 | #endif /* CONFIG_OF_BOARD_SETUP */ |