blob: 565e02118752f35c4263826b6d0847ad60064912 [file] [log] [blame]
wdenkaa245092004-06-09 12:47:02 +00001/*
2 * (C) Copyright 2000-2004
3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24OUTPUT_ARCH(powerpc)
wdenkaa245092004-06-09 12:47:02 +000025/* Do we need any of these for elf?
26 __DYNAMIC = 0; */
27SECTIONS
28{
29 .resetvec 0xFFFFFFFC :
30 {
31 *(.resetvec)
32 } = 0xffff
33
34 /* Read-only sections, merged into text segment: */
35 . = + SIZEOF_HEADERS;
36 .interp : { *(.interp) }
37 .hash : { *(.hash) }
38 .dynsym : { *(.dynsym) }
39 .dynstr : { *(.dynstr) }
40 .rel.text : { *(.rel.text) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020041 .rela.text : { *(.rela.text) }
wdenkaa245092004-06-09 12:47:02 +000042 .rel.data : { *(.rel.data) }
Wolfgang Denk53677ef2008-05-20 16:00:29 +020043 .rela.data : { *(.rela.data) }
44 .rel.rodata : { *(.rel.rodata) }
45 .rela.rodata : { *(.rela.rodata) }
wdenkaa245092004-06-09 12:47:02 +000046 .rel.got : { *(.rel.got) }
47 .rela.got : { *(.rela.got) }
48 .rel.ctors : { *(.rel.ctors) }
49 .rela.ctors : { *(.rela.ctors) }
50 .rel.dtors : { *(.rel.dtors) }
51 .rela.dtors : { *(.rela.dtors) }
52 .rel.bss : { *(.rel.bss) }
53 .rela.bss : { *(.rela.bss) }
54 .rel.plt : { *(.rel.plt) }
55 .rela.plt : { *(.rela.plt) }
56 .init : { *(.init) }
57 .plt : { *(.plt) }
58 .text :
59 {
60 /* WARNING - the following is hand-optimized to fit within */
61 /* the sector layout of our flash chips! XXX FIXME XXX */
62
63 cpu/ppc4xx/start.o (.text)
64 board/csb472/init.o (.text)
65 cpu/ppc4xx/kgdb.o (.text)
66 cpu/ppc4xx/traps.o (.text)
67 cpu/ppc4xx/interrupts.o (.text)
Stefan Roese882ae412007-10-22 15:44:39 +020068 cpu/ppc4xx/4xx_uart.o (.text)
wdenkaa245092004-06-09 12:47:02 +000069 cpu/ppc4xx/cpu_init.o (.text)
70 cpu/ppc4xx/speed.o (.text)
Ben Warren4d03a4e2008-11-09 21:29:23 -080071 drivers/net/4xx_enet.o (.text)
wdenkaa245092004-06-09 12:47:02 +000072 common/dlmalloc.o (.text)
73 lib_generic/crc32.o (.text)
74
75 lib_ppc/extable.o (.text)
76 lib_ppc/board.o (.text)
77 lib_generic/zlib.o (.text)
78/* . = env_offset;*/
Jean-Christophe PLAGNIOL-VILLARD0cf4fd32008-09-10 22:48:01 +020079/* common/env_embedded.o(.text)*/
wdenkaa245092004-06-09 12:47:02 +000080
81 *(.text)
82 *(.fixup)
83 *(.got1)
84 }
85 _etext = .;
86 PROVIDE (etext = .);
87 .rodata :
88 {
Wolfgang Denk74812662005-12-12 16:06:05 +010089 *(.eh_frame)
Trent Piephof62fb992009-02-18 15:22:05 -080090 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
wdenkaa245092004-06-09 12:47:02 +000091 }
92 .fini : { *(.fini) } =0
93 .ctors : { *(.ctors) }
94 .dtors : { *(.dtors) }
95
96 /* Read-write section, merged into data segment: */
97 . = (. + 0x00FF) & 0xFFFFFF00;
98 _erotext = .;
99 PROVIDE (erotext = .);
100 .reloc :
101 {
102 *(.got)
103 _GOT2_TABLE_ = .;
104 *(.got2)
105 _FIXUP_TABLE_ = .;
106 *(.fixup)
107 }
108 __got2_entries = (_FIXUP_TABLE_ - _GOT2_TABLE_) >>2;
109 __fixup_entries = (. - _FIXUP_TABLE_)>>2;
110
111 .data :
112 {
113 *(.data)
114 *(.data1)
115 *(.sdata)
116 *(.sdata2)
117 *(.dynamic)
118 CONSTRUCTORS
119 }
120 _edata = .;
121 PROVIDE (edata = .);
122
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200123 . = .;
wdenkaa245092004-06-09 12:47:02 +0000124 __u_boot_cmd_start = .;
125 .u_boot_cmd : { *(.u_boot_cmd) }
126 __u_boot_cmd_end = .;
127
128
Wolfgang Denk807d5d72005-08-31 12:28:00 +0200129 . = .;
wdenkaa245092004-06-09 12:47:02 +0000130 __start___ex_table = .;
131 __ex_table : { *(__ex_table) }
132 __stop___ex_table = .;
133
134 . = ALIGN(256);
135 __init_begin = .;
136 .text.init : { *(.text.init) }
137 .data.init : { *(.data.init) }
138 . = ALIGN(256);
139 __init_end = .;
140
141 __bss_start = .;
Wolfgang Denk64134f02008-01-12 20:31:39 +0100142 .bss (NOLOAD) :
wdenkaa245092004-06-09 12:47:02 +0000143 {
144 *(.sbss) *(.scommon)
145 *(.dynbss)
146 *(.bss)
147 *(COMMON)
Selvamuthukumar9b827cf2008-10-16 22:54:03 +0530148 . = ALIGN(4);
wdenkaa245092004-06-09 12:47:02 +0000149 }
150 _end = . ;
151 PROVIDE (end = .);
152}