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Alessandro Rubinid5254f12009-01-24 18:10:37 +01001/*
2 * (C) Copyright 2005
3 * STMicrolelctronics, <www.st.com>
4 *
5 * (C) Copyright 2004
6 * ARM Ltd.
7 * Philippe Robin, <philippe.robin@arm.com>
8 *
Wolfgang Denk1a459662013-07-08 09:37:19 +02009 * SPDX-License-Identifier: GPL-2.0+
Alessandro Rubinid5254f12009-01-24 18:10:37 +010010 */
11
12#include <common.h>
Ben Warren7194ab82009-10-04 22:37:03 -070013#include <netdev.h>
Alessandro Rubinid5254f12009-01-24 18:10:37 +010014#include <asm/io.h>
Alessandro Rubinibb4291e2009-07-24 11:27:14 +020015#include <asm/arch/gpio.h>
Alessandro Rubinid5254f12009-01-24 18:10:37 +010016
17DECLARE_GLOBAL_DATA_PTR;
18
19#ifdef CONFIG_SHOW_BOOT_PROGRESS
20void show_boot_progress(int progress)
21{
22 printf("%i\n", progress);
23}
24#endif
25
26/*
27 * Miscellaneous platform dependent initialisations
28 */
29int board_init(void)
30{
31 gd->bd->bi_arch_number = MACH_TYPE_NOMADIK;
32 gd->bd->bi_boot_params = 0x00000100;
33 writel(0xC37800F0, NOMADIK_GPIO1_BASE + 0x20);
34 writel(0x00000000, NOMADIK_GPIO1_BASE + 0x24);
35 writel(0x00000000, NOMADIK_GPIO1_BASE + 0x28);
36 writel(readl(NOMADIK_SRC_BASE) | 0x8000, NOMADIK_SRC_BASE);
37
Alessandro Rubinid3be1bc2009-02-09 15:53:33 +010038 /* Set up SMCS1 for Ethernet: sram-like, enabled, timing values */
39 writel(0x0000305b, REG_FSMC_BCR1);
40 writel(0x00033f33, REG_FSMC_BTR1);
Alessandro Rubinid5254f12009-01-24 18:10:37 +010041
Alessandro Rubinif7aa59b2009-06-22 09:18:57 +020042 /* Set up SMCS0 for OneNand: sram-like once again */
43 writel(0x000030db, NOMADIK_FSMC_BASE + 0x00); /* FSMC_BCR0 */
44 writel(0x02100551, NOMADIK_FSMC_BASE + 0x04); /* FSMC_BTR0 */
45
Alessandro Rubinid3be1bc2009-02-09 15:53:33 +010046 icache_enable();
Alessandro Rubinid5254f12009-01-24 18:10:37 +010047 return 0;
48}
49
Alessandro Rubinibb4291e2009-07-24 11:27:14 +020050int board_late_init(void)
Alessandro Rubinid5254f12009-01-24 18:10:37 +010051{
Alessandro Rubinibb4291e2009-07-24 11:27:14 +020052 /* Set the two I2C gpio lines to be gpio high */
53 nmk_gpio_set(__SCL, 1); nmk_gpio_set(__SDA, 1);
54 nmk_gpio_dir(__SCL, 1); nmk_gpio_dir(__SDA, 1);
55 nmk_gpio_af(__SCL, GPIO_GPIO); nmk_gpio_af(__SDA, GPIO_GPIO);
56
57 /* Reset the I2C port expander, on GPIO77 */
58 nmk_gpio_af(77, GPIO_GPIO);
59 nmk_gpio_dir(77, 1);
60 nmk_gpio_set(77, 0);
61 udelay(10);
62 nmk_gpio_set(77, 1);
63
Alessandro Rubinid5254f12009-01-24 18:10:37 +010064 return 0;
65}
66
67int dram_init(void)
68{
Alessandro Rubiniafba32b2011-04-16 13:00:12 +000069 gd->ram_size = get_ram_size(CONFIG_SYS_SDRAM_BASE,
70 CONFIG_SYS_SDRAM_SIZE);
71 return 0;
72}
73
74void dram_init_banksize(void)
75{
Alessandro Rubinid5254f12009-01-24 18:10:37 +010076 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
77 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
78
79 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
80 gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
Alessandro Rubinid5254f12009-01-24 18:10:37 +010081}
Ben Warren7194ab82009-10-04 22:37:03 -070082
83#ifdef CONFIG_CMD_NET
84int board_eth_init(bd_t *bis)
85{
86 int rc = 0;
87#ifdef CONFIG_SMC91111
88 rc = smc91111_initialize(0, CONFIG_SMC91111_BASE);
89#endif
90 return rc;
91}
92#endif